JP2567157Y2 - 発光ダイオード - Google Patents

発光ダイオード

Info

Publication number
JP2567157Y2
JP2567157Y2 JP1989006523U JP652389U JP2567157Y2 JP 2567157 Y2 JP2567157 Y2 JP 2567157Y2 JP 1989006523 U JP1989006523 U JP 1989006523U JP 652389 U JP652389 U JP 652389U JP 2567157 Y2 JP2567157 Y2 JP 2567157Y2
Authority
JP
Japan
Prior art keywords
light
light emitting
emitting element
lead
thickness
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP1989006523U
Other languages
English (en)
Japanese (ja)
Other versions
JPH0298665U (enrdf_load_html_response
Inventor
好伸 末広
繁 山崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
iwasakidenki
Original Assignee
iwasakidenki
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by iwasakidenki filed Critical iwasakidenki
Priority to JP1989006523U priority Critical patent/JP2567157Y2/ja
Publication of JPH0298665U publication Critical patent/JPH0298665U/ja
Application granted granted Critical
Publication of JP2567157Y2 publication Critical patent/JP2567157Y2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
JP1989006523U 1989-01-25 1989-01-25 発光ダイオード Expired - Fee Related JP2567157Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989006523U JP2567157Y2 (ja) 1989-01-25 1989-01-25 発光ダイオード

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989006523U JP2567157Y2 (ja) 1989-01-25 1989-01-25 発光ダイオード

Publications (2)

Publication Number Publication Date
JPH0298665U JPH0298665U (enrdf_load_html_response) 1990-08-06
JP2567157Y2 true JP2567157Y2 (ja) 1998-03-30

Family

ID=31210776

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989006523U Expired - Fee Related JP2567157Y2 (ja) 1989-01-25 1989-01-25 発光ダイオード

Country Status (1)

Country Link
JP (1) JP2567157Y2 (enrdf_load_html_response)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55118681A (en) * 1979-03-07 1980-09-11 Marantz Japan Inc Light emitting diode with reflecting mirror
JPS5824180A (ja) * 1981-08-06 1983-02-14 キムラ電機株式会社 平板状表示装置の製造法
JPS62212U (enrdf_load_html_response) * 1985-06-13 1987-01-06
JP2524774Y2 (ja) * 1986-09-03 1997-02-05 シャープ株式会社 Ledランプ

Also Published As

Publication number Publication date
JPH0298665U (enrdf_load_html_response) 1990-08-06

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees