JP2559991Y2 - 樹脂モールド型半導体装置 - Google Patents

樹脂モールド型半導体装置

Info

Publication number
JP2559991Y2
JP2559991Y2 JP1991036320U JP3632091U JP2559991Y2 JP 2559991 Y2 JP2559991 Y2 JP 2559991Y2 JP 1991036320 U JP1991036320 U JP 1991036320U JP 3632091 U JP3632091 U JP 3632091U JP 2559991 Y2 JP2559991 Y2 JP 2559991Y2
Authority
JP
Japan
Prior art keywords
resin
heat sink
thickness
pellet
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1991036320U
Other languages
English (en)
Japanese (ja)
Other versions
JPH0497352U (enrdf_load_stackoverflow
Inventor
和洋 井上
Original Assignee
関西日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 関西日本電気株式会社 filed Critical 関西日本電気株式会社
Priority to JP1991036320U priority Critical patent/JP2559991Y2/ja
Publication of JPH0497352U publication Critical patent/JPH0497352U/ja
Application granted granted Critical
Publication of JP2559991Y2 publication Critical patent/JP2559991Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
JP1991036320U 1990-07-26 1991-05-22 樹脂モールド型半導体装置 Expired - Lifetime JP2559991Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1991036320U JP2559991Y2 (ja) 1990-07-26 1991-05-22 樹脂モールド型半導体装置

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
JP8047490 1990-07-26
JP2-87602 1990-08-21
JP2-87607 1990-08-21
JP8760790 1990-08-21
JP2-80474 1990-08-21
JP8760290 1990-08-21
JP1991036320U JP2559991Y2 (ja) 1990-07-26 1991-05-22 樹脂モールド型半導体装置

Publications (2)

Publication Number Publication Date
JPH0497352U JPH0497352U (enrdf_load_stackoverflow) 1992-08-24
JP2559991Y2 true JP2559991Y2 (ja) 1998-01-19

Family

ID=31950705

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1991036320U Expired - Lifetime JP2559991Y2 (ja) 1990-07-26 1991-05-22 樹脂モールド型半導体装置

Country Status (1)

Country Link
JP (1) JP2559991Y2 (enrdf_load_stackoverflow)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5619410Y2 (enrdf_load_stackoverflow) * 1975-03-28 1981-05-08
JPS6144450A (ja) * 1984-08-08 1986-03-04 Nec Kansai Ltd 絶縁型半導体装置の製造方法
JPS62131447U (enrdf_load_stackoverflow) * 1986-02-12 1987-08-19
JPS62138452U (enrdf_load_stackoverflow) * 1986-02-25 1987-09-01

Also Published As

Publication number Publication date
JPH0497352U (enrdf_load_stackoverflow) 1992-08-24

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