JP2538937B2 - Semiconductor package - Google Patents

Description

TECHNICAL FIELD The present invention relates to a semiconductor package such as a pin grid array.

[Background Art] High functionality of devices in semiconductor packages such as IC,
A pin grid with pins that serve as electrical connection pins to the outside on the backside of the substrate on which the semiconductor chip is mounted, in response to the increase in the number of I / Os that accompanies higher densities and the shortening of the lead length that accompanies higher speeds. Arrays (abbreviated as PGA) have been put to practical use. In this semiconductor package called a pin grid array, the base of a large number of pins is embedded in a substrate on which a semiconductor chip such as an IC chip is mounted to electrically connect the pins to the semiconductor chip, and the large number of pins are connected to the substrate. It is designed to be projected from the entire back surface of the device. By soldering these protruding pins into the sockets and through holes provided on the equipment and the mounting board (motherboard), soldering of the semiconductor package to the motherboard etc. It can be installed.

In order to ensure reliable soldering connection of the pins to the mother board or the like, a solder plating layer 4 is provided on the outer circumference of the pins 3 as shown in FIG. The one shown in FIG. 3 is used by the applicant and is not known). However, in this pin, since the solder layer 4 is formed by plating, it is provided over the entire pin 3, and the solder plating layer 4 cannot be formed as a thick layer in terms of cost and the like. . Therefore, when the pins 3 are inserted into the mother board and soldered, the thickness of the solder plating layer 4 at the place where the soldering is required is thin. In some cases it could not be done.

[Object of the Invention] The present invention has been made in view of the above points, and an object of the present invention is to provide a semiconductor package capable of reliably soldering by a solder plating layer provided on a pin. DISCLOSURE OF THE INVENTION In the present invention, however, the substrate 2 on which the semiconductor chip 1 is mounted is mounted.
A plurality of pins 3, which are electrically connected to the semiconductor chip 1,
In the semiconductor package formed by embedding the base portions of 3 ... and projecting the pins 3, 3 ... From the substrate 2, the solder plating layer 4 is formed on the outer periphery of the pins 3 and the mother board 5 or the like is formed. A recess 6 is provided on the outer periphery of the pin 3 at a position where the pin 3 is inserted and connected to a member for connecting a semiconductor package, and the solder plating layer 4 is thickly formed in the recess 6. By providing the concave portion 6 on the outer circumference, the solder plating layer 4 can be formed thick in the concave portion 6 and the solder fixing can be reliably performed in the thick solder plating layer 4 portion. The present invention will be described in detail with reference to examples.

FIG. 1 (of course not showing the actual size) shows an example of a semiconductor package called a pin grid array, and the substrate 2 is formed by molding a synthetic resin molding material by injection molding or transfer molding. Created as an item. When the substrate 2 is formed in this way, a large number of pins 3 are attached to the substrate 2 in parallel by insert molding so that the bases of the pins 3 are embedded in the substrate 2, and the semiconductor chip 1 such as an IC chip is also mounted. A circuit body 10 mounted on the surface is embedded and attached in the substrate 2. As the synthetic resin forming the substrate 2, a thermosetting resin such as phenol, epoxy, silicon, or polyimide, or a thermoplastic resin such as polyphenylene sulfide, polysulfone, polyether sulfone, or polyaryl sulfone can be used. It is preferable to use a thermosetting resin such as an Epokin resin in terms of reliability in actual use, and the latter thermoplastic resin in terms of flexibility, mechanical strength, and heat resistance.

The pin 3 is formed in a circular cross section over the entire length in the axial direction, and a base portion which is the head thereof is provided with a pair of upper and lower circular flanges 11 and 21 projecting from the entire circumference of the pin 3. . A recess 6 is provided on the outer circumference of the tip of the pin 3 along the entire circumference as shown in FIG. A solder plating layer 4 is formed on the entire outer surface of the pin 3 by solder plating. By applying the solder plating layer 4, the outer diameter of the pin 3 is extended vertically except for the collars 11 and 21. Are formed to have the same diameter. Therefore, the thickness of the solder plating layer 4 becomes thicker in the concave portion 6.

As the circuit body 10, the circuit is radially arranged on the surface of the insulating plate 22.
A circuit board provided with 12 can be used, and for example, a glass epoxy wiring board, a glass polyimide wiring board, a glass Teflon wiring board, a polyester wiring sheet or film, a polyimide wiring film or sheet can be used. Further, a lead frame of copper, aluminum, or 42 alloy (Ni42% Ni-Fe alloy) fixed with a polyimide film or the like can be used as the circuit body 10. A semiconductor chip 1 such as an IC chip is mounted on the center of the surface of the circuit body 10, and a wire 20 is bonded between the semiconductor chip 1 and the circuit 12 of the circuit body 10. Further, in the circuit body 10, a pin hole 13 is formed as a through hole at a land portion of the circuit 12 at a position corresponding to the pin 3.

When manufacturing a semiconductor package called a pin grid array, the head of the pin 3 is inserted into and locked in the pin hole 13 of the circuit body 10, and the circuit 12 of the circuit body 10 allows the semiconductor chip 1 and each pin to be connected. 3 and 3 are set in a molding die while being electrically connected. In this state, a resin molding material is injected into the molding die and cured or solidified to mold the substrate 2 in the molding die, and at the same time, the base portion of the pin 3 is insert-molded into the substrate 2 and the circuit body 3 is formed. It is possible to obtain a semiconductor package in which the semiconductor chip 1 mounted on the circuit body 3 is also embedded in the substrate 2 by insert-molding it into the substrate 2. In this way, the pin 3 is attached in a state of protruding from the back surface of the substrate 2 by inserting the base portion of the pin 3 into the substrate 2 and embedding it, and the collars 11 and 21 are provided in the substrate 2. In the embedded state, the base of the pin 3 can be firmly held in the substrate 2 to enhance the pull-out strength of the pin 3 and prevent the pin 3 from wobbling.

In the semiconductor package A formed as described above, when mounting the device on a mounting board (motherboard) or the like, each pin 3 is attached to a socket provided on the mother board 5, a through hole 15 having a through hole plating 14, or the like. It can be done by inserting and soldering. At this time, a plurality of positioning protrusions 16 are provided integrally on the substrate 2 in parallel with the pins 3 with the same protrusion size, and the tips of the positioning protrusions 16 contact the surface of the mother board 5, With the positioning between the board 2 and the motherboard 5, the pin 3 is inserted into the through hole 15.
, And the pin 3 is formed with a recess 6 in the portion to be inserted into the through hole 15 and in the vicinity thereof. Therefore, when the pins 3 are soldered to the through holes 15 by using the solder plating layer 4 applied to the outer surface of the pin 3 by heating, the solder plating layer 4 provided as a thick layer in the concave portion 6 The pin 3 can be fixed in the through hole 15 with a large amount of solder, and the solder can be securely fixed to the motherboard 5.

[Advantages of the Invention] As described above, according to the present invention, since the solder plating layer is formed on the outer periphery of the pin and the concave portion is formed on the outer periphery of the pin at a place where the pin is inserted and connected to the mother board or the like, The solder plating layer can be thickly formed in the recessed portion provided on the outer periphery, and the pin can be reliably soldered to the mother board or the like in the thick solder plating layer portion.

[Brief description of drawings]

FIG. 1 is a sectional view of an embodiment of the present invention, FIG. 2 is an enlarged sectional view of a pin used therein, and FIG. 3 is an enlarged sectional view of a conventional pin. 1 is a semiconductor chip, 2 is a substrate, 3 is a pin, 4 is a semiconductor plating layer, 5 is a mother board, and 6 is a recess.

Claims (1)

(57) [Claims] 1. A base on which a plurality of pins electrically connected to a semiconductor chip are embedded in a substrate on which a semiconductor chip is mounted,
In a semiconductor package formed by projecting each pin from the substrate, a solder plating layer is formed on the outer periphery of the pin, and a recess is formed on the outer periphery of the pin at a place where the pin is inserted and connected to a member for connecting the semiconductor package such as a mother board. And a solder plating layer is formed thickly on the concave portion.