JP2536564B2 - Resin-sealed semiconductor device - Google Patents

Resin-sealed semiconductor device

Info

Publication number
JP2536564B2
JP2536564B2 JP62314635A JP31463587A JP2536564B2 JP 2536564 B2 JP2536564 B2 JP 2536564B2 JP 62314635 A JP62314635 A JP 62314635A JP 31463587 A JP31463587 A JP 31463587A JP 2536564 B2 JP2536564 B2 JP 2536564B2
Authority
JP
Japan
Prior art keywords
die pad
intermediate plate
hole
semiconductor device
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP62314635A
Other languages
Japanese (ja)
Other versions
JPH01154545A (en
Inventor
隆一郎 森
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP62314635A priority Critical patent/JP2536564B2/en
Publication of JPH01154545A publication Critical patent/JPH01154545A/en
Application granted granted Critical
Publication of JP2536564B2 publication Critical patent/JP2536564B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Die Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は樹脂封止型半導体装置に係り、特に、その
外装樹脂におけるクラック発生防止構造に関する。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resin-encapsulated semiconductor device, and more particularly to a structure for preventing cracks in an exterior resin thereof.

〔従来の技術〕[Conventional technology]

従来から、この種の半導体装置として、第６図に示す
ような構造のものが知られている。この図において、符
号10は半導体素子、11は半導体素子10が載置固定される
ダイパッド、12はガル・ウィングといわれるタイプのリ
ードピン、13は半導体素子10に配設された電極とリード
ピン12の内端部とを電気的に接続するワイヤ、14はリー
ドピン12の外端部を除く半導体装置の要部を一体的に封
止する外装樹脂である。Conventionally, as this type of semiconductor device, a structure having a structure as shown in FIG. 6 has been known. In the figure, reference numeral 10 is a semiconductor element, 11 is a die pad on which the semiconductor element 10 is mounted and fixed, 12 is a lead pin called a gull wing, and 13 is an electrode and a lead pin 12 arranged on the semiconductor element 10. Wires that electrically connect the end portions, and 14 are exterior resins that integrally seal the main parts of the semiconductor device except the outer ends of the lead pins 12.

〔発明が解決しようとする問題点〕[Problems to be solved by the invention]

ところで、前記構造の半導体装置においては、これを
封止する外装樹脂14の有する線膨張係数が半導体素子10
やダイパッド11などの有する線膨張係数よりも大きいた
め、つぎのような問題点があった。すなわち、この半導
体装置の全体がその実装プロセスにおいて加熱される
と、前述したような線膨張係数の相違に基づき、既に保
管中における水分吸収などによって接着力が低下してい
たダイパッド11の下面と外装樹脂14の下側内面とが、第
７図に示すように互いに剥離してしまい、ダイパッド11
の端部に内部応力が集中して外装樹脂14にクラック15が
発生してしまうことになっていた。By the way, in the semiconductor device having the above structure, the linear expansion coefficient of the exterior resin 14 that seals the semiconductor device 10 is
Since the coefficient of linear expansion is larger than that of the die pad 11 and the like, there are the following problems. That is, when the entire semiconductor device is heated in the mounting process, the lower surface and the exterior of the die pad 11 whose adhesive strength has been already reduced due to moisture absorption during storage due to the difference in the linear expansion coefficient as described above. The lower inner surface of the resin 14 is separated from each other as shown in FIG. 7, and the die pad 11
Internal stress was concentrated on the end portions of the resin and cracks 15 were generated in the exterior resin 14.

この発明は、このような問題点を解消するために創案
されたものであって、実装プロセスにおける加熱の際、
半導体装置の要部を封止する外装樹脂に発生するクラッ
クを有効に防止することが可能な半導体装置の提供を目
的としている。The present invention was devised to solve such problems, and when heating in the mounting process,
An object of the present invention is to provide a semiconductor device that can effectively prevent cracks that occur in the exterior resin that seals the main part of the semiconductor device.

〔問題点を解決するための手段〕[Means for solving problems]

この発明においては、上記目的を達成するため、半導
体素子と、その裏面に接合された中間板と、この中間板
を介して前記半導体素子を固定支持するダイパッドと、
これらを封止する外装樹脂とを備え、前記ダイパッドに
は、その表裏に開口するダイパッド貫通孔を形成すると
ともに、前記中間板には前記ダイパッド貫通孔に連通
し、かつ、これよりも大きな開口面積を有する中間板貫
通孔を形成し、さらに、この中間板貫通孔および前記ダ
イパッド貫通孔の内部に前記外装樹脂の一部を充填した
構成に特徴を有するものである。In the present invention, in order to achieve the above object, a semiconductor element, an intermediate plate joined to the back surface thereof, a die pad for fixing and supporting the semiconductor element via the intermediate plate,
An exterior resin that seals these is provided, and the die pad is formed with die pad through holes that open to the front and back sides thereof, and the intermediate plate communicates with the die pad through holes, and an opening area larger than this. Is characterized in that an intermediate plate through hole having the above is formed, and a part of the exterior resin is filled inside the intermediate plate through hole and the die pad through hole.

〔作用〕[Action]

上記構成によれば、半導体装置の要部を封止する外装
樹脂の一部がダイパッド貫通孔を通過して半導体素子の
裏面に接合された中間板の中間板貫通孔の内部にまで充
填されることにより、中間板貫通孔内の樹脂がダイパッ
ド貫通孔周囲のダイパッド上面に係合しているので、ダ
イパッドと中間板とが外装樹脂の一部を介して互いに機
械的に固定支持されていることになる。According to the above configuration, a part of the exterior resin that seals the main part of the semiconductor device passes through the die pad through hole and is filled up to the inside of the intermediate plate through hole of the intermediate plate joined to the back surface of the semiconductor element. Since the resin in the through hole of the intermediate plate is engaged with the upper surface of the die pad around the through hole of the die pad, the die pad and the intermediate plate are mechanically fixed and supported to each other through a part of the exterior resin. become.

したがって、半導体装置が全体的に加熱されても、ダ
イパッドと中間板とがそれぞれの有する線膨張係数の相
違によって剥離することがなく、このような剥離に伴う
内部応力がダイパッドの端部に集中して外装樹脂にクラ
ックが発生することが有効に防止される。Therefore, even if the semiconductor device is entirely heated, the die pad and the intermediate plate do not peel due to the difference in linear expansion coefficient between the die pad and the intermediate plate, and the internal stress caused by such peeling concentrates on the end portion of the die pad. As a result, cracking of the exterior resin is effectively prevented.

〔実施例〕〔Example〕

以下、この発明に係る一実施例を図面に基づいて説明
する。An embodiment according to the present invention will be described below with reference to the drawings.

第１図は本発明に係る樹脂封止型半導体装置の概略構
造を示す断面図であって、この図における符号１は半導
体素子、２は半導体素子１の裏面に接合された中間板、
３は中間板２を介して半導体素子１を固定支持するダイ
パッドである。そして、第２図の平面図に示すような平
面視略矩形状の金属平板からなるダイパッド３の略中央
位置には、その表裏に開口する円形状のダイパッド貫通
孔3aが形成されている。また、第３図の平面図に示すよ
うに、このダイパッド３と前記半導体素子１との間に介
装された中間板２もダイパッド３と略同形状の金属平板
からなり、その略中央位置にはダイパッド貫通孔3aに連
通するとともに、これよりも大きな開口面積を有する円
形状の中間板貫通孔2aが形成されている。FIG. 1 is a sectional view showing a schematic structure of a resin-encapsulated semiconductor device according to the present invention, in which reference numeral 1 is a semiconductor element, 2 is an intermediate plate bonded to the back surface of the semiconductor element 1,
Reference numeral 3 is a die pad for fixing and supporting the semiconductor element 1 via the intermediate plate 2. A circular die pad through hole 3a is formed in the front and back of the die pad 3 at a substantially central position as shown in the plan view of FIG. Further, as shown in the plan view of FIG. 3, the intermediate plate 2 interposed between the die pad 3 and the semiconductor element 1 is also made of a metal flat plate having substantially the same shape as the die pad 3, and is located at a substantially central position. Is connected to the die pad through hole 3a, and a circular intermediate plate through hole 2a having a larger opening area is formed.

一方、前記ダイパッド２の周囲には、ガル・ウィング
タイプとされた複数のリードピン４が並列配置されてお
り、リードピン４の内端部と半導体素子１に配設された
電極とは、互いにワイヤ５を介して電気的に接続されて
いる。そして、リードピン４の外端部を除く全ての部
品、すなわち、半導体装置の要部は外装樹脂６によって
一体的に封止されており、前記中間板貫通孔2aおよびダ
イパッド貫通孔3aの内部それぞれには外装樹脂６の一部
が充填されている。したがって、ダイパッド貫通孔3aを
通過して、いわゆる「釘の頭」状で中間板貫通孔2a内に
充填された外装樹脂６の一部はダイパッド３のダイパッ
ド貫通孔3a周囲の上面に係合することになり、このダイ
パッド３と中間板２とは互いに外装樹脂６の一部を介し
て互いに機械的に固定支持されていることになる。On the other hand, around the die pad 2, a plurality of gull-wing type lead pins 4 are arranged in parallel, and the inner ends of the lead pins 4 and the electrodes arranged on the semiconductor element 1 are connected to each other by a wire 5. Are electrically connected via. All the components except the outer end of the lead pin 4, that is, the main part of the semiconductor device is integrally sealed by the exterior resin 6, and is provided in each of the intermediate plate through hole 2a and the die pad through hole 3a. Is partially filled with the exterior resin 6. Therefore, a part of the exterior resin 6 that has passed through the die pad through hole 3a and is filled in the intermediate plate through hole 2a in a so-called "nail head" shape engages with the upper surface of the die pad 3 around the die pad through hole 3a. This means that the die pad 3 and the intermediate plate 2 are mechanically fixedly supported to each other via a part of the exterior resin 6.

そのため、上記構造によれば、この半導体装置が実装
プロセスにおいて加熱されても、そのダイパッド３の下
面と外装樹脂６の下側内面とが、中間板貫通孔2aおよび
ダイパッド貫通孔3aの内部に充填された外装樹脂６の一
部によって固持されることになり、従来例のように、こ
れらが剥離してしまうことがないので、このような剥離
に伴う内部応力がダイパッド３の端部に集中して外装樹
脂６にクラックが発生することはない。Therefore, according to the above structure, even if this semiconductor device is heated in the mounting process, the lower surface of the die pad 3 and the lower inner surface of the exterior resin 6 fill the inside of the intermediate plate through hole 2a and the die pad through hole 3a. Since it will be firmly held by a part of the exterior resin 6 that has been removed and will not be peeled off as in the conventional example, the internal stress due to such peeling will concentrate on the end portion of the die pad 3. As a result, the exterior resin 6 is not cracked.

なお、以上の説明においては、半導体装置を構成する
中間板２およびダイパッド３それぞれの互いに対応する
位置に、円形状で単一の貫通孔2a,3aを設けるものとし
て説明したが、本発明はこれに限定されるものではな
く、例えば、他の実施例として、第４図の断面図および
第５図の平面図に示すように、中間板２に略矩形状の中
間板貫通孔2bを形成するとともに、ダイパッド３に複数
のダイパッド貫通孔3b,…を設けておいてもよい。ま
た、本実施例の半導体装置においては、そのリードピン
４の形状をガル・ウィングタイプとして説明している
が、例えば、Ｊ・リードタイプなどのリードピンであっ
ても同様に構成できることはいうまでもない。In the above description, it is assumed that the circular through holes 2a and 3a are provided at positions corresponding to each other of the intermediate plate 2 and the die pad 3 which form the semiconductor device. For example, as another embodiment, as shown in the sectional view of FIG. 4 and the plan view of FIG. 5, a substantially rectangular intermediate plate through hole 2b is formed in the intermediate plate 2. At the same time, the die pad 3 may be provided with a plurality of die pad through holes 3b ,. Further, in the semiconductor device of this embodiment, the shape of the lead pin 4 is described as a gull wing type, but it goes without saying that a lead pin of J. lead type or the like can be similarly configured. .

〔発明の効果〕〔The invention's effect〕

以上説明したように、この発明によれば、半導体装置
の要部を封止する外装樹脂の一部がダイパッド貫通孔を
通過して半導体素子の裏面に接合された中間板の中間板
貫通孔の内部にまで充填され、この中間板貫通孔内の樹
脂がダイパッド貫通孔周囲のダイパッド上面に係合する
ことによってダイパッドと中間板とが外装樹脂の一部を
介して互いに機械的に固定支持されることになる。した
がって、半導体装置が全体的に加熱されても、従来例の
ように、ダイパッドと中間板とがそれぞれの有する線膨
張係数の相違によって剥離することがなく、このような
剥離に伴う内部応力がダイパッドの端部に集中して外装
樹脂にクラックが発生することが有効に防止されるとい
う効果がある。As described above, according to the present invention, a part of the exterior resin that seals the main part of the semiconductor device passes through the die pad through hole to form the intermediate plate through hole of the intermediate plate joined to the back surface of the semiconductor element. The resin is filled up to the inside, and the resin in the through hole of the intermediate plate engages with the upper surface of the die pad around the through hole of the die pad, so that the die pad and the intermediate plate are mechanically fixed and supported to each other through a part of the exterior resin. It will be. Therefore, even if the semiconductor device is entirely heated, peeling does not occur due to the difference in linear expansion coefficient between the die pad and the intermediate plate as in the conventional example, and internal stress caused by such peeling is not generated. There is an effect that it is possible to effectively prevent the occurrence of cracks in the exterior resin by concentrating on the edges of the.

【図面の簡単な説明】[Brief description of drawings]

第１図ないし第５図は本発明の実施例に係り、第１図は
本発明の一実施例に係る半導体装置の概略構造を示す断
面図、第２図はその中間板の平面図、第３図はそのダイ
パッドの平面図であり、第４図は他の実施例に係る半導
体装置の概略構造を示す断面図、第５図はその中間板の
平面図である。また、第６図および第７図は従来例に係
り、第６図は半導体装置の概略構造を示す断面図、第７
図はその要部を封止する外装樹脂にクラックが発生した
状態を示す断面図である。 図において、１は半導体素子、２は中間板、2a,2bは中
間板貫通孔、３はダイパッド、3a,3bはダイパッド貫通
孔、６は外装樹脂である。1 to 5 relate to an embodiment of the present invention, FIG. 1 is a sectional view showing a schematic structure of a semiconductor device according to an embodiment of the present invention, and FIG. 2 is a plan view of an intermediate plate thereof. FIG. 3 is a plan view of the die pad, FIG. 4 is a sectional view showing a schematic structure of a semiconductor device according to another embodiment, and FIG. 5 is a plan view of an intermediate plate thereof. 6 and 7 relate to a conventional example, and FIG. 6 is a sectional view showing a schematic structure of a semiconductor device.
The figure is a cross-sectional view showing a state in which a crack has occurred in the exterior resin that seals the main part. In the drawing, 1 is a semiconductor element, 2 is an intermediate plate, 2a and 2b are intermediate plate through holes, 3 is a die pad, 3a and 3b are die pad through holes, and 6 is an exterior resin.

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項１】半導体素子と、その裏面に接合された中間
板と、この中間板を介して前記半導体素子を固定支持す
るダイパッドと、これらを封止する外装樹脂とを備え、 前記ダイパッドには、その表裏に開口するダイパッド貫
通孔を形成するとともに、 前記中間板には、前記ダイパッド貫通孔に連通し、か
つ、これよりも大きな開口面積を有する中間板貫通孔を
形成し、 さらに、この中間板貫通孔および前記ダイパッド貫通孔
の内部に、前記外装樹脂の一部を充填したことを特徴と
する樹脂封止型半導体装置。1. A semiconductor element, an intermediate plate joined to the back surface of the semiconductor element, a die pad for fixing and supporting the semiconductor element via the intermediate plate, and an exterior resin for sealing the semiconductor element and the die pad. , Forming a die pad through-hole opening to the front and back thereof, and forming an intermediate-plate through-hole having a larger opening area in communication with the die-pad through-hole in the intermediate plate, A resin-encapsulated semiconductor device, wherein a part of the exterior resin is filled inside the plate through hole and the die pad through hole.
JP62314635A 1987-12-10 1987-12-10 Resin-sealed semiconductor device Expired - Lifetime JP2536564B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62314635A JP2536564B2 (en) 1987-12-10 1987-12-10 Resin-sealed semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62314635A JP2536564B2 (en) 1987-12-10 1987-12-10 Resin-sealed semiconductor device

Publications (2)

Publication Number Publication Date
JPH01154545A JPH01154545A (en) 1989-06-16
JP2536564B2 true JP2536564B2 (en) 1996-09-18

Family

ID=18055692

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62314635A Expired - Lifetime JP2536564B2 (en) 1987-12-10 1987-12-10 Resin-sealed semiconductor device

Country Status (1)

Country Link
JP (1) JP2536564B2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5264730A (en) * 1990-01-06 1993-11-23 Fujitsu Limited Resin mold package structure of integrated circuit
JPH0575006A (en) * 1991-09-18 1993-03-26 Fujitsu Ltd Lead frame and resin sealed semiconductor device
JP2852155B2 (en) * 1992-02-28 1999-01-27 九州日本電気株式会社 Lead frame for semiconductor device
DE102007015817B4 (en) * 2007-03-30 2011-11-10 W.C. Heraeus Gmbh System carrier tape for electronic components

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