JPS6055647A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS6055647A JPS6055647A JP58164486A JP16448683A JPS6055647A JP S6055647 A JPS6055647 A JP S6055647A JP 58164486 A JP58164486 A JP 58164486A JP 16448683 A JP16448683 A JP 16448683A JP S6055647 A JPS6055647 A JP S6055647A
- Authority
- JP
- Japan
- Prior art keywords
- pellet
- leads
- lead
- holding
- mounting part
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
本発明線中導体装置に関し、特に封止容器の−われるリ
ードフレームに関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a wire conductor device, and particularly to a lead frame in which a sealed container is mounted.
従来のこの種の半導体装置につかわれるリードフレーム
は、第１図および第２図に示すように、ペレット搭載部
１とリード端子２のステ、チ部（ボンディング部）とが
同一平面上にあった。このため、半導体ペレット３をペ
レット搭載部１にマウントしてボンディングした場合、
第３図に示すように、ペレット３の表面がステ、チリー
ド２よりかなり高くなってしまってボンディングワイヤ
６がベレ、トエ、ヂ４、あるいはペレット搭載部工、ヂ
５と接触してしまう欠点があった。In the conventional lead frame used in this type of semiconductor device, as shown in Figs. 1 and 2, the pellet mounting part 1 and the lead terminal 2 part (bonding part) were on the same plane. . Therefore, when the semiconductor pellet 3 is mounted on the pellet mounting part 1 and bonded,
As shown in Fig. 3, the surface of the pellet 3 is considerably higher than the stand and lead 2, which causes the bonding wire 6 to come into contact with the bere, toe, part 4, or the pellet mounting part part 5. there were.
このような欠点をなくすため、たとえばデュアル・イン
ライン型の半導体装置で行なわれているように、ベレッ
ト搭載部２ｆｔ一段低くすることが考えられる０しかし
、特にシングル・インライン・パッケージ型では、ペレ
ット搭載部２の保持リードは一つしかなく、不安定であ
る。In order to eliminate this drawback, it is conceivable to lower the pellet mounting area by 2ft, as is done for example in dual in-line type semiconductor devices.However, especially in the single inline package type, the pellet mounting area 2 has only one holding lead and is unstable.
本発明の目的は、ボンディングワイヤの接触事故を防止
した半導体装置を提供することにある。An object of the present invention is to provide a semiconductor device that prevents bonding wire contact accidents.
本発明は、ペレット搭載部に２本以上の保持す−ドを設
け、これにディンプル加工を施すことにより、ベレット
搭載部とステ、チリード部とに段差を設けることを特徴
とする。The present invention is characterized in that two or more holding rods are provided in the pellet mounting portion and dimple processing is applied to these to provide a step between the pellet mounting portion, the stay, and the chireed portion.
以下、本発明の二実施例を詳細に説明する。Hereinafter, two embodiments of the present invention will be described in detail.
第４図乃至第６図１１本発明の一実施例を示すものであ
り、ペレｙ ｌ・搭載部１には一つの外部リード２に連
続する保持リード１２−１と、外部リードとは連続ない
二つの保持リード１２−２．１２で、各保持リード１２
の一箇所７でディンプル加工が施されている。これによ
って、第７図に示す工うに、ペレット３の表面とリード
２のボンディング部とをほぼ同一平面にすることができ
る。このことにより、ボンディングワイヤ６とペレット
３の工、ヂやベレ、 ｌ−搭載部１との接触をさけるこ
とが出来、組立歩留を向上させることが出来る。Figure 4 to Figure 6 11 show an embodiment of the present invention, in which the holding lead 12-1 is continuous with one external lead 2 and the external lead is not continuous with the mounting part 1. Two retaining leads 12-2.12, each retaining lead 12
Dimple processing is applied at one location 7. As a result, as shown in FIG. 7, the surface of the pellet 3 and the bonding portion of the lead 2 can be made substantially on the same plane. As a result, it is possible to avoid contact between the bonding wire 6 and the machining, edges, and edges of the pellet 3 and the l-mounting portion 1, and the assembly yield can be improved.
また、両側のリードを除くリードにはぬけ防止と耐湿性
向」：のために小穴１０が設けられている。In addition, small holes 10 are provided in the leads except for the leads on both sides to prevent them from coming off and to provide moisture resistance.
両側のリードに小穴がないのは、これらのリード幅く機
械的強度が低下するためである。また、保持リード１２
−２．１２−３が両側に延びているのはディンプル加工
を容易にするためである。そして、ペレット搭載、ボン
ディングが施されると、線１１で囲んだ内部が樹脂封止
され、不要部リード部材が切断される。よって、保持リ
ード１２−２．１２−３は樹脂封止体内に位置する。The reason why there are no small holes in the leads on both sides is because the mechanical strength of these leads decreases as they become wider. In addition, the holding lead 12
-2.12-3 extends on both sides to facilitate dimple processing. Then, after pellet mounting and bonding are performed, the inside surrounded by the line 11 is sealed with resin, and unnecessary portions of the lead member are cut. Therefore, the holding leads 12-2, 12-3 are located inside the resin sealing body.
第１図は従来のリードフレームを示す平面図、第２図は
そのｘ、−ｘ、’線に沿った断面図、第３図は従来のフ
レームを用いてペレット搭載、ワイヤーボンディングが
終了した状態を示す断面図、第４図は本発明の一実施例
を示す平面図、第５図。
第６図はそのｘ、−ｘ’線、ｘ、−ｘ、′線にそった断
面図、第７図は本発明によるリードフレームを用いた組
立中間品を示す断面図。
１・・・・・・フレームペレット搭載部、２・・・・・
・フレームステ、チリード、３・・・・・・ベレ、）、
４・・・・・・ペレ、トエ、ヂ、５・・・・・・フレー
ムペレット搭載部エッヂ、６・・・・・・ボンディング
ワイヤー、７・・・・・・ディンプル部、１０・・・・
・・小穴、１１・・・・・・樹脂封止境界線、１２・・
・・・・ペレット搭載部保持リード。
＝ ５−Figure 1 is a plan view of a conventional lead frame, Figure 2 is a sectional view taken along lines x, -x, and ', and Figure 3 is a conventional frame with pellet loading and wire bonding completed. FIG. 4 is a sectional view showing an embodiment of the present invention, and FIG. 5 is a plan view showing an embodiment of the present invention. FIG. 6 is a sectional view taken along lines x, -x' and x, -x, ', and FIG. 7 is a sectional view showing an assembly intermediate product using the lead frame according to the present invention. 1... Frame pellet loading section, 2...
・Frame Ste, Chirido, 3...Bere,),
4...Pelle, toe, ji, 5...Edge of frame pellet mounting part, 6...Bonding wire, 7...Dimple part, 10...・
...Small hole, 11...Resin sealing boundary line, 12...
...Pellet loading section holding lead. = 5-
Claims (1)
の電極を外部へ導出する複数のリード端子とを有し、該
複数のリードが封止容器の一つの面から導出され九シン
グル・インライン・パッケージ型の半導体装置において
、前記ペレット搭載部に２本以上の保持リードを設け、
該保持リードにディンプル加工することにより、前記ペ
レット搭載部と前記リード端子のボンディング部とに段
差を設けたことを特徴とする半導体装置。A single in-line package comprising a pellet mounting part on which a semiconductor element is mounted and a plurality of lead terminals for leading out the electrodes of the semiconductor element to the outside, the plurality of leads being led out from one surface of a sealed container. type of semiconductor device, two or more holding leads are provided in the pellet mounting part,
A semiconductor device characterized in that the holding lead is dimpled to provide a step between the pellet mounting portion and the bonding portion of the lead terminal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58164486A JPS6055647A (en) | 1983-09-07 | 1983-09-07 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58164486A JPS6055647A (en) | 1983-09-07 | 1983-09-07 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6055647A true JPS6055647A (en) | 1985-03-30 |
Family
ID=15794076
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58164486A Pending JPS6055647A (en) | 1983-09-07 | 1983-09-07 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6055647A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63177544A (en) * | 1987-01-19 | 1988-07-21 | Nippon Denso Co Ltd | Lead frame |
| JPS63213953A (en) * | 1987-03-02 | 1988-09-06 | Nec Corp | Sip type semiconductor device |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5391577A (en) * | 1977-01-21 | 1978-08-11 | Mitsubishi Electric Corp | Manufacture of semiconductor device of resinsealing type |
| JPS5735358A (en) * | 1980-08-13 | 1982-02-25 | Hitachi Ltd | Lead frame and semiconductor device using said frame |
| JPS57208166A (en) * | 1981-06-17 | 1982-12-21 | Mitsubishi Electric Corp | Lead frame for semiconductor device |
-
1983
- 1983-09-07 JP JP58164486A patent/JPS6055647A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5391577A (en) * | 1977-01-21 | 1978-08-11 | Mitsubishi Electric Corp | Manufacture of semiconductor device of resinsealing type |
| JPS5735358A (en) * | 1980-08-13 | 1982-02-25 | Hitachi Ltd | Lead frame and semiconductor device using said frame |
| JPS57208166A (en) * | 1981-06-17 | 1982-12-21 | Mitsubishi Electric Corp | Lead frame for semiconductor device |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63177544A (en) * | 1987-01-19 | 1988-07-21 | Nippon Denso Co Ltd | Lead frame |
| JPS63213953A (en) * | 1987-03-02 | 1988-09-06 | Nec Corp | Sip type semiconductor device |
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