JPS5916357A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS5916357A JPS5916357A JP57125432A JP12543282A JPS5916357A JP S5916357 A JPS5916357 A JP S5916357A JP 57125432 A JP57125432 A JP 57125432A JP 12543282 A JP12543282 A JP 12543282A JP S5916357 A JPS5916357 A JP S5916357A
- Authority
- JP
- Japan
- Prior art keywords
- island
- resin
- lead frame
- pellet
- parts
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49503—Lead-frames or other flat leads characterised by the die pad
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Abstract
Description
【発明の詳細な説明】
本発明は半導体装置に係シ、特に樹脂封止型半導体装置
のリードフレームの構造に関する1、半導体装置で樹脂
封止型のもの(以後モールド部品と称する)は通常素子
(以後ペレットと称する)を保持するための板状の金属
板(以後アイランドと称する)を有している。この型の
モールド部品の例を第1図に示す。第1図において外部
リード4およびアイランド2を含んで構成されるリード
フレームはこのアイランド2にペレット1が搭載されこ
のペレット1の電極と外部リード4とが各々ボンディン
グワイヤ3で接続された上で樹脂によって樹脂封止され
る。このような構造において、アイランド2の部分が薄
くなると半導体装置の信頼度が著しく低下する。この問
題は第2図に示す薄型(以後フラットパッケージと称す
る)構造において、特に顕著である1、このようカフラ
ケットパッケージの断面を第3図に示す1.第3図にお
いてアイランドの上下5.6の部分の樹脂はとくに薄い
ため、熱ストレスや水分に対する信頼性が低下するので
ある。−例としてフラットノζツケージのモールド部品
に対して、通常半導体部品に実施されるや件で温度サイ
クル試験を実施すると、第1図のようなディアル・イン
・ラインノζツケージ(以後DIPパッケージと称する
)と呼ばれる型のモールド部品が故障に到るよりも少い
サイクル数で故障に到る場合がある。これについて第3
図の5,6のようにとくに樹脂が薄い場所でペレットや
アイランドの外周に沿って樹脂が割れることが原因であ
ると言われている。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device, and in particular to the structure of a lead frame of a resin-sealed semiconductor device. It has a plate-shaped metal plate (hereinafter referred to as an island) for holding pellets (hereinafter referred to as a pellet). An example of this type of molded part is shown in FIG. In FIG. 1, the lead frame is composed of an external lead 4 and an island 2. A pellet 1 is mounted on the island 2, and the electrodes of the pellet 1 and the external lead 4 are connected with bonding wires 3. It is sealed with resin. In such a structure, if the island 2 becomes thin, the reliability of the semiconductor device will drop significantly. This problem is particularly noticeable in the thin (hereinafter referred to as flat package) structure shown in FIG. 1. A cross section of such a cuff racket package is shown in FIG. 3. In FIG. 3, the resin in the upper and lower portions of the island 5.6 is particularly thin, resulting in reduced reliability against heat stress and moisture. - For example, if a temperature cycle test is performed on a molded part of a flat-line ζ-cage, as is normally done for semiconductor parts, a dial-in-line ζ-cage (hereinafter referred to as a DIP package) as shown in Figure 1 will result. ) may fail in fewer cycles than molded parts of the type called . Regarding this, the third
It is said that the cause is that the resin cracks along the outer periphery of the pellet or island, especially in areas where the resin is thin, as shown in Figures 5 and 6.
本発明はかかる従来の欠点を解決した信頼度の高いモー
ルド部品を提供することを目的とする。It is an object of the present invention to provide a highly reliable molded component that solves these conventional drawbacks.
本発明の%循はモールド部品において素子が搭載される
部分の一部或いは数箇所を抜いた構造のアイランドを有
するリードフレームを用いたことである。A key feature of the present invention is the use of a lead frame having an island structure in which a part or several parts of the molded part on which the element is mounted are removed.
本発明によればアイランド内で抜き去った部分に樹脂が
充填されるので、アイランド面の樹脂の体積が増える。According to the present invention, the removed portion within the island is filled with resin, so the volume of the resin on the island surface increases.
従って、等測的にこの部分の樹脂が厚くなり熱ストレス
や水分等に強くなるので、高信頼度のモールド部品が得
られる。Therefore, the resin in this part is isometrically thicker and more resistant to heat stress, moisture, etc., and a highly reliable molded part can be obtained.
以下、本発明の実施例を図面を用いて説明する。Embodiments of the present invention will be described below with reference to the drawings.
第4図は本発明の一実施例の断面図、第5図はこのモー
ルド部品のリードフレームのアイランド部分の斜視図で
ある。第4図においてアイランド8と外部リード10で
リードフレームが構成される。FIG. 4 is a cross-sectional view of one embodiment of the present invention, and FIG. 5 is a perspective view of the island portion of the lead frame of this molded part. In FIG. 4, an island 8 and an external lead 10 constitute a lead frame.
リードフレームは、アイランド8上にペレット9が搭載
され、ペレットの電極(ポンディングパッド)と外部リ
ード10がポンディングワイヤで接続された上で樹脂封
止される。このような構成によれば、リードフレーム・
の穴の中まで樹脂が充填されるので熱ストレス、水分等
に強いパッケージとなる。In the lead frame, a pellet 9 is mounted on an island 8, and an electrode (ponding pad) of the pellet and an external lead 10 are connected with a bonding wire and then sealed with resin. According to such a configuration, the lead frame
Since the resin is filled into the holes, the package becomes resistant to heat stress, moisture, etc.
第1図は従来のデュアル・イン・ライン型パッケージの
概略図、第2図はフラットパッケージの斜視図、第3図
はフラットパッケージの断面図、第4図は本発明の構造
を有するフラットパッケージの断面図、第5図は本発明
のアイランド部の斜視図である。Figure 1 is a schematic diagram of a conventional dual-in-line package, Figure 2 is a perspective view of a flat package, Figure 3 is a sectional view of a flat package, and Figure 4 is a diagram of a flat package having the structure of the present invention. The sectional view and FIG. 5 are perspective views of the island portion of the present invention.
Claims (1)
素子を搭載または密着する部分の一部或いは数箇所を抜
いた構造のアイランドを有するリードフレームを用いた
ことを特徴とする半導体装置。1. A resin-sealed semiconductor device characterized by using a lead frame having an island having a structure in which a part or several parts of the lead frame on which an element is mounted or in close contact are removed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57125432A JPS5916357A (en) | 1982-07-19 | 1982-07-19 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57125432A JPS5916357A (en) | 1982-07-19 | 1982-07-19 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5916357A true JPS5916357A (en) | 1984-01-27 |
Family
ID=14909942
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57125432A Pending JPS5916357A (en) | 1982-07-19 | 1982-07-19 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5916357A (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63208261A (en) * | 1987-02-25 | 1988-08-29 | Hitachi Ltd | Semiconductor device |
JPS6439754A (en) * | 1987-08-05 | 1989-02-10 | Mitsubishi Electric Corp | Resin sealed semiconductor device |
US4884124A (en) * | 1986-08-19 | 1989-11-28 | Mitsubishi Denki Kabushiki Kaisha | Resin-encapsulated semiconductor device |
EP0345760A2 (en) * | 1988-06-08 | 1989-12-13 | STMicroelectronics S.r.l. | Semiconductor device in plastic case with means of anchoring between chip-bearing slice and plastic body |
US4910577A (en) * | 1987-08-10 | 1990-03-20 | Kabushiki Kaisha Toshiba | Lead frame |
JPH02290046A (en) * | 1989-01-10 | 1990-11-29 | Fujitsu Ltd | Integrated circuit device |
-
1982
- 1982-07-19 JP JP57125432A patent/JPS5916357A/en active Pending
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4884124A (en) * | 1986-08-19 | 1989-11-28 | Mitsubishi Denki Kabushiki Kaisha | Resin-encapsulated semiconductor device |
JPS63208261A (en) * | 1987-02-25 | 1988-08-29 | Hitachi Ltd | Semiconductor device |
JPS6439754A (en) * | 1987-08-05 | 1989-02-10 | Mitsubishi Electric Corp | Resin sealed semiconductor device |
US4910577A (en) * | 1987-08-10 | 1990-03-20 | Kabushiki Kaisha Toshiba | Lead frame |
EP0345760A2 (en) * | 1988-06-08 | 1989-12-13 | STMicroelectronics S.r.l. | Semiconductor device in plastic case with means of anchoring between chip-bearing slice and plastic body |
EP0345760A3 (en) * | 1988-06-08 | 1990-11-14 | STMicroelectronics S.r.l. | Semiconductor device in plastic case with means of anchoring between chip-bearing slice and plastic body |
JPH02290046A (en) * | 1989-01-10 | 1990-11-29 | Fujitsu Ltd | Integrated circuit device |
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