JPH0637221A - Resin sealing type semiconductor device - Google Patents
Resin sealing type semiconductor deviceInfo
- Publication number
- JPH0637221A JPH0637221A JP19034992A JP19034992A JPH0637221A JP H0637221 A JPH0637221 A JP H0637221A JP 19034992 A JP19034992 A JP 19034992A JP 19034992 A JP19034992 A JP 19034992A JP H0637221 A JPH0637221 A JP H0637221A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- semiconductor device
- semiconductor chip
- lead frame
- sealed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は小信号トランジスタに好
適する樹脂封止型半導体装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resin-sealed semiconductor device suitable for small signal transistors.
【０００２】[0002]
【従来の技術】近年、小信号トランジスタ等の半導体装
置は半導体チップを封止する封止用樹脂の特性向上によ
り樹脂封止パッケージが多く用いられるようになってい
る。2. Description of the Related Art In recent years, in semiconductor devices such as small signal transistors, resin-sealed packages have been widely used due to improvement in characteristics of a sealing resin for sealing a semiconductor chip.
【０００３】そして、上記樹脂封止パッケージとして
は、主としてエポキシ、シリコーン、フェノールなどの
樹脂が用いられ、モールド、ディッピングなどにより基
板またはリードフレームが樹脂封止される。As the resin-sealed package, a resin such as epoxy, silicone or phenol is mainly used, and the substrate or the lead frame is resin-sealed by molding, dipping or the like.
【０００４】図３は、上記したような従来例に係る半導
体装置の構成を示す図で、（ａ）はフラット部側より見
た図、（ｂ）は上面から見た断面図、（ｃ）は側面から
みた断面図を示したものである。3A and 3B are views showing the structure of a semiconductor device according to the above-mentioned conventional example. FIG. 3A is a view seen from the flat portion side, FIG. 3B is a cross-sectional view seen from the top, and FIG. Shows a cross-sectional view from the side.
【０００５】同図に示すように、従来の半導体装置にお
いては、銅合金あるいは鉄合金、又はアルミニウム合金
等により所定形状にプレス加工したリードフレーム１
（放熱板）上のプレス加工面側（抜きダレ側）５に、半
導体素子２を熱伝導性を持たせて取り付けて、該半導体
素子２の各電極とリードフレーム１のリード９をワイヤ
ボンディングにより接続する。As shown in FIG. 1, in the conventional semiconductor device, the lead frame 1 is pressed into a predetermined shape with a copper alloy, an iron alloy, an aluminum alloy or the like.
The semiconductor element 2 is attached to the pressed surface side (punching side) 5 on the (heat sink) with thermal conductivity, and each electrode of the semiconductor element 2 and the lead 9 of the lead frame 1 are wire-bonded. Connecting.
【０００６】次に、所定の半導体素子２が形成された半
導体チップの上面をエンキャップ材４によりコーティン
グする。そして、エポキシ樹脂８を用いてモールドし、
樹脂層を形成し封止し、更に、半導体装置部分と搬送板
部とを分離してリード９に半田付けした後、テスト、マ
ークして完成する。Next, the upper surface of the semiconductor chip on which the predetermined semiconductor element 2 is formed is coated with the encap material 4. Then, mold with epoxy resin 8,
A resin layer is formed and sealed, and the semiconductor device portion and the carrier plate portion are separated and soldered to the leads 9, and then tested and marked for completion.
【０００７】このように、従来例の半導体装置では半導
体チップ２は樹脂封止体の厚肉側（Ｒ側）になるように
樹脂封止を行っていた。つまり、リード表面に半田メッ
キ、半田ディップあるいは錫メッキ等を施して、リード
９をフレームより切断した後、テスト、マークを実施し
ていた。As described above, in the conventional semiconductor device, the semiconductor chip 2 is resin-sealed so as to be on the thick side (R side) of the resin sealing body. That is, after the lead 9 is cut from the frame by solder plating, solder dipping, tin plating or the like on the surface of the lead, the test and the mark are performed.
【０００８】[0008]
【発明が解決しようとする課題】しかし、上記したよう
な半導体装置は、信頼性評価の半田浸加熱及び熱衝撃
（高温と低温の繰り返し）試験において、チップクラッ
クが発生し、致命的不良を起こしていた。このような原
因は、樹脂層における内部応用力による影響を受けてし
まうことにある。However, in the semiconductor device as described above, in the solder immersion heating and the thermal shock (repetition of high temperature and low temperature) tests of reliability evaluation, chip cracks occur and cause a fatal failure. Was there. Such a cause is that it is affected by the internal application force in the resin layer.
【０００９】本発明は上記問題に鑑みてなされたもの
で、その第１の目的とするところは、所定形状にプレス
加工したリードフレームの打ち抜き方向の逆側、即ちバ
リのある側に半導体チップを設定することによりエンキ
ャップ材を不要とすることにより製造時間を短縮するこ
とにある。また、第２の目的とするところは、上記半導
体チップを樹脂封止部材の薄肉側に封止することにより
チップクラック不良を低減することにある。The present invention has been made in view of the above problems, and a first object thereof is to place a semiconductor chip on the side opposite to the punching direction of a lead frame pressed into a predetermined shape, that is, on the side having a burr. The purpose is to shorten the manufacturing time by eliminating the need for an encap material. A second object is to reduce chip crack defects by sealing the semiconductor chip on the thin side of the resin sealing member.
【００１０】[0010]
【課題を解決するための手段】上記目的を達成するため
に、本発明の第１の態様による樹脂封止型半導体装置
は、所定形状にプレス加工された放熱部及びリード部を
有するリードフレームと、上記リードフレームにおける
放熱部の打ち抜き方向の逆側でバリのある側に取着され
る半導体チップと、上記半導体チップ及びリードフレー
ムの放熱部とを一体に封止する樹脂封止部材とを具備す
ることを特徴とする。In order to achieve the above object, a resin-encapsulated semiconductor device according to a first aspect of the present invention includes a lead frame having a heat radiating portion and a lead portion which are pressed into a predetermined shape. A semiconductor chip attached to the side of the lead frame opposite to the punching direction of the heat radiating portion and having a burr, and a resin sealing member for integrally sealing the semiconductor chip and the heat radiating portion of the lead frame. It is characterized by doing.
【００１１】また、第２の態様による樹脂封止型半導体
装置は、上記半導体チップを、樹脂封止部材の上記放熱
部の打ち抜き方向を覆う樹脂層に比べて薄い樹脂層で覆
われる薄肉側に封止することを特徴とする。In the resin-encapsulated semiconductor device according to the second aspect, the semiconductor chip is provided on a thin side covered with a resin layer thinner than a resin layer covering the punching direction of the heat dissipation portion of the resin encapsulation member. It is characterized by sealing.
【００１２】[0012]
【作用】即ち、本発明の第１の態様による樹脂封止型半
導体装置では、半導体チップが所定形状にプレス加工し
た放熱板の打ち抜き方法の逆側、即ちバリのある側に設
定される。That is, in the resin-encapsulated semiconductor device according to the first aspect of the present invention, the semiconductor chip is set on the side opposite to the punching method of the heat radiating plate pressed into a predetermined shape, that is, on the side having burrs.
【００１３】また、第２の態様による樹脂封止型半導体
装置では、上記半導体チップが、樹脂封止部材の上記放
熱部の打ち抜き方向を覆う樹脂層に比べて薄い樹脂層で
覆われる薄肉側に封止される。Further, in the resin-sealed semiconductor device according to the second aspect, the semiconductor chip is on the thin side covered with a resin layer thinner than the resin layer covering the punching direction of the heat dissipation portion of the resin sealing member. It is sealed.
【００１４】[0014]
【実施例】図１は、本発明の実施例に係る樹脂封止型半
導体装置の構成を示す図で（ａ）はフラット部側より見
た図、（ｂ）は上面から見た断面図、（ｃ）は側面から
みた断面図を示したものである。1A and 1B are views showing the structure of a resin-encapsulated semiconductor device according to an embodiment of the present invention, in which FIG. 1A is a view seen from a flat portion side, and FIG. 1B is a cross-sectional view seen from an upper surface. (C) is a sectional view as seen from the side.
【００１５】同図に示すように、本実施例の樹脂封止型
半導体装置は、まず、銅合金あるいは鉄合金、アルミニ
ウム合金等により所定形状にプレス加工したリードフレ
ーム１のプレス打抜き加工したバリ面側５が上になるよ
うに配置し、半導体チップ２をダイボンディングすると
共にワイヤボンディングする。As shown in FIG. 1, in the resin-sealed semiconductor device of this embodiment, first, the lead frame 1 is press-punched into a predetermined shape with a copper alloy, an iron alloy, an aluminum alloy or the like. The side 5 is arranged so that the semiconductor chip 2 is die-bonded and wire-bonded.
【００１６】次に、エポキシ樹脂８等による樹脂モール
ド層を形成するが、この時に、半導体チップ２は、モー
ルド内の薄肉側（フラット形状側）７、即ちリードフレ
ーム１のバリ面側６に配置し、樹脂封止する。Next, a resin mold layer of epoxy resin 8 or the like is formed. At this time, the semiconductor chip 2 is arranged on the thin side (flat shape side) 7 in the mold, that is, on the burr surface side 6 of the lead frame 1. And then resin seal.
【００１７】尚、図２は上記リードフレーム１に半導体
チップ２をダイボンディング及びワイヤボンディングし
た様子を示す図であり、同図に示すように半導体チップ
２はボンディングワイヤー３によりボンディングされて
いる。FIG. 2 is a view showing a state in which the semiconductor chip 2 is die-bonded and wire-bonded to the lead frame 1, and the semiconductor chip 2 is bonded by a bonding wire 3 as shown in the figure.
【００１８】本実施例は樹脂封止部材における内部応用
力に起因する不良を低減することに着目して発明された
ものである。そして、上記不良を低減するために、リー
ドフレーム１を所定形状にプレス加工する際に打ち抜き
方向の逆側にできるバリ１０を有効に利用している。即
ち、上記リードフレーム１のバリ面側６に半導体チップ
２を配置することにより上記内部応用力に起因する不良
を低減し、上記半導体チップ２を樹脂封止部材８の薄肉
側に配置することにより、従来の半導体装置において用
いられていたエンキャップ材を不要とすることで製造時
間を短縮し、さらにチップクラック不良をも低減してい
る。The present embodiment was invented with a focus on reducing defects due to internal application force in the resin sealing member. Then, in order to reduce the above defects, when the lead frame 1 is pressed into a predetermined shape, the burr 10 which is formed on the opposite side of the punching direction is effectively used. That is, by arranging the semiconductor chip 2 on the burr surface side 6 of the lead frame 1, defects caused by the internal application force are reduced, and by arranging the semiconductor chip 2 on the thin side of the resin sealing member 8. By eliminating the need for the encapsulating material used in the conventional semiconductor device, the manufacturing time is shortened and the chip crack defect is also reduced.
【００１９】以下、このチップクラック不良に関する実
験結果について、表１乃至表２を参照して説明する。
尚、表１、表２において、Ａは本発明の樹脂封止型半導
体装置、Ｂは従来の半導体装置による試験結果をそれぞ
れ示している。The experimental results regarding the chip crack defect will be described below with reference to Tables 1 and 2.
In Tables 1 and 2, A indicates the test result by the resin-sealed semiconductor device of the present invention, and B indicates the test result by the conventional semiconductor device.
【００２０】まず、表１は本発明の樹脂封止型半導体装
置と従来の半導体装置につき半田浸加熱（半田条件；３
５０度・１０秒間）を試験した結果（チップクラック発
生数／試験数）を示したものである。First, Table 1 shows the resin-encapsulated semiconductor device of the present invention and the conventional semiconductor device by solder immersion heating (solder condition: 3
The results (number of chip cracks generated / number of tests) tested at 50 degrees for 10 seconds are shown.
【００２１】[0021]
【表１】 [Table 1]
【００２２】そして表２は熱衝撃試験、低温−５５度
（３０分）、高温１５０度（３０分）を１サイクルとし
て１０００サイクル試験した結果（チップクラック発生
数／試験数）を示したものである。Table 2 shows the results (number of chip cracks / number of tests) of 1000 cycles of a thermal shock test, a low temperature of −55 degrees (30 minutes) and a high temperature of 150 degrees (30 minutes) as one cycle. is there.
【００２３】[0023]
【表２】 上記表１、表２にも示したように、本実施例の樹脂封止
型半導体装置はテスト工程で主に内部応用力に起因する
不良が低減し、歩留が２〜５％向上した。[Table 2] As shown in Table 1 and Table 2 above, in the resin-sealed semiconductor device of this example, defects caused mainly by internal application power were reduced in the test process, and the yield was improved by 2 to 5%.
【００２４】以上詳述したように、本発明の樹脂封止型
半導体装置はフレームのプレス方向と逆側方向、すなわ
ち抜きバリが発生している側に半導体チップ２をダイマ
ウントし、該ダイマウントされた半導体チップ２をモー
ルド体の薄肉部にもってくるので、バリの有効利用及び
エンキャップ材の廃止の最適な組合せにより、成型品の
内部応力が緩和され、エンキャップ材を有していなくて
も半田ディップ時及び熱衝撃試験におけるチップクラッ
ク不良を防止できる。更に、従来技術ではエンキャップ
材を施していたが、本発明ではエンキャップ材が廃止で
きるため、製造時間短縮化の効果も大である。As described above in detail, in the resin-sealed semiconductor device of the present invention, the semiconductor chip 2 is die-mounted on the side opposite to the pressing direction of the frame, that is, on the side where the punching burr is generated. Since the semiconductor chip 2 is brought to the thin portion of the molded body, the internal stress of the molded product is relieved by the optimal combination of effective use of burrs and elimination of the encap material, and the encap material is not used. Also, chip crack defects can be prevented during solder dipping and in thermal shock tests. Further, although the encapsulation material is applied in the conventional technique, the encapsulation material can be omitted in the present invention, and therefore the effect of shortening the manufacturing time is also great.
【００２５】[0025]
【発明の効果】本発明によれば、ワイヤボンディング後
のエンキャップ材を不要とすることにより製造時間を短
縮できると共に、チップクラック不良を低減した高信頼
性の樹脂封止型半導体装置を提供することができる。According to the present invention, a highly reliable resin-encapsulated semiconductor device which can shorten the manufacturing time by eliminating the need for an encapping material after wire bonding and reduce chip crack defects is provided. be able to.
【図１】本発明の実施例に係る樹脂封止型半導体装置の
構成を示す図で、（ａ）はフラット部側より見た平面
図、（ｂ）は上面から見た断面図、（ｃ）は側面からみ
た断面図を示す。1A and 1B are views showing a configuration of a resin-encapsulated semiconductor device according to an embodiment of the present invention, in which FIG. 1A is a plan view seen from a flat portion side, FIG. 1B is a cross-sectional view seen from an upper surface, and FIG. ) Indicates a cross-sectional view seen from the side.
【図２】リードフレームに半導体チップ２をダイボンデ
ィング及びワイヤボンディングした図を示す。FIG. 2 shows a die-bonded and wire-bonded semiconductor chip 2 on a lead frame.
【図３】従来例の半導体装置の構成を示す図で、（ａ）
はフラット部側より見た平面図、（ｂ）は上面から見た
断面図、（ｃ）は側面からみた断面図を示す。FIG. 3 is a diagram showing a configuration of a semiconductor device of a conventional example, (a)
Shows a plan view seen from the flat portion side, (b) shows a cross-sectional view seen from the top, and (c) shows a cross-sectional view seen from the side.
１…フレーム、２…半導体チップ、３…ボンディングワ
イヤー、４…エンキャップ材、５…フレーム打抜き側
（ダレ面）、６…フレーム打抜き方向の逆側（バリ
面）、７…樹脂封止部材の薄肉側（フラット形状側）、
８…エポキシ樹脂、９…リード、１０…バリ。DESCRIPTION OF SYMBOLS 1 ... Frame, 2 ... Semiconductor chip, 3 ... Bonding wire, 4 ... Encap material, 5 ... Frame punching side (dull surface), 6 ... Reverse side of frame punching direction (burr surface), 7 ... Resin sealing member Thin side (flat side),
8 ... Epoxy resin, 9 ... Lead, 10 ... Burr.
Claims (2)
リード部を有するリードフレームと、 上記リードフレームにおける放熱部の打ち抜き方向の逆
側でバリのある側に取着される半導体チップと、 上記半導体チップ及びリードフレームの放熱部とを一体
に封止する樹脂封止部材と、 を具備することを特徴とする樹脂封止型半導体装置。1. A lead frame having a heat radiating portion and a lead portion, which are pressed into a predetermined shape, and a semiconductor chip attached to the side opposite to the punching direction of the heat radiating portion of the lead frame and having a burr, A resin-sealed semiconductor device, comprising: a resin sealing member that integrally seals a semiconductor chip and a heat dissipation portion of a lead frame.
記放熱部の打ち抜き方向を覆う樹脂層に比べて薄い樹脂
層で覆われる薄肉側に封止することを特徴とする請求項
１に記載の樹脂封止型半導体装置。2. The semiconductor chip is sealed on a thin side covered with a resin layer which is thinner than a resin layer covering the punching direction of the heat radiating portion of the resin sealing member. Resin-sealed semiconductor device of.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19034992A JPH0637221A (en) | 1992-07-17 | 1992-07-17 | Resin sealing type semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19034992A JPH0637221A (en) | 1992-07-17 | 1992-07-17 | Resin sealing type semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0637221A true JPH0637221A (en) | 1994-02-10 |
Family
ID=16256721
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19034992A Pending JPH0637221A (en) | 1992-07-17 | 1992-07-17 | Resin sealing type semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0637221A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007158229A (en) * | 2005-12-08 | 2007-06-21 | Sharp Corp | Lead frame and semiconductor device |
| JP2008511479A (en) * | 2004-08-31 | 2008-04-17 | フリト−レイ ノース アメリカ インコーポレイテッド | Sheet forming apparatus having non-contact type roller end |
| WO2018012281A1 (en) * | 2016-07-14 | 2018-01-18 | 住友電気工業株式会社 | Semiconductor device |
-
1992
- 1992-07-17 JP JP19034992A patent/JPH0637221A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008511479A (en) * | 2004-08-31 | 2008-04-17 | フリト−レイ ノース アメリカ インコーポレイテッド | Sheet forming apparatus having non-contact type roller end |
| JP4734332B2 (en) * | 2004-08-31 | 2011-07-27 | フリト−レイ ノース アメリカ インコーポレイテッド | Sheet forming apparatus having non-contact type roller end |
| JP2007158229A (en) * | 2005-12-08 | 2007-06-21 | Sharp Corp | Lead frame and semiconductor device |
| WO2018012281A1 (en) * | 2016-07-14 | 2018-01-18 | 住友電気工業株式会社 | Semiconductor device |
| US10672687B2 (en) | 2016-07-14 | 2020-06-02 | Sumitomo Electric Industries, Ltd. | Semiconductor device |
| US10854535B2 (en) | 2016-07-14 | 2020-12-01 | Sumitomo Electric Industries, Ltd. | Semiconductor device |
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