JP2511023B2 - Bidirectional thyristor - Google Patents

Description

The present invention relates to a bidirectional thyristor (hereinafter referred to as a triac), and more particularly to improving gate sensitivity in four modes of a triac. It is a thing.

(Prior Art) A triac is a thyristor having a characteristic of bidirectional switching, has two main electrodes and one gate electrode, and is used for AC power control. That is, the triac can switch from the off state to the on state by giving a positive or negative gate trigger signal for each of the positive and negative bidirectional voltages (AC) applied to the two main electrodes. 3 terminal semiconductor device. Therefore, the triac has four types of gate trigger modes, and the trigger current (hereinafter referred to as I _GT ) of each mode is desired to have high sensitivity, that is, to have a small I _GT and have the same I _GT value.

How general, to the high sensitivity triac I _GT, the base surface concentration between the gate portion and the T ₁ side emitter section to lower, when the I _GT flows, to reduce the reactive current which passes through the vicinity of the surface There is. FIG. 3 is a sectional view for explaining this conventional triac. In FIG. 3A, impurities are diffused from both sides of the N-type semiconductor substrate 1 to form a T ₂ side P base layer 2 and a T ₁ side P base layer 3, and impurities are selectively diffused into both P base layers. N emitter layer 4, N emitter layer
5a and a gate / emitter layer 5b are formed. In FIG. 3B, the thermal oxide film 6 is left on the P base layer between the gate emitter layer 5b and the N emitter layer 5a. Next, in FIG. 7C, a high concentration P layer 7 is attached to increase the surface concentration of the P base layers 2 and 3. At this time, the portion protected by the thermal oxide film has a low surface concentration. Next, the oxide film 10, the T ₂ side main electrode 11 of the ohmic contact, the T ₁ side main electrode 12 and the gate electrode
Form 13.

The four types of I _GT are based on the potential of the T ₁ side main electrode 12, I when the T ₂ side main electrode 11 is a positive potential, III when the T ₂ side main electrode 11 is a negative potential, and positive when the potential of the gate electrode 13 is positive. when that mark the symbol on the right shoulder, I ^+, I ^- - when the +, when the negative, II
I ^+, III ^- expressed by. In the conventional triac shown in FIG. 3 where the surface concentration of the P base layer on the T ₁ side is partially lowered, I _GT has extremely high sensitivity in three modes of I ⁺ , I ⁻ , and III ⁻ among the four modes. However, III ⁺ has an I _{GT that} is 5 to 7 times that of the other modes, resulting in an unbalanced characteristic.

On the other hand, there is a method in which the base concentration of each of the T ₂ -side P base layer and the T ₁ -side P base layer is lowered and diffused to improve the entire injection efficiency between the base and the emitter. I ⁺ balance of I _GT in this case, I ^-, III ^- 1 in three modes and III ⁺ mode: 2
Although it is good, there is a drawback that I _GT becomes large as a whole.

(Problems to be solved by the invention) Some triacs used for AC control have high sensitivity in the I _GT and can control four modes of I ⁺ , I ⁻ , III ⁺ , and III ⁻ under the same conditions. desirable. As described above, the prior art has high sensitivity in the three modes of I ⁺ , I ⁻ , and III ⁻ , but III ⁺
In the mode, the I _GT is 5 to 7 times that of the other modes, resulting in an unbalanced characteristic. In other conventional technologies, the I _GT has a good balance, but the I _GT is large overall and it is difficult to control it. There is a problem.

It is an object of the present invention to provide a triac having improved gate sensitivity, good balance of four gate trigger modes, and gate control of the four modes under similar conditions.

[Structure of the Invention] (Means for Solving Problems and Actions Thereof) The present invention provides a first diffusion layer (T ₁ side P base layer) exposed on the main surface in a bidirectional thyristor, that is, a triac.
And surface concentration of, in the different concentrations and surface concentration of the second diffusion layer exposed (T ₂ side P base layer) on the main surface, I _GT
It is a triac that has high sensitivity and maintains good balance of 4 mode I _GT .

For example, in the present invention, after the P base layer and the N emitter layer are formed, the oxide film on the surface of the substrate that has grown between them is peeled off, and then a high concentration P layer is formed on the T ₁ side and the T ₂ side to the extent that ohmic contact properties are not impaired. The I _GTs are made to adhere to each other to have a high sensitivity, and the surface concentrations of the P base layers on the T ₁ side and the T ₂ side are set to different appropriate values from each other to adjust the I _GT balance.

(Embodiment) FIG. 1 is a sectional view of a triac according to an embodiment of the present invention. A one conductivity type semiconductor substrate (N type semiconductor substrate) 1, a first conductivity type diffusion layer (T ₁ side P base layer) 3 formed on the main surface of the substrate 1 on the T ₁ side (the lower side of the drawing), A second diffusion layer of opposite conductivity type (T ₂ side P base layer) 2 formed on the main surface of the substrate on the T ₂ side, and a _first conductivity type first layer selectively formed on the T ₁ side P base layer 3. Emitter diffusion layer (T ₁ side N emitter layer) 5a
And one conductivity type gate / emitter diffusion layer (N gate / emitter tank) 5b, and one conductivity type second emitter diffusion layer (T ₂ side N emitter layer) 4 selectively formed on the T ₂ side P base layer 2. And are formed. FIG. 2 is a cross-sectional view for explaining the manufacturing process. In FIG. 2A, the P base layer and the N emitter layer are formed by diffusion as described above, and the thermal oxide film grown on the surface of the silicon substrate is removed therebetween. After that, a P high-concentration layer 8 is formed on the P base layer 3 on the T ₁ side to such an extent that the ohmic contact property is not impaired, for example, the surface concentration is about 1 × 10 ¹⁸ (cm ⁻³ ) or more. The surface concentration of P layer at 1055 ℃ × 2Hr is about 1 × 10 ¹⁸
(Cm ^-3 ). Next, as shown in FIG. 2 (b), the T ₂ side P
On the base layer 2, for example, a P high concentration layer 9 having a surface concentration of about 5 × 10 ¹⁸ (cm ⁻³ ) is formed. A high-concentration layer is deposited at 1055 ℃ × 50Hr, but the P layer surface concentration at that time is about 5 × 10
^{It is 18} (cm ^-3 ).

Thereafter, as shown in FIG. 1, a surface protection film 10 is formed on the field oxide film by CVD or the like to form an opening for an electrode contact, and then a T ₁ side main electrode 12 of the ohmic contact is formed by a vapor deposition method or the like. The T ₂ -side main electrode 11 and the gate electrode 13 are formed.

In triac this embodiment, the ratio of I _GT in the four trigger modes ^{I +: I -: III +} : III - = 1: 1: 2: 1 and well-balanced, and T ₁ side P base layer, T ₂ Although the number of steps is increased by one compared with the case where the P layers are formed at a high concentration of about 1 × 10 ¹⁸ (cm ⁻³ ) on both sides of the side P base layer, I _GT can be reduced to 1/2.

In this embodiment, the surface concentration of the P base layer on the T ₁ side is set to T ₂
Although a lower concentration than the surface density of the side P base layer desired result is obtained, the surface concentration of the desired T ₁ side P base layer T ₂
It is also possible to make the concentration higher from the side and increase the sensitivity of the I _GT and adjust the balance.

[Advantages of the Invention] The triac of the present invention has good gate sensitivity, improved gate trigger mode and balance, and can control gates in four modes under the same conditions.

According to the conventional technique shown in FIG. 3, I ⁺ , I ⁻ , III ⁺ , III ⁻ of I _GT.
The ratio of the values is 1: 1: (5-7): 1 and the balance is poor.
Since the P ⁺ high-concentration layer is partially deposited, the oxide film must be selectively opened before the deposition, which has the disadvantage of lengthening the process. In other conventional techniques, the concentration of the base region on each of the T ₁ side and T ₂ side is lowered to increase the injection efficiency between the base and the emitter.
While the balance of I _GT becomes ^{good, I +, I -, III} +, III - can be difficult to control the value of I _GT in each mode. With the triac of the present invention, it is possible to solve the above-mentioned problems of the prior art and obtain an I _GT with good balance and high sensitivity.

[Brief description of drawings]

FIG. 1 is a sectional view of a triac of the present invention, FIG. 2 is a sectional view showing a manufacturing process of a triac of the present invention, and FIG. 3 is a sectional view showing a conventional triac and its manufacturing process. 1 ... One conductivity type semiconductor substrate (N type semiconductor substrate), 2 ...
Opposite conductivity type second diffusion layer (T ₂ side P base layer), 3 ... Opposite conductivity type first diffusion layer (T ₁ side P base layer), 4 ... One conductivity type second emitter diffusion layer (T ₂ side) N emitter layer), 5a ... One conductivity type first emitter diffusion layer (T ₁ side N emitter layer), 5b ...
One conductivity type gate / emitter diffusion layer (N gate / emitter layer), 8 ... T ₁ side P high concentration layer, 9 ... T ₂ side P high concentration layer.

Claims (2)

(57) [Claims] 1. A semiconductor substrate of one conductivity type, a first diffusion layer of opposite conductivity type and a second diffusion layer of opposite conductivity type respectively formed on both main surfaces of the substrate, and a main surface of the first diffusion layer. A first conductivity type first emitter diffusion layer and a first conductivity type gate / emitter diffusion layer, and a first conductivity type second emitter diffusion layer selectively formed on the main surface of the second diffusion layer. The bidirectional thyristor characterized in that the surface concentration of the first diffusion layer exposed on the main surface and the surface concentration of the second diffusion layer exposed on the main surface are different from each other. 2. The bidirectional thyristor according to claim 1, wherein the surface concentration of the second diffusion layer exposed on the main surface is higher than the surface concentration of the first diffusion layer exposed on the main surface. .