JPS5866367A - Semiconductor rectifier and preparation thereof - Google Patents

Abstract

PURPOSE:To make characteristics free from contamination at the side of a semiconductor element by forming the semiconductor region on the side of semiconductor layer forming the P-N junction so that this P-N junction is not exposed. CONSTITUTION:A P-N junction J is formed on an N<+> type conductivity type semiconductor layer 1 through the growth of P<-> type semiconductor layer 2 thereon. An insulating film 7 is formed uniformly on the layer 2. Then, as shown in the figure by the broken line, after removing the film 7 of the interface for respectively isolating individual elements, the semiconductor layer is removed until it reaches the junction J and a groove 8 is thus formed. Thereafter, plurality of windows 9 are selectively formed on the film 7 leaving the desired region of the film 7 in order to form an N++ type region 4. With the film 7 used as the mask, N conductivity type impurity is diffused from the groove 8 and a window 9 in order to form the N<++> type region 10 along the groove 8 and the region 4 is selectively formed. Thereafter, a metal material 5 is formed in order to short-circuit the regions 3 and 4.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a second semiconductor layer having a low impurity level at the conductive position opposite to this layer on the tenth semiconductor layer made of the first L11. The present invention relates to a semiconductor rectifier device formed with a axial semiconductor layer and capable of high-speed operation with low loss, and a method for manufacturing the same.

As shown in FIG. 1, conventional semiconductor devices of this type include:
A 20th conductor layer 2t of P conductivity type having a lower impurity concentration than the impurity concentration of the semiconductor layer is formed on the 10th conductor layer 1 of N conductivity type, and then this 20th conductor layer 1 is formed. 2, the 20th conductor layer 2 has opposite conductors with a higher degree of impurity a than the 20th conductor layer 2, such as in a mosaic pattern! A P conductivity type region 5 and an N conductivity type region 4 are formed, and a metal electrode 5 is formed on the inner main surface of these semiconductor layers.
There is also a good one with 6 and 6 formed into an ivy.

In a semiconductor device having such a structure, the semiconductor layer 2 and the first
Although there is a potential barrier φ between the semiconductor layer 2 and the first region 5 that makes the first region 3 a high level with respect to the semiconductor layer 2 due to the difference in impurity concentration with the 0-region S, , this potential barrier does not act as a barrier against holes, which are majority carriers, supplied from the electrode 5 side to the second semiconductor layer 2,
Therefore, regarding the second region 4, there exists a potential barrier that makes the semiconductor layer 2 at a high level with respect to the second region 4, which is generated based on the difference in impurity concentration and the mutually opposite conductivity types. However, this potential barrier is caused by the second semiconductor layer 2
The second region 4 does not substantially act as a barrier to the electrons, which are minority carriers, injected into the second region *4 from the second region *4, and therefore the second region 4 acts to absorb minority carriers from the second semiconductor layer 2. I do.

According to the above, it is possible to provide an electrode structure that does not form a barrier for both majority carriers and minority carriers, so forward drop can be reduced, and the accumulation effect of minority carriers is reduced, so reverse recovery can be improved. This has the effect of reducing time.

However, although the semiconductor device having such a structure has the above-mentioned important effects, the P formed by the semiconductor layers 1 and 2
- Since the edge J' of the Ni 1 joint J is exposed to the a-plane SK of the semiconductor element, it is easily susceptible to negative effects such as dirt that adheres to the semiconductor element, causing the semiconductor device to deteriorate or become unstable than its initial characteristics. Sometimes it stops working. %, compared to a normal semiconductor device, the electrode material consisting of regions 3 and 4 tends to be expensive because the number of unnecessary electrodes for forming the semiconductor region increases.

Therefore, the present invention proposes a semiconductor rectifier device having a structure that eliminates the above-mentioned drawbacks of semiconductor devices, and a method for manufacturing the same.

Below, various examples of the present invention will be explained according to the drawings.

First, an embodiment of the present invention will be explained with reference to FIGS. 2(A) to 2(D).
The impurity concentration lower than that of the first semiconductor layer 1, for example, 1×1015·crR−3, is grown on the tenth semiconductor layer 1 of the N conductivity type, which has an impurity ski varying by about 1!3 crn−3, by a normal epitaxial growth method. A P conductivity type '3+2 semiconductor layer 2 with about 20 degrees of impurity is grown to form P
-N junction J is formed. Next, a first region 3 with a higher impurity concentration than that of the 20th semiconductor layer 2, for example, about 5×1018·Crn-3, is formed in the second semiconductor layer 2 by a normal impurity diffusion method. It is selectively formed to a thickness of approximately μm. After that, as shown in Figure 2 (B), 1000tZ
Thermal oxidation treatment is performed in an atmosphere of nitrogen and oxygen as described above to uniformly form an insulating coating [7] on at least the semiconductor layer 2. Next, as shown by the chain lines in Figure (B), after removing the insulating film in the area that separates the individual elements by normal etching, another etching process is performed to at least approximately
The semiconductor layer is etched away until the -N junction JK is reached, forming #8 as shown in FIG. Furthermore, an insulating coating is formed on the ninth region forming a region corresponding to region 4 in FIG.
A plurality of windows 9 are selectively formed in the insulating film 7 by etching and removing only the desired portions of the insulating film 7.

Thereafter, using the insulating film 7 as a diffusion mask, impurities of the same conductivity type as the first half and the conductor layer 1 are diffused from the groove 8 and the insulating film 70 - window 9 to form a high impurity concentration.
For example, a region 10 of 1XIQ -cd-3@ is formed along the groove 8 and N conductive Wi is formed.

The fang 20 region 4 is selectively formed at the same time. This area 1G
And the depth of the second region 4 is from 1 to several 1 [In particular, the depth of the second region 4 is compared to the depth of the 10th region sO,
When forming the 20th regions 4 and 10 of high impurity concentration ON conductivity type, in which the depletion layer O is preferably wide and shallow,
At the same time, it is also possible to form the N++tm to region 1' by doping the main IjKi1611[o impurity of the 10th semiconductor layer 1. A connecting metal member 5 is formed in the area S, 4 and an omitter Km. By forming a highly impurity region of the same conductivity type as the first semiconductor layer 1 on the surface of the semiconductor element where the P-Nlii junction edge is exposed by the method described above, the P-N junction edge is substantially The edge J' becomes the groove K existing on the semiconductor surface under the insulating film 7, and therefore, the characteristics of the semiconductor device obtained using this manufacturing method are not affected even by contamination of the semiconductor element 1iIWJ. With an electrode that provides a stable, low-loss, high-speed semiconductor device structure, it is possible to simultaneously form a region 1o and further a region 1' on the 4II- which forms the region 4 of the conductor region. The manufacturing process can be simplified. Grooves are prepared in advance at the point where each semiconductor element is to be cut, and impurities are doped using the grooves, so a uniform thin region can be formed in the mena of the semiconductor element in a single time, resulting in low loss and high speed. The mass production of semiconductor devices with stable characteristics can be improved without reducing the effects that should originally be obtained. , the insulating film 7 is formed in advance on the second semiconductor layer 2 which is laminated on the semiconductor layer 1 of the fang 1 in the same way as the *male side, and the P4 electrode is passed through the window selectively formed at a predetermined portion of the insulating film 7. A first region 5f is formed by doping type impurities. Thereafter, a groove 8 is formed as shown in FIG.
'4 where the entire main surface on which is formed is covered with an insulating coating M7.
The semiconductor surface facing the groove 8 at the cliff is doped with N conductivity type impurities in the same manner as in the previous embodiment to form several regions 10 of high impurity Ak at N++ positions along the S plane. At this time, the first
By forming the semiconductor layer 1KN++ region 1, there is no need to separately form a metal electrode (not shown), a highly impurity aFIIj#fIIL region for obtaining a very good ohmic contact, and the process can be simplified. .

After that, as shown in the same figure (C), the chain ml of the insulating coating 7 is
The B component was removed by photoetching, and the semiconductor surface was
As shown in FIG. 3D, a metal layer 11 of four materials, for example, a metal layer 11 of 2,000 μm, is formed on the gold plate to form a Schottky junction with the P semiconductor layer 2.

A silicon layer 1 formed by this semiconductor layer 2 and metal layer 11
A junction (based on chromium silicide) is formed and the round value region 12 acts similarly to the second region 4 in the 6m embodiment, and the semiconductor rectifier is in a conductive state 1iK.
In some cases, this second region 12 and the second semiconductor layer 2 also effectively collect electrons, which are minority carriers.

In this example, a groove is provided in the cut portion of each semiconductor element, and impurities are doped using the #groove, so that a uniform thin region can be formed on the W surface of the semiconductor element in a short time. Therefore, since the diffusion of the first region 5 formed in advance is not progressed, the characteristics of dirt on the side surface of the semiconductor element can be improved without deteriorating the characteristics that should be obtained, including low speed loss and high speed. It is possible to improve the mass production of semiconductor rectifiers with characteristics of stability 1 without being affected. As stated above, according to the present invention, the forward drop is small, the reverse recovery characteristics are good, and there is no problem with dirt on the adhesive surface. It will be understood that it is possible to mass-produce semiconductor rectifiers that are not susceptible to the effects of this phenomenon using a relatively simple manufacturing process.

In the above embodiments, various changes may be made without departing from the spirit of the present invention, such as reversing the conductivity type, changing the impurity concentration, or changing the order of the steps. Probably.

[Brief explanation of drawings]

FIG. 3 is a diagram for explaining a different embodiment of the pregnancy invention. 1... First semiconductor layer 2... Second semiconductor layer 5
...10th area 4, 12...2nd area 7
... Insulating film 8 ... Groove 10 ... Semiconductor region 11 ..., Metal layer Origin Electric Co., Ltd. Patent applicant Nippon Telegraph and Telephone Public Corporation Figure 2 `` 3 Figure procedure correction method (Showa 57) January 18th, 2016, Mr. Commissioner of the Japan Patent Office 1. Indication of the case: Patent Application No. 165280 of 1982 2. Title of the invention: Semiconductor rectifier device and its manufacturing method 3
, Relationship with the case of the person making the amendment Address of the applicant for a fortification permit (representative applicant)
1-18-1-4 Takada, Toshima-ku, Tokyo Date of amendment order February 23, 1980 (shipment date) s, m Correct to Subject Column 6 of "Brief explanation of drawings" of the specification, Amendment Content

Claims (1)

[Claims] (1) A first semiconductor layer having a first conductivity type and a tenth conductivity type having a lower impurity concentration than the tenth semiconductor layer forming a P-N junction with the tenth semiconductor layer are opposite to each other. a second semiconductor layer of a second conductivity type, a nine-stop film formed on a portion of the semiconductor layer #f2, and a majority carrier film formed on the semiconductor layer #22 and transferred to the semiconductor layer marked with the circle symbol 2. A first region that acts to supply a ferromagnetic acid, a second region that acts to absorb a small amount of rays from the second semiconductor layer, and uniformly short-circuit the first region and the O♦ region. Is it a semiconductor device equipped with a gold S member that can be made of metal? Then, a semiconductor region 1 of a first conductivity type is formed on the side surface extending to the first and second semiconductors 1711, which has a high impurity loss, high impurity loss, and brightness that does not exhibit as much as 411 at least 411 FF1P-N combined edges. A semiconductor rectifier with a characteristic of 9%. ■ A first semiconductor layer having a lower impurity concentration on the first semiconductor layer or layer having the first conductivity type than the first semiconductor layer.
forming a second semiconductor layer of conductivity type; forming an insulating film on the second semiconductor layer; a step of removing the film and a portion of the semiconductor layer of the fang 2; and a step of removing the film and a portion of the semiconductor layer of the fang 2, and using the insulating film as a mask to remove the P-
The impurity of the first conductivity type having a higher impurity concentration than the second semiconductor layer is diffused from the side surface where the N junction edge is exposed, thereby substantially converting the ()'-N junction edge into the (1111 plane). a step of forming a semiconductor region having a thickness that is at least not exposed to the semiconductor layer;
a step of forming a region with high eo, and the region K11l is in contact with the first conductivity type and is - compared to the second o semiconductor layer.
A region having a high impurity concentration is formed in the second semiconductor layer, or a nuclear semiconductor layer and a Schottky! region are formed on the second semiconductor layer. A method for manufacturing a semiconductor rectifier, comprising the steps of: forming a metal layer forming a metal layer.