JP2025504087A5 - - Google Patents
Info
- Publication number
- JP2025504087A5 JP2025504087A5 JP2024545864A JP2024545864A JP2025504087A5 JP 2025504087 A5 JP2025504087 A5 JP 2025504087A5 JP 2024545864 A JP2024545864 A JP 2024545864A JP 2024545864 A JP2024545864 A JP 2024545864A JP 2025504087 A5 JP2025504087 A5 JP 2025504087A5
- Authority
- JP
- Japan
- Prior art keywords
- vector
- instruction
- capability
- memory
- given
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB2201544.0 | 2022-02-07 | ||
| GB2201544.0A GB2615352B (en) | 2022-02-07 | 2022-02-07 | Technique for performing memory access operations |
| PCT/GB2022/053313 WO2023148467A1 (en) | 2022-02-07 | 2022-12-20 | Technique for performing memory access operations |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2025504087A JP2025504087A (ja) | 2025-02-06 |
| JP2025504087A5 true JP2025504087A5 (enExample) | 2025-12-23 |
Family
ID=80461352
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2024545864A Pending JP2025504087A (ja) | 2022-02-07 | 2022-12-20 | メモリアクセス動作を実行するための技法 |
Country Status (9)
| Country | Link |
|---|---|
| US (1) | US20250156182A1 (enExample) |
| EP (1) | EP4476612A1 (enExample) |
| JP (1) | JP2025504087A (enExample) |
| KR (1) | KR20240140968A (enExample) |
| CN (1) | CN118647971A (enExample) |
| GB (1) | GB2615352B (enExample) |
| IL (1) | IL314155A (enExample) |
| TW (1) | TW202347121A (enExample) |
| WO (1) | WO2023148467A1 (enExample) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US12417099B2 (en) * | 2022-04-02 | 2025-09-16 | Intel Corporation | Circuitry and methods for informing indirect prefetches using capabilities |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2520571B (en) * | 2013-11-26 | 2020-12-16 | Advanced Risc Mach Ltd | A data processing apparatus and method for performing vector processing |
| GB2544996B (en) * | 2015-12-02 | 2017-12-06 | Advanced Risc Mach Ltd | An apparatus and method for managing bounded pointers |
| US20190205137A1 (en) * | 2017-12-29 | 2019-07-04 | Lawrence Meadows | Methods and apparatus for multi-load and multi-store vector instructions |
| US11163569B2 (en) * | 2019-12-28 | 2021-11-02 | Intel Corporation | Hardware apparatuses, methods, and systems for individually revocable capabilities for enforcing temporal memory safety |
| TWI891893B (zh) * | 2020-09-02 | 2025-08-01 | 美商賽發馥股份有限公司 | 執行指令的積體電路及記憶體保護的方法 |
| US20230195461A1 (en) * | 2021-12-16 | 2023-06-22 | Intel Corporation | Circuitry and methods for implementing capabilities using narrow registers |
-
2022
- 2022-02-07 GB GB2201544.0A patent/GB2615352B/en active Active
- 2022-12-20 WO PCT/GB2022/053313 patent/WO2023148467A1/en not_active Ceased
- 2022-12-20 EP EP22835100.3A patent/EP4476612A1/en active Pending
- 2022-12-20 CN CN202280090725.7A patent/CN118647971A/zh active Pending
- 2022-12-20 IL IL314155A patent/IL314155A/en unknown
- 2022-12-20 JP JP2024545864A patent/JP2025504087A/ja active Pending
- 2022-12-20 US US18/835,476 patent/US20250156182A1/en active Pending
- 2022-12-20 KR KR1020247029477A patent/KR20240140968A/ko active Pending
-
2023
- 2023-02-02 TW TW112103610A patent/TW202347121A/zh unknown
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