JP2024501876A - 熱伝導性ウェハ層 - Google Patents

熱伝導性ウェハ層 Download PDF

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Publication number
JP2024501876A
JP2024501876A JP2023540529A JP2023540529A JP2024501876A JP 2024501876 A JP2024501876 A JP 2024501876A JP 2023540529 A JP2023540529 A JP 2023540529A JP 2023540529 A JP2023540529 A JP 2023540529A JP 2024501876 A JP2024501876 A JP 2024501876A
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Japan
Prior art keywords
layer
metal
wafer
semiconductor wafer
metal nanoparticles
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JP2023540529A
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English (en)
Japanese (ja)
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JP2024501876A5 (enExample
Inventor
スタッセン クック ベンジャミン
ダドバンド ナジラ
ヴェヌゴパル アルチャナ
リー レヴィエール ダニエル
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テキサス インスツルメンツ インコーポレイテッド
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Publication of JP2024501876A publication Critical patent/JP2024501876A/ja
Publication of JP2024501876A5 publication Critical patent/JP2024501876A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/412—Deposition of metallic or metal-silicide materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P54/00—Cutting or separating of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/44—Conductive materials thereof
    • H10W20/4403—Conductive materials thereof based on metals, e.g. alloys, metal silicides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/46—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a liquid
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7416—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7426—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used as a support during build up manufacturing of active devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/744—Details of chemical or physical process used for separating the auxiliary support from a device or a wafer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/20—Arrangements for cooling
    • H10W40/25—Arrangements for cooling characterised by their materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/20—Arrangements for cooling
    • H10W40/25—Arrangements for cooling characterised by their materials
    • H10W40/258—Metallic materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/098—Applying pastes or inks, e.g. screen printing

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Die Bonding (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Carbon And Carbon Compounds (AREA)
JP2023540529A 2020-12-30 2021-12-28 熱伝導性ウェハ層 Pending JP2024501876A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US17/138,541 US11854933B2 (en) 2020-12-30 2020-12-30 Thermally conductive wafer layer
US17/138,541 2020-12-30
PCT/US2021/065266 WO2022146953A1 (en) 2020-12-30 2021-12-28 Thermally conductive wafer layer

Publications (2)

Publication Number Publication Date
JP2024501876A true JP2024501876A (ja) 2024-01-16
JP2024501876A5 JP2024501876A5 (enExample) 2024-12-16

Family

ID=82118338

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2023540529A Pending JP2024501876A (ja) 2020-12-30 2021-12-28 熱伝導性ウェハ層

Country Status (4)

Country Link
US (2) US11854933B2 (enExample)
EP (1) EP4272247B1 (enExample)
JP (1) JP2024501876A (enExample)
WO (1) WO2022146953A1 (enExample)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11854933B2 (en) * 2020-12-30 2023-12-26 Texas Instruments Incorporated Thermally conductive wafer layer

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JPH10233475A (ja) * 1996-12-16 1998-09-02 Sentan Zairyo:Kk シリコンウェハーと炭素材との複合材
JP2011205116A (ja) * 2005-05-04 2011-10-13 Spansion Llc マルチチップモジュール
JP2015216199A (ja) * 2014-05-09 2015-12-03 新光電気工業株式会社 半導体装置、熱伝導部材及び半導体装置の製造方法
JP2018206840A (ja) * 2017-05-31 2018-12-27 株式会社応用ナノ粒子研究所 放熱構造体
JP2019036566A (ja) * 2017-08-10 2019-03-07 富士通株式会社 半導体装置及びその製造方法
US20190279955A1 (en) * 2018-03-07 2019-09-12 Texas Instruments Incorporated Nanoparticle backside die adhesion layer
WO2020139631A1 (en) * 2018-12-26 2020-07-02 Texas Instruments Incorporated Semiconductor device with deep trench isolation and trench capacitor

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US8531015B2 (en) 2009-03-26 2013-09-10 Stats Chippac, Ltd. Semiconductor device and method of forming a thin wafer without a carrier
US8426309B2 (en) * 2009-09-10 2013-04-23 Lockheed Martin Corporation Graphene nanoelectric device fabrication
US8450779B2 (en) * 2010-03-08 2013-05-28 International Business Machines Corporation Graphene based three-dimensional integrated circuit device
US20120141799A1 (en) * 2010-12-03 2012-06-07 Francis Kub Film on Graphene on a Substrate and Method and Devices Therefor
WO2013036278A1 (en) * 2011-09-06 2013-03-14 Nanotech Biomachines, Inc. Integrated sensing device and related methods
US8884310B2 (en) 2011-10-19 2014-11-11 Sunedison Semiconductor Limited (Uen201334164H) Direct formation of graphene on semiconductor substrates
US9102118B2 (en) * 2011-12-05 2015-08-11 International Business Machines Corporation Forming patterned graphene layers
US9263630B2 (en) * 2012-03-27 2016-02-16 Sumitomo Chemical Company, Limited Inorganic layer light-emitting device
US9305854B2 (en) 2012-08-21 2016-04-05 Stats Chippac, Ltd. Semiconductor device and method of forming RDL using UV-cured conductive ink over wafer level package
WO2014152509A1 (en) * 2013-03-15 2014-09-25 Solan, LLC Plasmonic device enhancements
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JPH10233475A (ja) * 1996-12-16 1998-09-02 Sentan Zairyo:Kk シリコンウェハーと炭素材との複合材
JP2011205116A (ja) * 2005-05-04 2011-10-13 Spansion Llc マルチチップモジュール
JP2015216199A (ja) * 2014-05-09 2015-12-03 新光電気工業株式会社 半導体装置、熱伝導部材及び半導体装置の製造方法
JP2018206840A (ja) * 2017-05-31 2018-12-27 株式会社応用ナノ粒子研究所 放熱構造体
JP2019036566A (ja) * 2017-08-10 2019-03-07 富士通株式会社 半導体装置及びその製造方法
US20190279955A1 (en) * 2018-03-07 2019-09-12 Texas Instruments Incorporated Nanoparticle backside die adhesion layer
WO2020139631A1 (en) * 2018-12-26 2020-07-02 Texas Instruments Incorporated Semiconductor device with deep trench isolation and trench capacitor

Also Published As

Publication number Publication date
US20220208640A1 (en) 2022-06-30
EP4272247A4 (en) 2024-06-05
EP4272247B1 (en) 2025-10-01
US20240153841A1 (en) 2024-05-09
US11854933B2 (en) 2023-12-26
EP4272247A1 (en) 2023-11-08
WO2022146953A1 (en) 2022-07-07

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