JP2023519706A - プリント基板の空洞からボンドフィルムを除去する方法 - Google Patents
プリント基板の空洞からボンドフィルムを除去する方法 Download PDFInfo
- Publication number
- JP2023519706A JP2023519706A JP2022559549A JP2022559549A JP2023519706A JP 2023519706 A JP2023519706 A JP 2023519706A JP 2022559549 A JP2022559549 A JP 2022559549A JP 2022559549 A JP2022559549 A JP 2022559549A JP 2023519706 A JP2023519706 A JP 2023519706A
- Authority
- JP
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- Prior art keywords
- dielectric material
- sheet
- solder bumps
- solder
- bond film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910000679 solder Inorganic materials 0.000 claims abstract description 114
- 238000000034 method Methods 0.000 claims abstract description 78
- 239000003989 dielectric material Substances 0.000 claims abstract description 55
- 239000011347 resin Substances 0.000 claims abstract description 32
- 229920005989 resin Polymers 0.000 claims abstract description 32
- 238000004519 manufacturing process Methods 0.000 claims abstract description 24
- 238000005553 drilling Methods 0.000 claims abstract description 19
- 238000003801 milling Methods 0.000 claims abstract description 13
- 238000000151 deposition Methods 0.000 claims abstract description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 41
- 238000012545 processing Methods 0.000 claims description 8
- 238000005476 soldering Methods 0.000 claims description 7
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 6
- 229910052709 silver Inorganic materials 0.000 claims description 6
- 239000004332 silver Substances 0.000 claims description 6
- 239000012467 final product Substances 0.000 claims description 5
- 239000002105 nanoparticle Substances 0.000 claims description 5
- 239000010410 layer Substances 0.000 description 48
- 239000010408 film Substances 0.000 description 44
- 229910052802 copper Inorganic materials 0.000 description 27
- 239000010949 copper Substances 0.000 description 27
- 238000003475 lamination Methods 0.000 description 7
- 239000000463 material Substances 0.000 description 6
- 239000004020 conductor Substances 0.000 description 5
- 239000000758 substrate Substances 0.000 description 5
- 239000000654 additive Substances 0.000 description 3
- 230000000996 additive effect Effects 0.000 description 3
- 238000013461 design Methods 0.000 description 3
- 239000004593 Epoxy Substances 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 238000004026 adhesive bonding Methods 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 239000002313 adhesive film Substances 0.000 description 2
- 230000004075 alteration Effects 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 238000010030 laminating Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000009736 wetting Methods 0.000 description 2
- 239000004215 Carbon black (E152) Substances 0.000 description 1
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- FOIXSVOLVBLSDH-UHFFFAOYSA-N Silver ion Chemical compound [Ag+] FOIXSVOLVBLSDH-UHFFFAOYSA-N 0.000 description 1
- 239000004809 Teflon Substances 0.000 description 1
- 229920006362 Teflon® Polymers 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 230000000712 assembly Effects 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- MPTQRFCYZCXJFQ-UHFFFAOYSA-L copper(II) chloride dihydrate Chemical compound O.O.[Cl-].[Cl-].[Cu+2] MPTQRFCYZCXJFQ-UHFFFAOYSA-L 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 229920002313 fluoropolymer Polymers 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000000383 hazardous chemical Substances 0.000 description 1
- 229930195733 hydrocarbon Natural products 0.000 description 1
- 150000002430 hydrocarbons Chemical class 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 230000005865 ionizing radiation Effects 0.000 description 1
- 239000002648 laminated material Substances 0.000 description 1
- 238000003754 machining Methods 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 229920001343 polytetrafluoroethylene Polymers 0.000 description 1
- 239000004810 polytetrafluoroethylene Substances 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 238000001228 spectrum Methods 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 229920001169 thermoplastic Polymers 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- 239000004416 thermosoftening plastic Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/26—Cleaning or polishing of the conductive pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4697—Manufacturing multilayer circuits having cavities, e.g. for mounting components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/116—Manufacturing methods by patterning a pre-deposited material
- H01L2224/11602—Mechanical treatment, e.g. polishing, grinding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45147—Copper (Cu) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73207—Bump and wire connectors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10227—Other objects, e.g. metallic pieces
- H05K2201/10287—Metal wires as connectors or conductors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
- H05K2203/0257—Brushing, e.g. cleaning the conductive pattern by brushing or wiping
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/16—Inspection; Monitoring; Aligning
- H05K2203/166—Alignment or registration; Control of registration
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4046—Through-connections; Vertical interconnect access [VIA] connections using auxiliary conductive elements, e.g. metallic spheres, eyelets, pieces of wire
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/465—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer having channels for the next circuit layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4679—Aligning added circuit layers or via connections relative to previous circuit layers
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
Description
Claims (20)
- 電磁回路を製造する方法であって:
少なくとも1つの導電性トレースを有する頂部表面を含む第1誘電体材料シートを提供するステップ;
前記少なくとも1つの導電性トレース上にはんだバンプを堆積させるステップ;
前記第1誘電体材料シートにボンドフィルムを挟んで第2誘電体材料シートを適用するステップであり、前記第2誘電体材料シートは、前記はんだバンプへのアクセスを提供するスルーホールを有するステップ;
前記第1誘電体材料シート及び前記第2誘電体材料シートを互いに結合するステップ;及び
前記はんだバンプからボンドフィルム樹脂を除去するステップ;
を含む方法。 - 前記のボンドフィルム樹脂を除去するステップは、前記ボンドフィルム樹脂を除去するためのドリリング又はミリングプロセスを含む、請求項1に記載の方法。
- 前記ボンドフィルム樹脂を除去するためのドリリング又はミリングプロセスは、手動手順又は自動手順とすることができる、請求項2に記載の方法。
- 前記はんだバンプ内に所望量のはんだを達成するために、ドリリング又はミリングプロセスにより前記はんだバンプを加工するステップをさらに含む、請求項2に記載の方法。
- 前記はんだバンプに銅線を固定して、前記銅線により取り付けられるスルーホール部品を固定するステップをさらに含む、請求項1に記載の方法。
- はんだ付け又はリフロープロセスによって、前記銅線が前記はんだバンプに固定される、請求項5に記載の方法。
- 前記はんだバンプが鉛ベース又は鉛フリーはんだを含む、請求項1に記載の方法。
- 前記スルーホールは、前記第2誘電体材料シートをドリリングするステップによって作成される、請求項1に記載の方法。
- 前記第1誘電体材料シート及び前記第2誘電体材料シートを互いに結合するステップは、所定の圧力及び温度下で前記第1誘電体材料シート及び前記第2誘電体材料シートを硬化させ、一体的最終製品を形成するステップを含む、請求項1に記載の方法。
- 銀ナノ粒子ペーストを前記はんだバンプに適用するステップをさらに含む、請求項1に記載の方法。
- 電磁回路を製造する方法であって:
少なくとも1つの導電性トレースを有する頂部表面を含む第1誘電体材料シートを提供するステップ;
前記少なくとも1つの導電性トレース上にはんだバンプを堆積させるステップ;
前記第1誘電体材料シートに第2誘電体材料シートを適用するステップであり、前記第2誘電体材料シートは、前記はんだバンプへのアクセスを提供するスルーホールを有するステップ;
前記第1誘電体材料シート及び前記第2誘電体材料シートを互いに結合するステップ;及び
前記はんだバンプ内に所望量のはんだを達成するために、前記はんだバンプを加工するステップ;
を含む方法。 - 前記はんだバンプを加工するステップは、前記はんだバンプの一部を除去するためにドリリング又はミリングプロセスを使用するステップを含む、請求項11に記載の方法。
- 前記はんだバンプを加工するステップは、手動手順又は自動手順とすることができる、請求項12に記載の方法。
- 前記はんだバンプからボンドフィルム樹脂を除去するステップをさらに含む、請求項12に記載の方法。
- 前記はんだバンプに銅線を固定して、前記銅線により取り付けられるスルーホール部品を固定するステップをさらに含む、請求項11に記載の方法。
- はんだ付け又はリフロープロセスによって、前記銅線が前記はんだバンプに固定される、請求項15に記載の方法。
- 前記はんだバンプが鉛ベース又は鉛フリーはんだを含む、請求項11に記載の方法。
- 前記スルーホールは、前記第2誘電体材料シートをドリリングするステップによって作成される、請求項11に記載の方法。
- 前記第1誘電体材料シート及び前記第2誘電体材料シートを互いに結合するステップは、所定の圧力及び温度下で前記第1誘電体材料シート及び前記第2誘電体材料シートを硬化させ、一体的最終製品を形成するステップを含む、請求項11に記載の方法。
- 銀ナノ粒子ペーストを前記はんだバンプに適用するステップをさらに含む、請求項11に記載の方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US16/836,470 US11171101B2 (en) | 2020-03-31 | 2020-03-31 | Process for removing bond film from cavities in printed circuit boards |
US16/836,470 | 2020-03-31 | ||
PCT/US2021/016294 WO2021201969A1 (en) | 2020-03-31 | 2021-02-03 | Process for removing bond film from cavities in printed circuit boards |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2023519706A true JP2023519706A (ja) | 2023-05-12 |
Family
ID=74759522
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2022559549A Pending JP2023519706A (ja) | 2020-03-31 | 2021-02-03 | プリント基板の空洞からボンドフィルムを除去する方法 |
Country Status (6)
Country | Link |
---|---|
US (1) | US11171101B2 (ja) |
EP (1) | EP4129024A1 (ja) |
JP (1) | JP2023519706A (ja) |
KR (1) | KR20220134599A (ja) |
TW (1) | TW202207772A (ja) |
WO (1) | WO2021201969A1 (ja) |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5675180A (en) | 1994-06-23 | 1997-10-07 | Cubic Memory, Inc. | Vertical interconnect process for silicon segments |
US5873161A (en) | 1996-07-23 | 1999-02-23 | Minnesota Mining And Manufacturing Company | Method of making a Z axis interconnect circuit |
US6267650B1 (en) | 1999-08-09 | 2001-07-31 | Micron Technology, Inc. | Apparatus and methods for substantial planarization of solder bumps |
TWI286454B (en) | 2005-03-09 | 2007-09-01 | Phoenix Prec Technology Corp | Electrical connector structure of circuit board and method for fabricating the same |
US8723332B2 (en) | 2007-06-11 | 2014-05-13 | Invensas Corporation | Electrically interconnected stacked die assemblies |
US10091888B2 (en) | 2016-02-02 | 2018-10-02 | Northrop Grumman Systems Corporation | Large-scale reconfigurable electronics using low cost nanoparticle ink printing method |
US11289814B2 (en) * | 2017-11-10 | 2022-03-29 | Raytheon Company | Spiral antenna and related fabrication techniques |
IL308118A (en) | 2018-02-28 | 2023-12-01 | Raytheon Co | Radio frequency push connections |
JP2022532558A (ja) * | 2019-05-14 | 2022-07-15 | レイセオン カンパニー | フラットワイヤ銅垂直送出マイクロ波相互接続法 |
-
2020
- 2020-03-31 US US16/836,470 patent/US11171101B2/en active Active
-
2021
- 2021-02-03 KR KR1020227029689A patent/KR20220134599A/ko not_active Application Discontinuation
- 2021-02-03 EP EP21708485.4A patent/EP4129024A1/en active Pending
- 2021-02-03 JP JP2022559549A patent/JP2023519706A/ja active Pending
- 2021-02-03 WO PCT/US2021/016294 patent/WO2021201969A1/en unknown
- 2021-02-05 TW TW110104532A patent/TW202207772A/zh unknown
Also Published As
Publication number | Publication date |
---|---|
KR20220134599A (ko) | 2022-10-05 |
US20210305187A1 (en) | 2021-09-30 |
EP4129024A1 (en) | 2023-02-08 |
WO2021201969A1 (en) | 2021-10-07 |
TW202207772A (zh) | 2022-02-16 |
US11171101B2 (en) | 2021-11-09 |
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