JP2023067790A - 短絡保護を具備する半導体パワー装置及び半導体パワー装置を製造するプロセス - Google Patents

短絡保護を具備する半導体パワー装置及び半導体パワー装置を製造するプロセス Download PDF

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JP2023067790A
JP2023067790A JP2022167881A JP2022167881A JP2023067790A JP 2023067790 A JP2023067790 A JP 2023067790A JP 2022167881 A JP2022167881 A JP 2022167881A JP 2022167881 A JP2022167881 A JP 2022167881A JP 2023067790 A JP2023067790 A JP 2023067790A
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epitaxial layer
conductivity type
semiconductor
doping level
distance
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JP2023067790A5 (enExample
Inventor
カッシーノ サルバトーレ
Cascino Salvatore
ガルネーラ アルフィオ
Guarnera Alfio
ジウセッペ サッジーオ マリオ
Giuseppe Saggio Mario
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STMicroelectronics SRL
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STMicroelectronics SRL
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Publication of JP2023067790A5 publication Critical patent/JP2023067790A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
    • H10D30/665—Vertical DMOS [VDMOS] FETs having edge termination structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01—Manufacture or treatment
    • H10D12/031—Manufacture or treatment of IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
    • H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/106—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]  having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
    • H10D62/107—Buried supplementary regions, e.g. buried guard rings 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/109—Reduced surface field [RESURF] PN junction structures
    • H10D62/111—Multiple RESURF structures, e.g. double RESURF or 3D-RESURF structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325—Silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/22—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping using masks

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  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Protection Of Static Devices (AREA)
JP2022167881A 2021-10-29 2022-10-19 短絡保護を具備する半導体パワー装置及び半導体パワー装置を製造するプロセス Pending JP2023067790A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
IT102021000027842A IT202100027842A1 (it) 2021-10-29 2021-10-29 Dispositivo di potenza a semiconduttore con protezione da corto circuito e procedimento per fabbricare un dispositivo di potenza a semiconduttore
IT102021000027842 2021-10-29

Publications (2)

Publication Number Publication Date
JP2023067790A true JP2023067790A (ja) 2023-05-16
JP2023067790A5 JP2023067790A5 (enExample) 2025-10-10

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JP2022167881A Pending JP2023067790A (ja) 2021-10-29 2022-10-19 短絡保護を具備する半導体パワー装置及び半導体パワー装置を製造するプロセス

Country Status (5)

Country Link
US (1) US20230134850A1 (enExample)
EP (1) EP4177960B1 (enExample)
JP (1) JP2023067790A (enExample)
CN (2) CN116072728A (enExample)
IT (1) IT202100027842A1 (enExample)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT202100027842A1 (it) * 2021-10-29 2023-04-29 St Microelectronics Srl Dispositivo di potenza a semiconduttore con protezione da corto circuito e procedimento per fabbricare un dispositivo di potenza a semiconduttore
CN119584613A (zh) * 2025-02-06 2025-03-07 华通芯电(南昌)电子科技有限公司 一种SiC MOSFET器件及其制备方法
TWI900409B (zh) * 2025-02-12 2025-10-01 李羿軒 垂直型功率半導體裝置

Family Cites Families (8)

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Publication number Priority date Publication date Assignee Title
US6573534B1 (en) * 1995-09-06 2003-06-03 Denso Corporation Silicon carbide semiconductor device
JP4746169B2 (ja) * 2000-04-28 2011-08-10 株式会社東芝 電力用半導体装置及びその駆動方法
KR101367491B1 (ko) * 2012-08-08 2014-02-26 고려대학교 산학협력단 단일 ｆｌｉ 구조를 갖는 반도체 소자의 제조 방법 및 그 제조 방법으로 제조된 반도체 소자
JP6381101B2 (ja) * 2013-12-09 2018-08-29 富士電機株式会社 炭化珪素半導体装置
US11152503B1 (en) * 2019-11-05 2021-10-19 Semiq Incorporated Silicon carbide MOSFET with wave-shaped channel regions
US20240014255A1 (en) * 2020-01-03 2024-01-11 Lg Electronics Inc. Metal-oxide-semiconductor field-effect transistor device, and manufacturing method therefor
CN111725318B (zh) * 2020-06-18 2024-04-09 湖南国芯半导体科技有限公司 一种功率半导体器件的元胞结构及其制作方法
IT202100027842A1 (it) * 2021-10-29 2023-04-29 St Microelectronics Srl Dispositivo di potenza a semiconduttore con protezione da corto circuito e procedimento per fabbricare un dispositivo di potenza a semiconduttore

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US20230134850A1 (en) 2023-05-04
CN220341228U (zh) 2024-01-12
IT202100027842A1 (it) 2023-04-29
EP4177960C0 (en) 2025-12-17
EP4177960A1 (en) 2023-05-10
CN116072728A (zh) 2023-05-05
EP4177960B1 (en) 2025-12-17

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