JP2022534858A5 - - Google Patents
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- Publication number
- JP2022534858A5 JP2022534858A5 JP2021564305A JP2021564305A JP2022534858A5 JP 2022534858 A5 JP2022534858 A5 JP 2022534858A5 JP 2021564305 A JP2021564305 A JP 2021564305A JP 2021564305 A JP2021564305 A JP 2021564305A JP 2022534858 A5 JP2022534858 A5 JP 2022534858A5
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Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201962855374P | 2019-05-31 | 2019-05-31 | |
| US62/855,374 | 2019-05-31 | ||
| US16/849,630 US11437376B2 (en) | 2019-05-31 | 2020-04-15 | Compact 3D stacked-CFET architecture for complex logic cells |
| US16/849,630 | 2020-04-15 | ||
| PCT/US2020/034134 WO2020242909A1 (en) | 2019-05-31 | 2020-05-22 | Compact 3d stacked cfet architecture for complex logic cells |
Publications (4)
| Publication Number | Publication Date |
|---|---|
| JP2022534858A JP2022534858A (ja) | 2022-08-04 |
| JPWO2020242909A5 JPWO2020242909A5 (https=) | 2023-05-24 |
| JP2022534858A5 true JP2022534858A5 (https=) | 2023-05-24 |
| JP7680812B2 JP7680812B2 (ja) | 2025-05-21 |
Family
ID=73550387
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2021564305A Active JP7680812B2 (ja) | 2019-05-31 | 2020-05-22 | 複合ロジックセルのための小型３ｄ積層ｃｆｅｔアーキテクチャ |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US11437376B2 (https=) |
| JP (1) | JP7680812B2 (https=) |
| KR (1) | KR102780323B1 (https=) |
| CN (1) | CN113875007A (https=) |
| TW (1) | TWI861115B (https=) |
| WO (1) | WO2020242909A1 (https=) |
Families Citing this family (19)
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|---|---|---|---|---|
| US11469321B2 (en) | 2020-02-27 | 2022-10-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device |
| US11714945B2 (en) | 2020-04-09 | 2023-08-01 | Tokyo Electron Limited | Method for automated standard cell design |
| US11550985B2 (en) | 2020-04-09 | 2023-01-10 | Tokyo Electron Limited | Method for automated standard cell design |
| US11961802B2 (en) | 2020-12-04 | 2024-04-16 | Tokyo Electron Limited | Power-tap pass-through to connect a buried power rail to front-side power distribution network |
| US12374623B2 (en) * | 2021-01-18 | 2025-07-29 | Samsung Electronics Co., Ltd. | Stacked semiconductor device architecture |
| US12046643B2 (en) * | 2021-09-20 | 2024-07-23 | International Business Machines Corporation | Semiconductor structures with power rail disposed under active gate |
| EP4167275A1 (en) | 2021-10-18 | 2023-04-19 | Imec VZW | A method for forming an interconnection structure |
| US12336294B2 (en) | 2021-11-10 | 2025-06-17 | International Business Machines Corporation | Gate-cut and separation techniques for enabling independent gate control of stacked transistors |
| US11894436B2 (en) * | 2021-12-06 | 2024-02-06 | International Business Machines Corporation | Gate-all-around monolithic stacked field effect transistors having multiple threshold voltages |
| KR102892844B1 (ko) | 2022-01-10 | 2025-12-02 | 엘지전자 주식회사 | 무선 통신 시스템에서 신호 송수신 방법 및 장치 |
| US12218135B2 (en) | 2022-01-13 | 2025-02-04 | Tokyo Electron Limited | Wiring in diffusion breaks in an integrated circuit |
| US12588489B2 (en) | 2022-02-25 | 2026-03-24 | Samsung Electronics Co., Ltd. | Integrated circuit devices including stacked elements and methods of forming the same |
| US12349458B2 (en) | 2022-03-22 | 2025-07-01 | International Business Machines Corporation | Staggered stacked circuits with increased effective width |
| US12131996B2 (en) | 2022-03-28 | 2024-10-29 | Samsung Electronics Co., Ltd. | Stacked device with backside power distribution network and method of manufacturing the same |
| US12490480B2 (en) | 2022-09-16 | 2025-12-02 | International Business Machines Corporation | Stacked FETS with contact placeholder structures |
| KR20240167169A (ko) * | 2023-05-19 | 2024-11-26 | 삼성전자주식회사 | 반도체 장치 |
| WO2025083833A1 (ja) * | 2023-10-19 | 2025-04-24 | 株式会社ソシオネクスト | 半導体装置 |
| WO2025083834A1 (ja) * | 2023-10-19 | 2025-04-24 | 株式会社ソシオネクスト | 半導体装置 |
| WO2025083832A1 (ja) * | 2023-10-19 | 2025-04-24 | 株式会社ソシオネクスト | 半導体装置 |
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| CN101257024A (zh) * | 2006-09-14 | 2008-09-03 | 三星电子株式会社 | 具有三维排列的存储单元晶体管的与非型闪存器件 |
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| US9570395B1 (en) * | 2015-11-17 | 2017-02-14 | Samsung Electronics Co., Ltd. | Semiconductor device having buried power rail |
| US9646989B1 (en) | 2015-11-18 | 2017-05-09 | Kabushiki Kaisha Toshiba | Three-dimensional memory device |
| KR101855846B1 (ko) | 2015-12-29 | 2018-05-09 | 포항공과대학교 산학협력단 | 수직적층구조의 3차원 정적램 코어 셀 및 그를 포함하는 정적램 코어 셀 어셈블리 |
| US9941200B1 (en) | 2016-09-26 | 2018-04-10 | Stmicroelectronics (Crolles 2) Sas | Contact trench between stacked semiconductor substrates |
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| US10192867B1 (en) * | 2018-02-05 | 2019-01-29 | Globalfoundries Inc. | Complementary FETs with wrap around contacts and method of forming same |
| KR20180058673A (ko) | 2018-04-24 | 2018-06-01 | 포항공과대학교 산학협력단 | 수직적층구조의 3차원 정적램 코어 셀 및 그를 포함하는 정적램 코어 셀 어셈블리 |
| CN112585752B (zh) * | 2018-09-05 | 2023-09-19 | 东京毅力科创株式会社 | 3d逻辑和存储器的配电网络 |
| US10811415B2 (en) * | 2018-10-25 | 2020-10-20 | Samsung Electronics Co., Ltd. | Semiconductor device and method for making the same |
| JP7426547B2 (ja) * | 2018-10-29 | 2024-02-02 | 東京エレクトロン株式会社 | 半導体素子のモノリシック３ｄ集積を行うためのアーキテクチャ |
| KR102795719B1 (ko) * | 2019-07-19 | 2025-04-16 | 삼성전자주식회사 | 3차원 반도체 장치 |
| US11195794B2 (en) * | 2020-02-05 | 2021-12-07 | Samsung Electronics Co., Ltd. | Stacked integrated circuit devices including a routing wire |
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2020
- 2020-04-15 US US16/849,630 patent/US11437376B2/en active Active
- 2020-05-22 WO PCT/US2020/034134 patent/WO2020242909A1/en not_active Ceased
- 2020-05-22 KR KR1020217034120A patent/KR102780323B1/ko active Active
- 2020-05-22 JP JP2021564305A patent/JP7680812B2/ja active Active
- 2020-05-22 CN CN202080039123.XA patent/CN113875007A/zh active Pending
- 2020-05-26 TW TW109117500A patent/TWI861115B/zh active