JP2022102611A - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 59
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 13
- 238000000034 method Methods 0.000 title claims abstract description 9
- 239000000758 substrate Substances 0.000 claims abstract description 53
- 239000000853 adhesive Substances 0.000 claims abstract description 31
- 230000001070 adhesive effect Effects 0.000 claims abstract description 31
- 230000003014 reinforcing effect Effects 0.000 claims description 35
- 239000000463 material Substances 0.000 claims description 13
- 125000006850 spacer group Chemical group 0.000 claims description 13
- 238000007747 plating Methods 0.000 claims description 12
- 238000005530 etching Methods 0.000 claims description 3
- 230000002787 reinforcement Effects 0.000 abstract 2
- 239000010410 layer Substances 0.000 description 49
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 6
- 239000010931 gold Substances 0.000 description 6
- 230000001681 protective effect Effects 0.000 description 5
- 239000004593 Epoxy Substances 0.000 description 4
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 4
- 239000004642 Polyimide Substances 0.000 description 4
- 238000012986 modification Methods 0.000 description 4
- 230000004048 modification Effects 0.000 description 4
- 229920001721 polyimide Polymers 0.000 description 4
- NIXOWILDQLNWCW-UHFFFAOYSA-N acrylic acid group Chemical group C(C=C)(=O)O NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 description 3
- 239000011347 resin Substances 0.000 description 3
- 229920005989 resin Polymers 0.000 description 3
- 239000002335 surface treatment layer Substances 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 238000011282 treatment Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- -1 and for example Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005685 electric field effect Effects 0.000 description 1
- 239000008151 electrolyte solution Substances 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 229920000098 polyolefin Polymers 0.000 description 1
- 229920000915 polyvinyl chloride Polymers 0.000 description 1
- 239000004800 polyvinyl chloride Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
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Abstract
Description
まず、半導体装置の構造について説明する。図1は、実施形態に係る半導体装置を示す図である。図1(a)は断面図であり、図1(b)は下面図である。図1(a)は図1(b)中のIa-Ia線に沿った断面図に相当する。
次に、実施形態に係る半導体装置1の製造方法について説明する。図3~図6は、実施形態に係る半導体装置1の製造方法を示す断面図である。
10 フィルム基板
11、12 面
20 接着剤
21 ビアホール
30 電子部品
40 補強部材
53 配線層
Claims (7)
- フィルム基板と、
前記フィルム基板の一方の面に設けられた接着剤と、
前記接着剤の一方の面に設けられた電子部品と、
前記フィルム基板の他方の面に設けられ、前記フィルム基板に形成されたビアホールを通じて前記電子部品に接続された配線層と、
前記接着剤の一方の面において、前記電子部品の周囲に設けられた補強部材と、
を有し、
前記補強部材の厚さは、前記電子部品の厚さよりも小さいことを特徴とする半導体装置。 - 前記補強部材の材料は、前記フィルム基板の材料と同じであることを特徴とする請求項1に記載の半導体装置。
- 前記補強部材の厚さは前記フィルム基板の厚さ以上であることを特徴とする請求項1又は2に記載の半導体装置。
- 前記一方の面に垂直な方向からの平面視で、前記補強部材は前記電子部品を取り囲むことを特徴とする請求項1乃至3のいずれか1項に記載の半導体装置。
- 前記一方の面に前記電子部品が複数設けられており、
前記一方の面に垂直な方向からの平面視で、前記補強部材は複数の前記電子部品を取り囲むことを特徴とする請求項1乃至4のいずれか1項に記載の半導体装置。 - フィルム基板の一方の面に接着剤が設けられ、前記フィルム基板と前記接着剤を厚さ方向に貫通するビアホールを形成する工程と、
前記接着剤の一方の面に電子部品を設ける工程と、
前記接着剤の一方の面において、前記電子部品の周囲に、厚さが前記電子部品の厚さよりも小さい補強部材を設ける工程と、
前記フィルム基板の他方の面に、前記ビアホールを通じて前記電子部品に接続される配線層を形成する工程と、
を有することを特徴とする半導体装置の製造方法。 - 前記配線層を形成する工程は、
前記電子部品の周囲に前記補強部材の一方の面に接するスペーサを配置する工程と、
前記スペーサを配置する工程の後に、前記フィルム基板の他方の面と、前記ビアホールの側面と、前記電子部品の電極の前記ビアホールから露出した面とにシード層を形成する工程と、
前記シード層の上にめっき層を形成する工程と、
前記めっき層及び前記シード層をエッチングする工程と、
前記めっき層及び前記シード層をエッチングする工程の後に、前記スペーサを取り外す工程と、
を有することを特徴とする請求項6に記載の半導体装置の製造方法。
Priority Applications (3)
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JP2020217444A JP7516242B2 (ja) | 2020-12-25 | 半導体装置及びその製造方法 | |
US17/456,612 US11742272B2 (en) | 2020-12-25 | 2021-11-26 | Semiconductor device |
EP21213256.7A EP4020533A3 (en) | 2020-12-25 | 2021-12-08 | Semiconductor device and method of manufacturing same |
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JP2020217444A JP7516242B2 (ja) | 2020-12-25 | 半導体装置及びその製造方法 |
Publications (2)
Publication Number | Publication Date |
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JP2022102611A true JP2022102611A (ja) | 2022-07-07 |
JP7516242B2 JP7516242B2 (ja) | 2024-07-16 |
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US11742272B2 (en) | 2023-08-29 |
EP4020533A3 (en) | 2022-09-21 |
US20220208668A1 (en) | 2022-06-30 |
EP4020533A2 (en) | 2022-06-29 |
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