JP2022023781A - High power resistor and manufacturing method thereof - Google Patents

Abstract

To provide a high power resistor and a manufacturing method thereof in which a resistor layer and an electrode are tightly coupled.SOLUTION: A manufacturing method for a high power resistor includes a step of preparing a substrate 10 and forming a resistor layer 20 on a first surface 11 of the substrate, a step of forming a conductive seed layer 21 on the resistor layer, a step of forming two surface electrodes 31 on the seed layer, a step of removing a part of the seed layer and a part of the resistor layer and forming a resistance pattern by the remaining seed layer and resistor layer, and a step of removing the seed layer not covered by the two surface electrodes in the resistance pattern to expose the resistance layer of the resistance pattern.SELECTED DRAWING: Figure 5A

Description

The present invention relates to a chip resistor and a method for manufacturing the same, and more particularly to a high power resistor and a method for manufacturing the same.

The conventional chip resistor shown in FIG. 12 mainly consists of a print resistor layer 81 formed on a substrate 80 and two prints that electrically connect the print resistor layer 81 and an external circuit. It is composed of an electrode layer 82.
In the conventional method for manufacturing a chip resistor, first, the print electrode layer 82 and the print resistor layer 81 are sequentially formed on the substrate 80 by a printing process, and then the print resistor layer 81 and the print resistor layer 81 are printed and molded. The printed electrode layer 82 is baked by a sintering process to complete a chip resistor. Generally, in order to allow an electric current to flow from one end to the other end of the print resistor layer 81, the two print electrode layers 82 come into contact with both side end faces of the print resistor layer 81. It is formed on both sides of the print resistor layer 81, whereby both print electrode layers 82 and the print resistor layer 81 are electrically connected in series.

Since the print electrode layer 82 tends to hang down due to the characteristics of the raw material, the lateral end surface of the print electrode layer 82 that has undergone the printing process is slanted out of shape, and the lateral end surface of the print electrode layer 82 that has undergone the sintering process is slanted. After that, the print resistor layer 81 naturally covers the beveled lateral end surface of the print electrode layer 82 when the print is formed, and thus the print resistor layer 81 is subjected to subsequent sintering molding. After the step, an oblique contact surface 810 is formed between the print electrode layer 82 and the print resistor layer 81.
Further, since the thickness of the print-molded print resistor layer 81 and the print electrode layer 82 is generally in the range of 50 nm to 15 μm, the contact area between the print resistor layer 81 and the print electrode layer 82. Since the amount of the current is small, the heat generated when the relatively large current flows through the contact portion between the print resistor layer 81 made of different materials and the print electrode layer 82 tends to be accumulated on the contact surface 810, and the contact surface 810 is also present. Since the width and area of the resistor are very small, the stress caused by repeated thermal expansion and cooling shrinkage easily causes cracks between the print resistor layer 81 and the print electrode layer 82, and the resistor is damaged. Since there was a risk, it led to a decrease in the reliability of the conventional chip resistor.

The method of manufacturing a chip resistor of the prior art will be described by taking "Low resistance chip resistor and its manufacturing method" of the following Patent Document 1 (hereinafter referred to as "previous proposal") as an example.
As shown in FIG. 13, the chip resistor according to the previous invention includes a substrate 90, a resist layer 91, a conductive layer 92, a protective layer 93, a first coating layer 94, and a second coating layer 95. The previous plan only discloses that the conductive layer 92 is formed on the resist layer 91 by plating, and the material of the conductive layer 92 is copper metal, and the resist layer 91 of the previous plan is made of copper metal. Since it is not a similar good conductor, it is not possible to know from the teaching of the previous proposal how the conductive layer 92 is formed on the resist layer 91 by plating. Further, even if the plating step is performed, it is not easy to firmly bond the conductive layer 92 on the resist layer 91, and the bond between the conductive layer 92 and the resist layer 91 is unstable, so that the conductive layer 92 Since it is difficult to form the conductive layer 92 thickly, it is difficult to exert the function of the conductive layer 92 as a low resistance conductor. In addition, it is difficult for the side electrode of the chip resistor according to the previous invention to prevent silver ions or other metal ions in the electrolytic solution used in the plating process from free transitioning to a portion other than the object to be processed. rice field.

Taiwan Patent No. TW201133517

The present invention has been made in view of the above-mentioned drawbacks of the prior art, and an object of the present invention is to provide a high power resistor in which a resistor layer and an electrode are firmly coupled to each other and a method for manufacturing the same.

In order to solve the above problems, the present invention is a method for manufacturing a high-power resistor, in which a substrate is prepared, a resistor layer is formed on the first surface of the substrate, and a resistor layer is formed on the resistor layer. The step of forming a seed layer having conductivity, the step of forming two surface electrodes on the seed layer, and the remaining part of the seed layer and a part of the resistor layer are removed. A step of forming a resistance pattern by the seed layer and a resistor layer, and a step of removing the seed layer of the resistance pattern not covered by the two surface electrodes to expose the resistor layer of the resistance pattern. , Is included.

In order to solve the above problems, the high power resistor manufactured by the method for manufacturing a high power resistor according to the present invention includes a substrate having a first surface and a resistor layer formed on the first surface of the substrate. It is provided with two surface electrodes formed on the resistor layer and a seed layer which is conductive and is formed so as to be sandwiched between the resistor layer and the two surface electrodes. It is a feature.

In the method for manufacturing a high-power resistor according to the present invention, first, a resistor layer is formed on a substrate, then a seed layer is formed on the resistor layer, and then a table electrode is formed on the seed layer. Since the seed layer is formed before the front electrode is formed, the front electrode is formed on the resistor layer via the seed layer by a plating method such as a rack plating method. As a result, the surface electrode is not formed so as to be in contact with the lateral end surface of the resistor layer, but is formed so as to be laminated on the resistor layer, and the contact area between the surface electrode and the resistor layer is formed. Is the projected area projected from the direction perpendicular to the substrate, and is much larger than the area where the surface electrode contacts only the lateral end surface of the resistor layer as in the prior art. The contact resistance between the surface electrode and the surface electrode can be significantly reduced. Further, since the manufacturing method of the present invention does not have a print molding step for forming a resistor layer and an electrode layer, it is not necessary to perform a sintering molding step after printing formation, and the shape is lost due to printing and sintering. Since there is no such thing, stable manufacturing becomes possible, the accuracy of the product can be improved, and the yield can be improved.

In the high power resistor manufactured by the method for manufacturing a high power resistor of the present invention, both surface electrodes used to be connected to an external power source are laminated on the seed layer on the resistor layer. Since it is formed, the contact area with the resistor layer is the projected area projected from the direction perpendicular to the substrate in both surface electrodes, and the surface electrode as in the prior art contacts the lateral end surface of the resistor layer. It is much larger than the area of the part to be used. Therefore, when high power flows through the high power resistor of the present invention, the thermal energy generated by the large current flowing between both front electrodes and the resistor layer is uniformly dispersed in a relatively large contact area. Therefore, it is possible to withstand a larger amount of electric power while preventing damage to the resistor due to overheating. Further, such a seed layer can stabilize the adhesive structure and the electrically connected state between both surface electrodes and the resistor layer, reduce the resistance value between them, and stabilize or improve the product quality.

It is sectional drawing which shows each manufacturing process in the manufacturing method of the high power resistor which concerns on this invention. It is sectional drawing which shows each manufacturing process in the manufacturing method of the high power resistor which concerns on this invention. It is sectional drawing which shows each manufacturing process in the manufacturing method of the high power resistor which concerns on this invention. It is sectional drawing which shows each manufacturing process in the manufacturing method of the high power resistor which concerns on this invention. It is sectional drawing which shows each manufacturing process in the manufacturing method of the high power resistor which concerns on this invention. It is sectional drawing which shows each manufacturing process in the manufacturing method of the high power resistor which concerns on this invention. It is sectional drawing which shows each manufacturing process in the manufacturing method of the high power resistor which concerns on this invention. It is sectional drawing which shows each manufacturing process in the manufacturing method of the high power resistor which concerns on this invention. It is a plan view of the high power resistor which concerns on this invention. It is sectional drawing which shows the further manufacturing process in the manufacturing method of the high power resistor which concerns on this invention. It is sectional drawing which shows the further manufacturing process in the manufacturing method of the high power resistor which concerns on this invention. It is sectional drawing which shows the further manufacturing process in the manufacturing method of the high power resistor which concerns on this invention. It is sectional drawing which shows the preferable embodiment of the high power resistor which concerns on this invention. It is a simple circuit diagram of the high power resistor which concerns on this invention. It is sectional drawing which shows the chip resistor of the prior art. It is sectional drawing which shows the low resistance chip resistor disclosed in the prior art document.

As shown in FIGS. 1 to 8, the present invention proposes a high power resistor and a method for manufacturing the same.
The manufacturing method includes a step of preparing a substrate 10 and forming a resistor layer 20 on the first surface 11 of the substrate 10, and a step of forming a conductive seed layer 21 on the resistor layer 20. , The step of forming two surface electrodes 31 on the seed layer 21, and the seed layer 21 and the resistor layer remaining after removing a part of the seed layer 21 and a part of the resistor layer 20. A step of forming a resistance pattern by the layer 20 and a step of removing the seed layer 21 not covered by the two surface electrodes 31 in the resistance pattern to expose the resistance layer 20 of the resistance pattern. including.

As shown in FIG. 1, in one embodiment of the present invention, the resistor layer 20 is formed on the first surface 11 by a sputtering method. More specifically, in the step of forming the resistor layer 20 on the first surface 11 of the substrate 10, the material to be the resistor layer 20 by the sputtering method completely covers the first surface 11 of the substrate 10. The film is formed so as to cover it. In order to simultaneously form the connecting electrode on the other surface of the high power resistor, another resistor layer 20 is simultaneously formed on the second surface 12 which is the opposite surface of the first surface 11 on the substrate 10. However, the present invention is not limited to this.
As the sputtering target material of the resistor layer 20, titanium alloy, nickel-chromium alloy, silver-copper alloy, nickel-chromium copper alloy, nickel-chromium silicon alloy, manganese copper alloy, nickel-copper alloy, titanium nitride, or aluminum nitride tantalum is used. It is preferable, but not limited to this, a metal resistant material or a composite material of a metal and a non-metal can be arbitrarily selected as long as the required target resistance value can be achieved.

As shown in FIG. 2, in one embodiment of the present invention, after the resistance layer 20 is formed, a conductive seed layer 21 is formed on the resistance layer 20 by a sputtering method. It is preferable to simultaneously form another seed layer 21 on the resistor layer 20 of the second surface 121. Specifically describing the manufacturing process, the seed layer 21 is formed by a sputtering method so as to completely cover the surface of the resistor layer 20. The drag coefficient α1 of the resistor layer 20 material is preferably larger than the drag coefficient α2 of the seed layer 21 material.
The sputtering target material of the seed layer 21 uses the same metal material as the materials of the two table electrodes 31, whereby when the table electrode 31 is formed on the seed layer 21, the seed layer 21 is formed. It can be stably and firmly joined on top. For example, when copper metal is used as the material of the table electrode 31, copper metal can also be selected as the sputtering target material of the seed layer 21, but the material is not limited to this, and depending on the desired purpose, the material may be selected. The material of the surface electrode 31 and the sputtering target material of the seed layer 21 may be the same or different metal materials.

See FIGS. 3A and 3B. In one embodiment of the invention, the step of forming the two surface electrodes 31 on the seed layer 21 exposes a portion of the seed layer 21 as shown in FIG. 3A. The step of partially covering the seed layer 21 with the resist layer 33A and the portion of the seed layer 21 exposed from the patterned photoresist layer 33A as shown in FIG. 3B are divided into two by a plating method. It comprises a sub-step of forming the surface electrode 31 and then removing the patterned photoresist layer 33A.

As described above, after the surface of the resistor layer 20 is coated with the seed layer 21, a pattern is used so that the surface electrode 31 exposes a region to be formed on the seed layer 21 by a photolithography method. The photoresist layer 33A is formed, and then the surface electrode 31 is formed in the exposed region by a plating method. The area is preferably in the range of 0.7 mm × 0.7 mm to 1.5 mm × 1.5 mm. In the above-mentioned plating method, it is preferable to select a rack plating method, and the thickness d1 of the two table electrodes 31 can be in the range of 30 to 100 μm or more by the rack plating method. Become. Therefore, the contact area of the two surface electrodes 31 bonded to the resistor layer 20 via the seed layer 21 has a range of at least 0.7 mm × 0.7 mm to 1.5 mm × 1.5 mm.
In this embodiment, since the two surface electrodes 31 are formed so as to be laminated on the resistor layer 20, the contact area thereof is the entire overlapped contact surface 311 with the resistor layer 20. The contact area between the print resistor layer 81 and the print electrode layer 82 as in the prior art has a much larger contact area than the contact portion having a cross-sectional thickness of only about 50 nm to 15 μm. In addition, since the seed layer 21 is formed first, it is possible to use a rack plating method when molding the front electrode 31, and therefore, the thickness of the front electrode 31 according to the present invention. Can be thicker than the thickness of the print electrode layer 82 formed by the conventional print forming method.
From the above, the two surface electrodes 31 and the resistor layer 20 of the present invention have a relatively large contact area and a relatively thick thickness, so that an excellent heat dissipation effect can be obtained. Therefore, when a large current flows through the high power resistor of the present invention, the heat generated at the junction surface between the resistor layer 20 and the seed layer 21 is diffused from the front electrode 31, and the resistor due to overheating is dissipated. It can withstand more power while preventing damage.

In the step of forming the two surface electrodes 31 on the seed layer 21, it is preferable to simultaneously form the two bottom electrodes 32 on the second surface 12 of the substrate 10. Specifically, as shown in FIG. 3A, the patterned photoresist layer 33B is coated on the seed layer 21 of the second surface 12, and a part of the second surface from the patterned photoresist layer 33B. The seed layer 21 on the 12 is exposed, and then the two surface electrodes 31 are formed by the plating method, and at the same time, the two bottom electrodes 32 are formed on the seed layer 21 of the second surface 12.

See FIGS. 4A and 4B. In one embodiment of the present invention, a part of the seed layer 21 and a part of the resistor layer 20 are removed, and a resistance pattern is formed by the remaining seed layer 21 and the resistor layer 20. The step is a step of coating the seed layer 21 and the two surface electrodes 31 with the first patterned photoresist layer 34 according to the outer shape of the resistance pattern as shown in FIG. 4A, and is shown in FIG. 4B. Such a step of removing a part of the seed layer 21 and the resistor layer 20 that are not covered with the first patterned photoresist layer 34, and then removing the first patterned photoresist layer 34. Includes substeps to execute.

A step of forming the two table electrodes 31 on the seed layer 21 and then removing the seed layer 21 and the resistor layer 20 other than the resistance pattern on the first surface 11 of the substrate 10 will be described. First, the portion of the predetermined resistance pattern on the seed layer 21 is coated with the first patterned photoresist layer 34, and then the seed layer 21 and the resistor layer 20 other than the resistance pattern are removed. A part of the seed layer 21 and a part of the resistance layer 20 below it remain in the resistance pattern, that is, the resistance layer 20 is formed in the outer shape of a predetermined resistance pattern. The step of removing a part of the seed layer 21 and a part of the resistor layer 20 is preferably removed separately by an etching processing method. After that, the first patterned photoresist layer 34 is removed.

In addition, when performing the step of removing the excess resistance layer 20 and the seed layer 21 on the first surface 11 of the substrate 10, the excess resistance layer on the second surface 12 of the substrate 10 is performed. It is preferable to remove 20 and the seed layer 21 at the same time. On the second surface 12, only the bottom electrode 32 for connecting to the external circuit remains, and the excess seed layer 21 and the resistor layer 20 on the first surface 11 are removed at the same time. It is preferable to remove all the seed layer 21 and the resistor layer 20 on the second surface 12 that are not covered with the two bottom electrodes 32.

See FIGS. 5A and 5B. In one embodiment of the present invention, the step of removing the other seed layer 21 not covered by the two photoresist layers 31 in the resistance pattern to expose the resistor layer 20 of the resistance pattern is shown in FIG. The step of coating the surface of the portion of the substrate 10 other than the resistance pattern and the two surface electrodes 31 as shown in 5A with the second patterned photoresist layer 35, and the step as shown in FIG. 5B. A portion of the seed layer 21 that is not coated on the first patterned photoresist layer 34 is removed to expose the resistor layer 20 that is not coated on the surface electrode 31 in the region of the resistance pattern, after which the resistor layer 20 is exposed. It comprises a step of removing the second patterned photoresist layer 35 and a sub-step of performing.

After removing a part of the seed layer 21 and a part of the resistor layer 20 and forming a resistance pattern by the remaining seed layer 21 and the resistor layer 20, the two above-mentioned two in the resistance pattern. A step of removing a part of the seed layer 21 that is not covered with the surface electrode 31 is performed. First, a second patterned photoresist layer 35 is coated on a part of the surface of the substrate 10 other than the resistance pattern and the two table electrodes 31, and then the seed layer 21 in the resistance pattern region is removed. Then, when the resistor layer 20 underneath is exposed, the required resistor layer 20 is completed. When removing the seed layer 21 in the resistance pattern region, it is preferable to remove it by an etching method.
The high-power resistor manufactured by the manufacturing method of the present invention includes a substrate 10 having a first surface 11, a resistor layer 20 formed on the first surface 11, and two resistors formed on the resistor layer 20. It includes one surface electrode 31 and a seed layer 21 arranged so as to be sandwiched between the two surface electrodes 31 and the resistor layer 20.

As shown in the schematic plan view of FIG. 6, the resistance layer 20 formed on the first surface 11 of the substrate 10 and the surface electrodes 31 formed on both sides thereof have a larger superposition contact surface between them. It has 311 and has a lower conduction resistance due to the laminated seed layer 21. As a result, the contact resistance is greatly reduced, so that the current can easily flow and a stable resistance value can be obtained. In addition, the heat generated by the current is diffused from the two front electrodes 31. It is possible to prevent damage to the resistor due to overheating.

As shown in FIG. 7, after forming the resistor layer 20 and the surface electrode 31 for conducting the resistor layer 20 on the substrate 10 of the high power resistor of the present invention, the resistor layer is formed. A protective layer is further formed on the 20. Specifically, after the step of exposing the resistor layer 20 of the resistance pattern, a first protective layer 41 is formed on the resistor layer 20, and the first protective layer 41 is the second. The height of the lateral surface 411 of the first protective layer 41 in contact with the surface electrode 31 is such that the surface of the resistor layer 20 between the two surface electrodes 31 is covered so as to straddle the surface electrodes 31. , It is lower than the height from the top surface 312 to the bottom of the surface electrode 31. After forming the first protective layer 41, a second protective layer 42 is formed on the first protective layer 41.

The high power resistor manufactured by the manufacturing method of the present invention further includes the first protective layer 41 and the second protective layer 42 so that the first protective layer 41 straddles the two surface electrodes 31. The height of the lateral surface 411 of the first protective layer 41 that covers the surface of the resistor layer 20 between the two surface electrodes 31 and is in contact with the surface electrode 31 is the top surface of the surface electrode 31. It is lower than the height from 312 to the bottom. Further, the second protective layer 42 is formed on the first protective layer 41 so as to cover the first protective layer 41.

The resistance layer 20 is protected from physical and scientific damage by coating its surface with the first protective layer 41 and the second protective layer 42, and is mainly the resistance layer 20. Is isolated from the outside air to prevent erosion by water. The material as the first protective layer 41 and the second protective layer 42 may be, for example, a synthetic resin, and it is preferable to use an insulating synthetic resin having a curing temperature in the range of 150 to 450 ° C., but the material is limited thereto. It's not a thing. More specifically, in the present embodiment, a step of coating the two protective layers is performed, the first protective layer 41 is coated on the surface of the resistor layer 20 and cured, and then the above-mentioned first protective layer 41 is coated on the surface of the resistor layer 20. The second protective layer 42 is covered, the peripheral edge of the first protective layer 41 is sealed, and the resistor layer 20 is thoroughly isolated from the outside air.

Further, as shown in FIG. 7, the two surface electrodes 31 according to the present invention have a thickness in the range of 30 to 100 μm on the resistor layer 20 depending on the plating method, preferably the rack plating method. The height from the top surface 312 of the two surface electrodes 31 to the surface of the resistor layer 20 has a height in the range of at least 30 to 100 μm. The first protective layer 41, which is lower than the height of the two table electrodes 31, is coated on the resistor layer 20 of the resistance pattern so as to be in close contact with the side walls of the two table electrodes 31, and on the resistor layer 20. The second protective layer 42 is further covered, and the resistor layer 20 is not directly adjacent to the second protective layer 42 via the first protective layer 41. Therefore, when a small crack is formed on the peripheral edge of the second protective layer 42, even if water infiltrates into the second protective layer 42, it is blocked by the first protective layer 41. It cannot easily penetrate into the resistor layer 20.

As shown in FIGS. 8 and 9, in one preferred embodiment of the present invention, the first and second protective layers are placed on the exposed resistor layer 20 on the first surface 11 of the substrate 10. After covering 41 and 42, the following steps are continuously performed.
See FIG. Conductive side surface seed layers 51 are formed on the opposite side end surfaces 13 of the substrate 10, and the two side surface seed layers 51 are transferred from the first surface 11 to the first surface 11 of the substrate 10. It extends to the second surface 12 which is the opposite surface, whereby the two front electrodes 31 on the first surface 11 and the two bottom electrodes 32 formed on the second surface 12 are formed. Electrically connected,
See FIG. Two first conductive layers 52 are formed on the two side surface seed layers 51, and two second conductive layers 53 are further formed on the two first conductive layers 52.

Therefore, the substrate 10 of the high power resistor in a preferred embodiment of the present invention further has two side end faces 13 facing each other and a second surface 12 facing the first surface 11. Moreover, the high power resistor has two bottom electrodes 32 formed on the second surface 12 of the substrate 10 and has conductivity, and on both side end surfaces 13 of the substrate 10, the first surface 11 to the first surface. Two side surface seed layers 51 extending to two surfaces 12 and electrically connecting the two surface electrodes 31 and the two bottom electrodes 32, and formed on the two side surface seed layers 51. It further includes two first conductive layers 52 and two second conductive layers 53 formed on the two first conductive layers 52.

The high power resistor of a preferred embodiment of the present invention is characterized in that the two front electrodes 31 and the two bottom electrodes 32 are electrically connected. Specifically, the side surface seed layer 51 may be formed on the two side end surfaces 13 of the substrate 10, and the side surface seed layer 51 may be formed by a dip coating method, a vapor deposition method, a spatterin method, or the like. Preferably, the material is a metal such as tin, silver, nickel, copper or palladium.
The two side surface seed layers 51 cover the two end side surfaces 13 of the substrate 10 and extend to the first surface 11 and the second surface 12, the two surface electrodes 31, and the two bottoms. By covering the surface of the electrode 32 toward the two end side surfaces 13, the two front electrodes 31 and the two bottom electrodes 32 are electrically connected. After that, the first conductive layer 52 and the second conductive layer 53 are further formed on the side surface seed layer 51 to ensure electrical connection between the two front electrodes 31 and the two bottom electrodes 32. To secure. The first conductive layer 52 is a plating layer formed on the side surface seed layer 51, the front electrode 31 and the bottom electrode 32 by a plating method such as a barrel plating method, and the material thereof is nickel metal. Is preferable.
In order to obtain solderability at the time of mounting the high power resistor of the present invention, the second conductive layer 53 is a tin metal layer coated on the first conductive layer 52 by a plating method such as a barrel plating method. Is preferable. The feature of this embodiment is that the side surface seed layer 51 is previously formed on the two tongue side surfaces 3 of the substrate 10, whereby the first conductive layer 52 is the side surface seed layer 51 as an intermediate medium. The point is that the substrate 10 can be firmly adhered to the end side surface 13 of the substrate 10.

Further, as shown in FIG. 10, in the high power resistor of the present invention, an intermediate layer 54 made of titanium metal or copper metal is provided between the two side surface seed layers 51 and both side end faces 13 of the substrate 10. It is preferable to further prepare. In order to firmly bond the side surface seed layer 51 to the two opposite end side surfaces 13 of the substrate 10, the side surface seed layer 51 is formed on the side surface seed layer 51 by a spattering method. An intermediate layer 54 made of titanium metal or copper metal is formed thinly by a spattering method at a planned formation position of the seed layer 51. The thickness of the intermediate layer 54 is preferably thinner than or equal to 100 μm, and the one made of titanium metal has better adhesiveness to the substrate 10 and silver ions or other metal ions. Since the free transition of the substrate 10 is prevented and the substrate 10 is less likely to rust, it is possible to prevent the occurrence of a peeling phenomenon on the two opposite end side surfaces 13 of the substrate 10.

FIG. 11 shows a simplified circuit diagram of the two surface electrodes 31 and the resistor layer 20 in the high power resistor according to the present invention, and the equivalent resistance value of the high power resistor is the resistance layer 20. It is the sum of the equivalent resistance value and the equivalent resistance value of each parallel combined resistance in which the resistor layer 20 and the two surface electrodes 31 are connected in parallel. More specifically, the current is introduced from the second conductive layer 53 into the first conductive layer 52 and flows into one of the front electrodes 31 (equivalent resistance value R2), and the front electrode 31 and the resistor layer 20 are introduced. It flows into the resistor layer 20 (equivalent resistance value R1') at the portion overlapping with the table electrode 31 through the overlapping contact surface 311 between the two, and then the resistance layer 20 (equivalent) at the portion not overlapping with each other. The resistance value R1'') flows. After that, it flows into the resistor layer 20 (equivalent resistance value R1') at the portion overlapping the other surface electrode 31, and finally passes through the overlapping contact surface 311 between the surface electrode 31 and the resistor layer 20. Then, it flows into the other front electrode 31 (equivalent resistance value R2).
Here, since the two surface electrodes 31 and the resistor layer 20 at the portion overlapping the table electrodes 31 are connected in parallel, they are located between the two surface electrodes 31 in the high power resistor of the present invention. The formula for calculating the equivalent resistance value R3 is R3 = (R1'× R2) / (R1'+ R2) + R1'' + (R1'× R2) / (R1'+ R2). In short, the current flowing between the front electrode 31 and the resistor layer 20 flows through a resistor connected in parallel and then a resistor connected in series, so that the high power resistor of the present invention withstands a larger amount of power. be able to.

The table below shows the results of reliability tests on high power resistors manufactured by the manufacturing method of the present invention, and the standards of this reliability test method are 6 ohms (Ω), 11Ω, 110Ω, and so on. Output higher than the rated power by applying a constant voltage and a constant current for 60 seconds with a resistor of 0.5W, 0.75W, 1W, and 2W, respectively, to a resistor with a rated power of 280Ω and a rated power of 0.5W. Test if it can withstand. In the table below, if the reliability test is passed, it is described as "PASS", and if the reliability test fails, it is described as "N / A".

Tables 1A and 1B show the test results of a total of 30 sets of high power resistors according to the present invention having a resistance value of 6Ω.

Tables 2A and 2B show the test results of a total of 30 sets of high power resistors according to the present invention having a resistance value of 11Ω.

Tables 3A and 3B show the test results of a total of 30 sets of high power resistors according to the present invention having a resistance value of 110Ω.

Table 4 shows the test results of a total of 30 sets of high power resistors according to the present invention having a resistance value of 280 Ω.

According to the test results shown in Tables 1A and 1B above, all 30 sets of high power resistors according to the present invention having a resistance value of 6Ω have applied powers of 0.5W, 0.75W, 1W, and 2W. It was found that the reliability test of constant voltage and constant current was passed. According to the test results shown in Tables 2A and 2B above, all the high power resistors according to the present invention having a resistance value of 11Ω and a total of 30 sets have applied powers of 0.5W, 0.75W, 1W and 2W. It was found that the reliability test of constant voltage and constant current was passed. According to the test results shown in Tables 3A and 3B above, the resistance values are 110Ω, and all 30 sets of high-power resistors according to the present invention have applied powers of 0.5W, 0.75W, and 1W. It passed the constant voltage and constant current reliability test and the constant voltage reliability test when the applied power was 2W, but 10 of them failed the constant current reliability test when the applied power was 2W (N). / A) It turned out that it was done. According to the test results shown in Table 4 above, the resistance value is 280Ω, and all 30 sets of high-power resistors according to the present invention have constant voltage and constant current when the applied power is 0.5W and 0.75W. In the constant voltage reliability test with applied power of 1 W, 3 sets failed (N / A), and in the constant current reliability test with applied power of 1 W, the remaining 17 It turned out that all the pairs failed (N / A). Since all high power resistors with a resistance value of 280Ω failed the reliability test with an applied power of 1W, the reliability test with an applied power of 2W is not performed.

Summarizing the above test results, it was found that all the high power resistors of the present invention having resistance values of 6Ω and 11Ω can withstand an applied power of 2W, which is much higher than the rated power of 0.5W. Further, it was found that all the high power resistors of the present invention having a resistance value of 110Ω can withstand an applied power of 1W, which is twice as high as the rated power of 0.5W, and are used for a constant current reliability test at an applied power of 2W. On the other hand, it turned out that some failed. It was found that all the high power resistors of the present invention having a resistance value of 280Ω can withstand an applied power of 0.75W, which is higher than the rated power of 0.5W. Although only a part of them failed, it was found that they could not withstand the constant current at the applied power of 1 W.

According to the above test results, in the high power resistor manufactured by the manufacturing method of the present invention, the high power resistor of the embodiment of the low resistance value (6Ω, 11Ω) has an applied power four times higher than the rated power. It was found that the high power resistor of the embodiment having a high resistance value (110Ω, 280Ω) can stably withstand the applied power that is twice as high as the rated power.

Further, the high power resistor manufactured by the manufacturing method of the present invention is a resistor by providing a seed layer 21 as an intermediate medium between the resistor layer 20 and the surface electrode 31 as compared with the manufacturing method of the prior art. A strong bond between the layer 20 and the surface electrode 31 is possible, the thickness of the surface electrode 31 can be formed to be thicker than that of the conventional printed electrode layer, and the resistor layer 20 and the surface electrode 31 are further formed. It has been found to have significant technological advances over the previous low resistance chip resistors, as they have lower conduction resistance between them.

The above description is merely a preferred embodiment of the present invention, and does not limit the present invention in any way. Although the present invention has been disclosed as described above with relatively suitable embodiments, the present invention is not limited to the present invention, and the art of the present invention is to the extent that all those skilled in the art do not deviate from the technical concept of the present invention. Any simple modifications, modifications and modifications made to the above embodiments based on the essence of the present invention are still within the scope of the present invention.

10 Substrate 11 First surface 12 Second surface 13 Side end surface 20 Resistor layer 21 Seed layer 31 Table electrode 311 Overlapping contact surface 312 Top surface 32 Bottom electrodes 33A, 33B Patterned photoresist layer 34 First patterned photoresist layer 35 Second patterned photoresist layer 41 First protective layer 411 Side surface 42 Second protective layer 51 Side seed layer 52 First conductive layer 53 Second conductive layer 54 Intermediate layer 80 Substrate 81 Printing resistor layer 810 Contact surface 82 Printing Electrode layer 90 Substrate 91 Resist layer 92 Conductive layer 93 Protective layer 94 First coating layer 95 Second coating layer

In order to solve the above problems, the present invention is a method for manufacturing a high power resistor.
A step of preparing a substrate and forming a resistor layer on the first surface of the substrate by a sputtering method, and a step of forming a conductive seed layer on the resistor layer by a sputtering method . A step of forming two surface electrodes having a thickness in the range of 30 μm to 100 μm on the seed layer by a rack plating method, and removing a part of the seed layer and a part of the resistor layer to remain. The step of forming the resistance pattern and the seed layer not covered by the two surface electrodes in the resistance pattern are removed from the seed layer and the resistor layer to obtain the resistor layer of the resistance pattern. The step of exposing, the step of forming an intermediate layer on the opposite side end faces of the substrate by a sputtering method, and the step of forming a side seed layer on each of the two intermediate layers, respectively, and the two side seed layers are formed. , From the first surface to the second surface of the substrate opposite to the first surface, formed on the two surface electrodes on the first surface and on the second surface. It is characterized by including a step of electrically connecting the two bottom electrodes and a step of forming two first conductive layers on the two side surface seed layers .

In order to solve the above problems, the high power resistor manufactured by the method for manufacturing a high power resistor according to the present invention has a first surface , a second surface facing the first surface, and two side end faces facing each other. A substrate having a It is formed on the second surface of the substrate , a seed layer having two surface electrodes and having conductivity and being formed so as to be sandwiched between the resistor layer and the two surface electrodes by a sputtering method. The two bottom electrodes are conductive and are formed on both end faces of the substrate so as to extend from the first surface to the second surface, and the two front electrodes and the two bottom electrodes are formed. Between the two side surface seed layers, the two first conductive layers formed on the two side surface seed layers, the two side surface seed layers, and the both end faces of the substrate. It is characterized by comprising two intermediate layers formed by the method .

As shown in FIG. 2, in one embodiment of the present invention, after the resistance layer 20 is formed, a conductive seed layer 21 is formed on the resistance layer 20 by a sputtering method. It is preferable to simultaneously form another seed layer 21 on the resistor layer 20 of the second surface 121. Specifically describing the manufacturing process, the seed layer 21 is formed by a sputtering method so as to completely cover the surface of the resistor layer 20. The resistivity α1 of the resistor layer 20 material is preferably larger than the resistivity α2 of the seed layer 21 material.
The sputtering target material of the seed layer 21 uses the same metal material as the materials of the two table electrodes 31, whereby when the table electrode 31 is formed on the seed layer 21, the seed layer 21 is formed. It can be stably and firmly joined on top. For example, when copper metal is used as the material of the table electrode 31, copper metal can also be selected as the sputtering target material of the seed layer 21, but the material is not limited to this, and depending on the desired purpose, the material may be selected. The material of the surface electrode 31 and the sputtering target material of the seed layer 21 may be the same or different metal materials.

After removing a part of the seed layer 21 and a part of the resistor layer 20 and forming a resistance pattern with the remaining seed layer 21 and the resistor layer 20, the two in the resistance pattern. A step of removing a part of the seed layer 21 that is not covered by the two surface electrodes 31 is performed. The required resistance layer 20 is completed by covering the resist layer 35, then removing the seed layer 21 in the resistance pattern region, and exposing the resistance layer 20 under the resistance layer 20. When removing the seed layer 21 in the resistance pattern region, it is preferable to remove it by an etching method.
The high-power resistor manufactured by the manufacturing method of the present invention includes a substrate 10 having a first surface 11, a resistor layer 20 formed on the first surface 11, and two resistors formed on the resistor layer 20. It includes one surface electrode 31 and a seed layer 21 arranged so as to be sandwiched between the two surface electrodes 31 and the resistor layer 20.

Claims (21)

It is a manufacturing method of high power resistors.
A step of preparing a substrate and forming a resistor layer on the first surface of the substrate,
The step of forming a conductive seed layer on the resistor layer,
The step of forming two table electrodes on the seed layer and
A step of removing a part of the seed layer and a part of the resistor layer and forming a resistance pattern by the remaining seed layer and the resistor layer.
The resistance pattern comprises removing the seed layer not covered by the two surface electrodes to expose the resistor layer of the resistance pattern.
How to manufacture high power resistors. In the step of forming the resistor layer on the first surface of the substrate, the resistor layer is formed on the first surface of the substrate by a sputtering method so as to completely cover the first surface of the substrate. The method for manufacturing a high power resistor according to claim 1, wherein the high power resistor is manufactured. In the step of forming a conductive seed layer on the resistor layer, the seed layer is characterized by being formed on the resistor layer by a sputtering method so as to completely cover the resistor layer. The method for manufacturing a high power resistor according to claim 1. The steps of forming the two surface electrodes on the seed layer are a step of partially covering the seed layer so that a part of the seed layer is exposed, and a step in the seed layer. The portion exposed from the patterned photoresist layer is characterized by comprising a step of forming two surface electrodes by a plating method and then removing the patterned photoresist layer, and a sub-step to execute the steps. The method for manufacturing a high power resistor according to claim 1. The step of removing a part of the seed layer and a part of the resistor layer and forming a resistance pattern by the remaining seed layer and the resistor layer is a first pattern that matches the outer shape of the resistance pattern. The step of coating the seed layer and the two surface electrodes with the photoresist layer, and removing a part of the seed layer and the resistor layer not coated with the first patterned photoresist layer, and then the step. The method for manufacturing a high power resistor according to claim 1, further comprising a step of removing the first patterned photoresist layer and a sub-step of performing the first patterned photoresist layer. In the resistance pattern, the step of removing the seed layer not covered by the two surface electrodes to expose the resistor layer of the resistance pattern is the surface of the portion of the substrate other than the resistance pattern and the two tables. The step of coating the electrode with the second patterned photoresist layer and the step of removing the seed layer not coated with the second patterned photoresist layer, and coating the two surface electrodes in the region of the resistance pattern. The manufacture of the high power resistor according to claim 5, further comprising a sub-step of exposing the unsheathed resistor layer and then removing the second patterned photoresist layer. Method. After the step of exposing the resistor layer of the resistance pattern, a first protective layer is formed on the resistor layer, and the first protective layer is placed between the two surface electrodes so as to straddle the two surface electrodes. The height of the lateral surface of the first protective layer that covers the surface of the resistor layer and is in contact with the surface electrode is lower than the height from the top surface to the bottom surface of the surface electrode, and further, the height thereof. The method for manufacturing a high power resistor according to claim 1, wherein a second protective layer is formed on the first protective layer. After the step of exposing the resistor layer of the resistance pattern, side surface seed layers are formed on the opposite side end faces of the substrate, respectively, and the two side surface seed layers are transferred from the first surface to the substrate. It extends to the second surface, which is the surface opposite to the first surface, and electrically connects the two front electrodes on the first surface and the two bottom electrodes formed on the second surface. A step of performing a step, a step of forming two first conductive layers on the two side surface seed layers, and a step of forming two second conductive layers on the two first conductive layers. The method for manufacturing a high power resistor according to claim 1, further comprising. The method for manufacturing a high power resistor according to claim 1, wherein the thickness of the two table electrodes is in the range of 30 to 100 μm. It ’s a high power resistor,
A substrate having a first surface and
A resistor layer formed on the first surface of the substrate and
The two surface electrodes formed on the resistor layer and
It has conductivity and is characterized by including a seed layer formed so as to be sandwiched between the resistor layer and the two surface electrodes.
High power resistor. The high power resistor further includes a first protective layer and a second protective layer, and the surface of the resistor layer between the two surface electrodes is formed so that the first protective layer straddles the two surface electrodes. The height of the lateral surface of the first protective layer that is covered and in contact with the front electrode is lower than the height from the top surface to the bottom of the front electrode, and the second protective layer is the first. The high power resistor according to claim 10, wherein the high power resistor is formed on the first protective layer so as to cover the protective layer. The substrate has two side end faces facing each other and a second surface facing the first surface, and the high power resistor has two bottom electrodes formed on the second surface of the substrate. It is conductive and is formed on both end faces of the substrate so as to extend from the first surface to the second surface, and electrically connects the two front electrodes and the two bottom electrodes. It is characterized by including two side surface seed layers, two first conductive layers formed on the two side surface seed layers, and two second conductive layers formed on the two first conductive layers. The high power resistor according to claim 10. The high power resistor according to claim 12, further comprising two intermediate layers made of titanium metal or copper metal between the two side surface seed layers and both side end faces of the substrate. The equivalent resistance value of the high-power resistor is the sum of the equivalent resistance value of the resistor layer and the equivalent resistance value of each parallel combined resistance in which the resistor layer and the two surface electrodes are connected in parallel. The high power resistor according to claim 10. The formula for calculating the equivalent resistance value R3 of the high power resistor is
R3 = (R1'x R2) / (R1'+ R2) + R1'' + (R1'x R2) / (R1'+ R2)
R1'is the equivalent resistance value of the portion of the resistor layer that overlaps with the two surface electrodes, and R1'' does not overlap with the two surface electrodes of the resistor layer. The high power resistor according to claim 10, wherein the R2 is an equivalent resistance value of a portion and is an equivalent resistance value of the two front electrodes. The high power resistor according to claim 10, wherein the resistance coefficient of the resistor layer is larger than the drag coefficient of the seed layer or the table electrode. The high power resistor according to claim 10, wherein the front electrode and the seed layer are made of the same metal material. The high power resistor according to claim 10, wherein the front electrode and the seed layer are made of different metal materials. The high power resistor according to claim 10, wherein the material of the resistor layer is a titanium alloy, a silver-copper alloy, a manganese-copper alloy, a nickel-copper alloy, titanium nitride, or aluminum nitride tantalum. The high power resistor according to claim 10, wherein the material of the resistor layer is a nickel-chromium alloy. The high power resistor according to claim 20, wherein the material of the resistor layer is a nickel-chromium copper alloy or a nickel-chromium silicon alloy.

Images