JP2021506104A5 - - Google Patents

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Publication number
JP2021506104A5
JP2021506104A5 JP2020528968A JP2020528968A JP2021506104A5 JP 2021506104 A5 JP2021506104 A5 JP 2021506104A5 JP 2020528968 A JP2020528968 A JP 2020528968A JP 2020528968 A JP2020528968 A JP 2020528968A JP 2021506104 A5 JP2021506104 A5 JP 2021506104A5
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JP
Japan
Prior art keywords
conductor portion
integrated circuit
interconnect structure
isolation
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2020528968A
Other languages
English (en)
Japanese (ja)
Other versions
JP6971403B2 (ja
JP2021506104A (ja
Filing date
Publication date
Priority claimed from US15/836,239 external-priority patent/US10636736B2/en
Application filed filed Critical
Publication of JP2021506104A publication Critical patent/JP2021506104A/ja
Publication of JP2021506104A5 publication Critical patent/JP2021506104A5/ja
Application granted granted Critical
Publication of JP6971403B2 publication Critical patent/JP6971403B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2020528968A 2017-12-08 2018-09-18 高速端子のランドパッド設計 Active JP6971403B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US15/836,239 US10636736B2 (en) 2017-12-08 2017-12-08 Land pad design for high speed terminals
US15/836,239 2017-12-08
PCT/US2018/051539 WO2019112674A1 (en) 2017-12-08 2018-09-18 Land pad design for high speed terminals

Publications (3)

Publication Number Publication Date
JP2021506104A JP2021506104A (ja) 2021-02-18
JP2021506104A5 true JP2021506104A5 (https=) 2021-08-26
JP6971403B2 JP6971403B2 (ja) 2021-11-24

Family

ID=66697217

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2020528968A Active JP6971403B2 (ja) 2017-12-08 2018-09-18 高速端子のランドパッド設計

Country Status (6)

Country Link
US (1) US10636736B2 (https=)
EP (1) EP3721474A4 (https=)
JP (1) JP6971403B2 (https=)
KR (1) KR102410350B1 (https=)
CN (1) CN111406317B (https=)
WO (1) WO2019112674A1 (https=)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11276650B2 (en) 2019-10-31 2022-03-15 Avago Technologies International Sales Pte. Limited Stress mitigation structure

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5966020A (en) * 1996-10-30 1999-10-12 Intel Corporation Method and apparatus for facilitating detection of solder opens of SMT components
JP2000113920A (ja) * 1998-10-01 2000-04-21 Mitsubishi Electric Corp モジュール
US6522011B1 (en) 2000-08-15 2003-02-18 Micron Technology, Inc. Low capacitance wiring layout and method for making same
US6602078B2 (en) * 2001-03-16 2003-08-05 Cenix, Inc. Electrical interconnect having a multi-layer circuit board structure and including a conductive spacer for impedance matching
US7101021B2 (en) * 2001-07-30 2006-09-05 Seiko Epson Corporation Connection apparatus for circuit board, ink jet type recording apparatus using the same, IC chip and ink cartridge having IC chip
JP2004063081A (ja) * 2002-07-24 2004-02-26 Renesas Technology Corp 半導体パッケージ用ソケット
US6916181B2 (en) * 2003-06-11 2005-07-12 Neoconix, Inc. Remountable connector for land grid array packages
US7196907B2 (en) * 2004-02-09 2007-03-27 Wen-Chun Zheng Elasto-plastic sockets for Land or Ball Grid Array packages and subsystem assembly
TWI280693B (en) * 2004-09-10 2007-05-01 Hon Hai Prec Ind Co Ltd Electrical connector
KR100819887B1 (ko) * 2005-11-25 2008-04-07 윤동구 집적회로 홀더, 시스템 보드 및 이를 위한 집적회로 패키지
US8102184B2 (en) * 2006-01-17 2012-01-24 Johnstech International Test contact system for testing integrated circuits with packages having an array of signal and power contacts
JP2008209237A (ja) 2007-02-26 2008-09-11 Kyocera Corp プローブカード・アセンブリ用基板およびプローブカード・アセンブリ
US7618849B2 (en) * 2007-10-22 2009-11-17 Broadcom Corporation Integrated circuit package with etched leadframe for package-on-package interconnects
US8007286B1 (en) * 2008-03-18 2011-08-30 Metrospec Technology, Llc Circuit boards interconnected by overlapping plated through holes portions
US8558396B2 (en) 2011-07-12 2013-10-15 Intersil Americas Inc. Bond pad configurations for semiconductor dies
US10433421B2 (en) * 2012-12-26 2019-10-01 Intel Corporation Reduced capacitance land pad
US9633914B2 (en) * 2015-09-15 2017-04-25 International Business Machines Corporation Split ball grid array pad for multi-chip modules
US9466900B1 (en) 2015-10-07 2016-10-11 Advanced Micro Devices, Inc. Circuit board socket with rail frame
CN107134669B (zh) * 2016-02-26 2019-11-26 泰科电子(上海)有限公司 连接器和连接器组件

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