JP2021182857A - 双方向ダブルベースバイポーラ接合トランジスタを用いたスイッチアセンブリ、及びそれを動作させる方法 - Google Patents
双方向ダブルベースバイポーラ接合トランジスタを用いたスイッチアセンブリ、及びそれを動作させる方法 Download PDFInfo
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- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
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- H03K17/666—Switching arrangements for passing the current in either direction at will; Switching arrangements for reversing the current at will connected to one load terminal only the output circuit comprising more than one controlled bipolar transistor
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- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/60—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
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Abstract
Description
特定のシステムコンポーネントを参照するために様々な用語が使用されている。異なる会社は異なる名前でコンポーネントを参照することあり、この文書は、名前は異なるが機能は異ならないコンポーネントを区別することを意図していない。以下の説明及び請求項において、用語“含む”及び“有する”は、オープンエンド的に使用され、従って、“含むが、それに限られない”を意味すると解釈されるべきである。また、用語“結合する”は、間接的な接続又は直接的な接続のどちらも意味することを意図している。従って、第1のデバイスが第2のデバイスに結合する場合、その接続は、直接接続によってでもよいし、又は他のデバイス及び接続を介した間接接続によってでもよい。
Claims (12)
- 双方向ダブルベースバイポーラ接合トランジスタを動作させる方法であって、
前記トランジスタの上部ベースに第1のレートで電荷キャリアを注入し、該第1のレートで注入することは、上部コレクタ−エミッタから下部コレクタ−エミッタへと前記トランジスタを流れる電流を生じさせ、該電流は、前記上部コレクタ−エミッタと前記下部コレクタ−エミッタとの間で測定して第1の電圧降下を生じさせ、次いで、
前記トランジスタの第1の導通期間の終了前の所定の期間内、前記上部ベースに前記第1のレートよりも低い第2のレートで電荷キャリアを注入し、該第2のレートで注入することは、前記上部コレクタ−エミッタと前記下部コレクタ−エミッタとの間で測定して第2の電圧降下を生じさせ、該第2の電圧降下は、前記第1の電圧降下よりも高く、次いで、
前記第1の導通期間の終了時に前記トランジスタを非導通にする、
ことを有する方法。 - 前記トランジスタを非導通にすることは更に、前記トランジスタの下部ベースを前記トランジスタの下部コレクタ−エミッタに直接結合し、前記上部ベースから電荷キャリアを引き抜くことを有する、請求項1に記載の方法。
- 当該方法は更に、前記第1のレートで電荷キャリアを注入することに先立って、前記上部ベースに前記第1のレートよりも高い第3のレートで電荷キャリアを注入することを有し、前記第3のレートで電荷キャリアを注入することは、前記トランジスタの非導通状態から導通状態へのスイッチング時間を短縮するためである、請求項1に記載の方法。
- 前記上部ベースに前記第1のレートで電荷キャリアを注入することは更に、前記上部コレクタ−エミッタと前記上部ベースとの間に第1の電圧源を結合すること及び前記上部コレクタ−エミッタと前記上部ベースとの間に第1の電流源を結合することからなる群から選択された少なくとも一方を有する、請求項1に記載の方法。
- 前記第1の電圧降下は0.2ボルト以下であり、前記第2の電圧降下は0.4ボルトより高い、請求項1に記載の方法。
- 上部ベース、上部コレクタ−エミッタ、下部ベース、及び下部コレクタ−エミッタを画成するバイポーラ接合トランジスタと、
前記上部ベースに結合された上部ベース端子、前記上部コレクタ−エミッタに結合された上部導通端子、前記下部ベースに結合された下部ベース端子、及び前記下部コレクタ−エミッタに結合された下部導通端子を画成するドライバであり、
前記上部ベースに第1のレートで電荷キャリアを注入し、該第1のレートで電荷キャリアを注入することは、前記上部コレクタ−エミッタから前記下部コレクタ−エミッタへの前記トランジスタの第1の導電率をもたらし、
第1の導通期間の終了を予測し、
前記第1の導通期間の終了前の所定の期間内、前記上部ベースに前記第1のレートよりも低い第2のレートで電荷キャリアを注入し、該第2のレートで電荷キャリアを注入することは、前記上部コレクタ−エミッタから前記下部コレクタ−エミッタへの前記トランジスタの第2の導電率をもたらし、該第2の導電率は、前記第1の導電率よりも低く、次いで、
前記第1の導通期間の終了時に前記トランジスタを非導通にする、
ように構成されたドライバと、
を有するスイッチアセンブリ。 - 前記ドライバは更に、
コントローラと、
第1の出力を画成する第1の電荷キャリア源と、
前記第1の出力に結合された第1の接続、前記上部ベースに結合された第2の接続、及び前記コントローラに結合された第1の制御入力を画成する第1の電気制御式スイッチと、
を有し、
前記ドライバが前記上部ベースに前記第1のレートで電荷キャリアを注入するとき、前記コントローラは、前記第1の制御入力をアサートすることによって、前記第1の電気制御式スイッチを導通させるように構成される、
請求項6に記載のスイッチアセンブリ。 - 第2の出力を画成する第2の電荷キャリア源であり、前記第1の電荷キャリア源とは別個の第2の電荷キャリア源と、
前記第2の出力に結合された第1の接続、前記上部ベースに結合された第2の接続、及び前記コントローラに結合された第2の制御入力を画成する第2の電気制御式スイッチと、
を更に有し、
前記ドライバが前記上部ベースに前記第2のレートで電荷キャリアを注入するとき、前記コントローラは、前記第2の制御入力をアサートすることによって、前記第2の電気制御式スイッチを導通させるように構成される、
請求項7に記載のスイッチアセンブリ。 - 前記第1の電荷キャリア源によって画成されるセットポイント入力であり、前記コントローラに結合されたセットポイント入力、
を更に有し、
前記ドライバが前記上部ベースに前記第2のレートで電荷キャリアを注入するとき、前記コントローラは、前記第1の電荷キャリア源によって供給される電荷キャリアのレートを低下させるように構成される、
請求項7に記載のスイッチアセンブリ。 - 前記第1の電荷キャリア源は、電圧源及び電流源からなる群から選択された少なくとも一方である、請求項7に記載のスイッチアセンブリ。
- コントローラと、
電荷キャリアを発生させる手段と、
電荷キャリアを発生させる前記手段に結合された第1の接続、前記上部ベースに結合された第2の接続、及び前記コントローラに結合された第1の制御入力を画成する第1の電気制御式スイッチと、
前記下部コレクタ−エミッタに結合された第1の接続、前記下部ベースに結合された第2の接続、及び前記コントローラに結合された第2の制御入力を画成する第2の電気制御式スイッチと、
を更に有し、
前記ドライバが前記トランジスタを非導通にするとき、前記コントローラは、
前記第1の制御入力をアサートすることによって前記第1の電気制御式スイッチを導通させ、前記上部ベースを通じて電荷キャリアを引き抜き、次いで、
前記第1の制御入力をデアサートすることによって前記第1の電気制御式スイッチを非導通にし、且つ
前記第2の制御入力をアサートすることによって前記第2の電気制御式スイッチを導通させる、
ように構成される、
請求項6に記載のスイッチアセンブリ。 - 前記ドライバは更に、前記第1のレートで電荷キャリアを注入することに先立って、前記上部ベースに前記第1のレートよりも高い第3のレートで電荷キャリアを注入するように構成され、前記第3のレートで電荷キャリアを注入することは、前記トランジスタのオフモードから導通状態へのスイッチング時間を短縮するためである、
請求項6に記載のスイッチアセンブリ。
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US202063026597P | 2020-05-18 | 2020-05-18 | |
US63/026597 | 2020-05-18 | ||
US17/317,466 US11411557B2 (en) | 2020-05-18 | 2021-05-11 | Method and system of operating a bi-directional double-base bipolar junction transistor (B-TRAN) |
US17/317466 | 2021-05-11 |
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US11069797B2 (en) | 2016-05-25 | 2021-07-20 | Ideal Power Inc. | Ruggedized symmetrically bidirectional bipolar power transistor |
KR102654340B1 (ko) | 2021-08-10 | 2024-04-02 | 아이디얼 파워 인크. | 양방향 트렌치 파워 스위치를 위한 시스템 및 방법 |
KR102389427B1 (ko) | 2021-10-25 | 2022-04-22 | 웰트 주식회사 | 보행 데이터를 이용한 낙상 위험 예방 방법 및 이러한 방법을 수행하는 장치 |
US20240154029A1 (en) * | 2022-11-09 | 2024-05-09 | Ideal Power Inc. | Methods and systems of operating a pnp bi-directional double-base bipolar junction transistor |
WO2024123521A1 (en) | 2022-12-08 | 2024-06-13 | Ideal Power Inc. | Bidirectional bipolar junction transistor devices from bonded wide and thick wafers |
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JP2011211836A (ja) | 2010-03-30 | 2011-10-20 | Panasonic Corp | スイッチングデバイス駆動装置および半導体装置 |
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JP6391623B2 (ja) | 2016-05-13 | 2018-09-19 | 三菱電機株式会社 | スイッチング素子駆動回路、パワーモジュールおよび自動車 |
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