JP2021082767A - キット、及び、そのキットを用いる第三積層体の製造方法 - Google Patents

キット、及び、そのキットを用いる第三積層体の製造方法 Download PDF

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Publication number
JP2021082767A
JP2021082767A JP2019210862A JP2019210862A JP2021082767A JP 2021082767 A JP2021082767 A JP 2021082767A JP 2019210862 A JP2019210862 A JP 2019210862A JP 2019210862 A JP2019210862 A JP 2019210862A JP 2021082767 A JP2021082767 A JP 2021082767A
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JP
Japan
Prior art keywords
film
protective film
forming film
work
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2019210862A
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English (en)
Japanese (ja)
Other versions
JP7540884B2 (ja
Inventor
山本　大輔
Daisuke Yamamoto
大輔 山本
健太 古野
Kenta FURUNO
健太 古野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lintec Corp
Original Assignee
Lintec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lintec Corp filed Critical Lintec Corp
Priority to JP2019210862A priority Critical patent/JP7540884B2/ja
Priority to KR1020200153455A priority patent/KR20210062567A/ko
Priority to TW109140197A priority patent/TW202126764A/zh
Priority to CN202011302234.3A priority patent/CN112825305A/zh
Publication of JP2021082767A publication Critical patent/JP2021082767A/ja
Priority to JP2024069174A priority patent/JP2024097803A/ja
Application granted granted Critical
Publication of JP7540884B2 publication Critical patent/JP7540884B2/ja
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00—Layered products comprising a layer of synthetic resin
    • B32B27/06—Layered products comprising a layer of synthetic resin as the main or only constituent of a layer, which is next to another layer of the same or of a different material
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B33/00—Layered products characterised by particular properties or particular surface features, e.g. particular surface coatings; Layered products designed for particular purposes not covered by another single class
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B7/00—Layered products characterised by the relation between layers; Layered products characterised by the relative orientation of features between layers, or by the relative values of a measurable parameter between layers, i.e. products comprising layers having different physical, chemical or physicochemical properties; Layered products characterised by the interconnection of layers
    • B32B7/04—Interconnection of layers
    • B32B7/06—Interconnection of layers permitting easy separation
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B7/00—Layered products characterised by the relation between layers; Layered products characterised by the relative orientation of features between layers, or by the relative values of a measurable parameter between layers, i.e. products comprising layers having different physical, chemical or physicochemical properties; Layered products characterised by the interconnection of layers
    • B32B7/04—Interconnection of layers
    • B32B7/12—Interconnection of layers using interposed adhesives or interposed materials with bonding properties
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68368—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68381—Details of chemical or physical process used for separating the auxiliary support from a device or wafer
    • H01L2221/68386—Separation by peeling

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Adhesive Tapes (AREA)
  • Dicing (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Laminated Bodies (AREA)
JP2019210862A 2019-11-21 2019-11-21 キット、及び、そのキットを用いる第三積層体の製造方法 Active JP7540884B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2019210862A JP7540884B2 (ja) 2019-11-21 2019-11-21 キット、及び、そのキットを用いる第三積層体の製造方法
KR1020200153455A KR20210062567A (ko) 2019-11-21 2020-11-17 키트 및 그 키트를 사용하는 제3 적층체의 제조 방법
TW109140197A TW202126764A (zh) 2019-11-21 2020-11-18 組件、以及使用該組件之第三積層體之製造方法
CN202011302234.3A CN112825305A (zh) 2019-11-21 2020-11-19 套件、及使用该套件的第三层叠体的制造方法
JP2024069174A JP2024097803A (ja) 2019-11-21 2024-04-22 キット、及び、そのキットを用いる第三積層体の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2019210862A JP7540884B2 (ja) 2019-11-21 2019-11-21 キット、及び、そのキットを用いる第三積層体の製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2024069174A Division JP2024097803A (ja) 2019-11-21 2024-04-22 キット、及び、そのキットを用いる第三積層体の製造方法

Publications (2)

Publication Number Publication Date
JP2021082767A true JP2021082767A (ja) 2021-05-27
JP7540884B2 JP7540884B2 (ja) 2024-08-27

Family

ID=75906551

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2019210862A Active JP7540884B2 (ja) 2019-11-21 2019-11-21 キット、及び、そのキットを用いる第三積層体の製造方法
JP2024069174A Pending JP2024097803A (ja) 2019-11-21 2024-04-22 キット、及び、そのキットを用いる第三積層体の製造方法

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2024069174A Pending JP2024097803A (ja) 2019-11-21 2024-04-22 キット、及び、そのキットを用いる第三積層体の製造方法

Country Status (4)

Country Link
JP (2) JP7540884B2 (ko)
KR (1) KR20210062567A (ko)
CN (1) CN112825305A (ko)
TW (1) TW202126764A (ko)

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002280329A (ja) * 2001-03-21 2002-09-27 Lintec Corp チップ用保護膜形成用シートおよび半導体チップの製造方法
JP2005317712A (ja) * 2004-04-28 2005-11-10 Lintec Corp ウエハ処理装置
JP2010056328A (ja) * 2008-08-28 2010-03-11 Furukawa Electric Co Ltd:The チップ保護用フィルム
JP2012224062A (ja) * 2011-04-22 2012-11-15 Shin-Etsu Chemical Co Ltd 樹脂積層体、及び半導体装置とその製造方法
WO2016098697A1 (ja) * 2014-12-19 2016-06-23 リンテック株式会社 樹脂膜形成用シート積層体
JP2016141749A (ja) * 2015-02-03 2016-08-08 リンテック株式会社 保護膜形成用シート、及び保護膜形成用複合シート
WO2017077809A1 (ja) * 2015-11-04 2017-05-11 リンテック株式会社 半導体装置の製造方法
WO2019082963A1 (ja) * 2017-10-27 2019-05-02 リンテック株式会社 保護膜形成用フィルム、保護膜形成用複合シート、及び半導体チップの製造方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4271597B2 (ja) 2004-02-27 2009-06-03 リンテック株式会社 チップ用保護膜形成用シート
US9786541B2 (en) 2011-09-30 2017-10-10 Lintec Corporation Dicing sheet with protective film forming layer and chip fabrication method
WO2014157426A1 (ja) 2013-03-27 2014-10-02 リンテック株式会社 保護膜形成用複合シート
JP6530242B2 (ja) 2015-06-01 2019-06-12 日東電工株式会社 半導体裏面用フィルム及びその用途

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002280329A (ja) * 2001-03-21 2002-09-27 Lintec Corp チップ用保護膜形成用シートおよび半導体チップの製造方法
JP2005317712A (ja) * 2004-04-28 2005-11-10 Lintec Corp ウエハ処理装置
JP2010056328A (ja) * 2008-08-28 2010-03-11 Furukawa Electric Co Ltd:The チップ保護用フィルム
JP2012224062A (ja) * 2011-04-22 2012-11-15 Shin-Etsu Chemical Co Ltd 樹脂積層体、及び半導体装置とその製造方法
WO2016098697A1 (ja) * 2014-12-19 2016-06-23 リンテック株式会社 樹脂膜形成用シート積層体
JP2016141749A (ja) * 2015-02-03 2016-08-08 リンテック株式会社 保護膜形成用シート、及び保護膜形成用複合シート
WO2017077809A1 (ja) * 2015-11-04 2017-05-11 リンテック株式会社 半導体装置の製造方法
WO2019082963A1 (ja) * 2017-10-27 2019-05-02 リンテック株式会社 保護膜形成用フィルム、保護膜形成用複合シート、及び半導体チップの製造方法

Also Published As

Publication number Publication date
JP7540884B2 (ja) 2024-08-27
KR20210062567A (ko) 2021-05-31
JP2024097803A (ja) 2024-07-19
TW202126764A (zh) 2021-07-16
CN112825305A (zh) 2021-05-21

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