JP2019195045A - 埋め込み型フィールドプレート電界効果トランジスタ - Google Patents
埋め込み型フィールドプレート電界効果トランジスタ Download PDFInfo
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- JP2019195045A JP2019195045A JP2019021296A JP2019021296A JP2019195045A JP 2019195045 A JP2019195045 A JP 2019195045A JP 2019021296 A JP2019021296 A JP 2019021296A JP 2019021296 A JP2019021296 A JP 2019021296A JP 2019195045 A JP2019195045 A JP 2019195045A
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- 230000005669 field effect Effects 0.000 title claims abstract description 18
- 239000004065 semiconductor Substances 0.000 claims description 95
- 239000002184 metal Substances 0.000 claims description 42
- 210000000746 body region Anatomy 0.000 claims description 35
- 230000002093 peripheral effect Effects 0.000 claims description 17
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 14
- 229920005591 polysilicon Polymers 0.000 claims description 14
- 239000002019 doping agent Substances 0.000 claims description 5
- 230000015556 catabolic process Effects 0.000 abstract description 24
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 19
- 229910052710 silicon Inorganic materials 0.000 description 19
- 239000010703 silicon Substances 0.000 description 19
- 239000000463 material Substances 0.000 description 9
- 239000000758 substrate Substances 0.000 description 7
- 239000003989 dielectric material Substances 0.000 description 3
- 238000000034 method Methods 0.000 description 2
- 238000004088 simulation Methods 0.000 description 2
- 230000006978 adaptation Effects 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
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Abstract
Description
Claims (16)
- エッジ領域と活性領域とを有する半導体ダイ構造であって、前記半導体ダイ構造は、
N―型ドリフト層であって、第1のディープトレンチが前記N―型ドリフト層へと延び、前記第1のディープトレンチは前記半導体ダイ構造の側端に平行に第1の直線となって延び、第2のディープトレンチが前記N―型ドリフト層へと延び、前記第2のディープトレンチは前記第1のディープトレンチの前記第1の直線に平行に第2の直線となって延び、第3のディープトレンチが前記N―型ドリフト層へと延び、前記第3のディープトレンチは前記半導体ダイの前記側端に垂直に第3の直線となって延び前記第2のディープトレンチで終了し、第4のディープトレンチは前記半導体ダイの前記側端に垂直に第4の直線となって延び前記第2のディープトレンチで終了し、前記第1の直線は前記第2の直線に平行であり、前記第3の直線は前記第4の直線に平行であることを特徴とするN―型ドリフト層と、
少なくとも部分的に前記第3のトレンチ内に配置され、少なくとも部分的に前記第4のトレンチ内に配置される埋め込みフィールドプレート構造と、
前記N―型ドリフト層へと延びるP型ボディ領域であって、前記P型ボディ領域は前記第3のディープトレンチと前記第4のディープトレンチとの間の前記半導体ダイ構造の前記活性領域に配置され、前記P型ボディ領域のいかなる部分も前記半導体ダイ構造の前記エッジ領域には延びていないことを特徴とするP型ボディ領域と、
前記P型ボディ領域へと延びるN+型ソース領域であって、前記N+型ソース領域は前記第3のディープトレンチと前記第4のディープトレンチとの間の前記半導体ダイ構造の前記活性領域に配置されることを特徴とするN+型ソース領域と、
前記N―型ドリフト層へと延びる第1のフローティングP型ウェル領域であって、前記第1のフローティングP型ウェル領域は全体的に前記半導体ダイ構造の前記エッジ領域内に配置され、前記第1のフローティングP型ウェル領域は全体的に前記第3のディープトレンチと前記第4のディープトレンチとの間に配置されることを特徴とする第1のフローティングP型ウェル領域と、
前記N―型ドリフト層へと延びる第2のフローティングP型ウェル領域であって、前記第2のフローティングP型ウェル領域は全体的に前記半導体ダイ構造の前記エッジ領域内に配置され、前記第2のフローティングP型ウェル領域は全体的に前記第3のディープトレンチと前記第4のディープトレンチとの間に配置され、前記第1のディープトレンチ、前記第2のディープトレンチ、前記第1のフローティングP型ウェル領域、前記第2のフローティングP型ウェル領域、及び前記P型ボディ領域はこれらが第5の直線に沿って配置されるように配置され、前記第5の直線は前記半導体ダイ構造の側端から垂直に前記第1のディープトレンチと前記第2のディープトレンチを横切って延びそして前記第3のディープトレンチと前記第4のディープトレンチとの間を通って前記半導体ダイ構造の前記活性領域へと延び、前記第1のフローティングP型ウェル領域及び前記第2のフローティングP型ウェル領域は前記第5の直線に沿って前記P型ボディ領域と前記第2のディープトレンチとの間に配置されていることを特徴とする第2のフローティングP型ウェル領域と、
少なくとも部分的に前記第3のディープトレンチ内に配置され、少なくとも部分的に前記第4のディープトレンチ内に配置されるゲート構造であって、前記ゲート構造は前記半導体ダイ構造の前記活性領域内に配置されることを特徴とするゲート構造と、
前記ゲート構造に結合されているゲート電極と、
ドレイン電極と、
前記N+型ソース領域に結合されているソース電極と、
を具備することを特徴とする、
半導体ダイ構造。 - 前記半導体ダイ構造は半導体上部表面を有し、前記N―型ドリフト層は下層部分と上層部分とを具備し、前記N―型ドリフト層の前記下層部分は前記N―型ドリフト層の前記上層部分よりも低濃度のN型ドーパントを有し、前記N―型ドリフト層の前記上層部分は前記N―型ドリフト層の前記下層部分の上に配置され前記半導体上部表面まで延びていることを特徴とする、請求項1に記載の半導体ダイ構造。
- 前記第1のディープトレンチ、前記第2のディープトレンチ、前記第3のディープトレンチ、及び前記第4のディープトレンチの各々は、前記N―型ドリフト層の前記下層部分に延びていることを特徴とする、請求項2に記載の半導体ダイ構造。
- 前記ゲート構造のいかなる部分も前記半導体ダイ構造の前記エッジ領域に延びていないことを特徴とする、請求項1に記載の半導体ダイ構造。
- 前記ソース電極が前記P型ボディ領域に結合されていることを特徴とする、請求項1に記載の半導体ダイ構造。
- 前記埋め込みフィールドプレート構造の第1の部分が前記第1のディープトレンチ内に配置され、前記埋め込みフィールドプレート構造の第2の部分が前記第2のディープトレンチ内に配置され、前記埋め込みフィールドプレート構造の第3の部分が前記第3のディープトレンチ内に配置され、前記埋め込みフィールドプレート構造の第4の部分が前記第4のディープトレンチ内に配置されていることを特徴とする、請求項1に記載の半導体ダイ構造。
- 前記埋め込みフィールドプレート構造は前記P型ボディ領域に電気的に結合されていることを特徴とする、請求項1に記載の半導体ダイ構造。
- 前記埋め込みフィールドプレート構造は前記P型ボディ領域を介して前記ソース電極に電気的に結合されていることを特徴とする、請求項1に記載の半導体ダイ構造。
- 前記N―型ドリフト層へと延びる第3のフローティングP型ウェル領域であって、前記第3のフローティングP型ウェル領域は前記半導体ダイ構造の前記エッジ領域内に全体的に配置され、前記第3のフローティングP型ウェル領域は前記第1のディープトレンチと前記第2のディープトレンチとの間に全体的に配置されていることを特徴とする第3のフローティングP型ウェル領域をさらに具備することを特徴とする、請求項1に記載の半導体ダイ構造。
- 前記N―型ドリフト層へと延びる第3のフローティングP型ウェル領域であって、前記第3のフローティングP型ウェル領域は前記半導体ダイ構造の前記エッジ領域内に全体的に配置され、前記第3のフローティングP型ウェル領域は前記第1のディープトレンチと前記半導体ダイ構造の前記側端との間に全体的に配置されていることを特徴とする第3のフローティングP型ウェル領域をさらに具備することを特徴とする、請求項1に記載の半導体ダイ構造。
- 前記第1のフローティングP型ウェル領域は、前記第2のディープトレンチの側壁の一部を形成していることを特徴とする、請求項1に記載の半導体ダイ構造。
- 前記エッジ領域内の前記埋め込みフィールドプレート構造は、N+型ポリシリコンであり、前記N+型ポリシリコンは前記第3のディープトレンチから上方へと延びそして前記半導体上部層を越えて前記第4のディープトレンチ内へと延びているいることを特徴とする、請求項1に記載の半導体ダイ構造。
- 前記エッジ領域内に配置されたボディ金属層であって前記ボディ金属層のいかなる部分も前記半導体ダイ構造の前記活性領域へと延びてはおらず、前記ボディ金属層は前記エッジ領域内の前記埋め込みフィールドプレート構造のN+型ポリシリコンに電気的に結合されていることを特徴とするボディ金属層をさらに具備することを特徴とする、請求項12に記載の半導体ダイ構造。
- 活性領域とエッジ領域とを有するフィールドプレート電力用Nチャネル電界効果トランジスタダイであって、
ソース金属電極と、
前記ダイの周囲に延びる周辺ディープトレンチであって、前記周辺ディープトレンチにはゲートが配置されておらず、前記周辺ディープトレンチは前記エッジ領域内に配置され、前記周辺ディープトレンチのいかなる部分も前記活性領域には配置されていないことを特徴とする周辺ディープトレンチと、
平行に延びる複数のディープトレンチであって、これらの平行に延びるディープトレンチの各々は前記活性領域から延び前記周辺ディープトレンチで終了していることを特徴とするディープトレンチと、
前記周辺ディープトレンチ内に部分的に配置され、前記平行に延びる複数のディープトレンチ内に部分的に配置されている埋め込みフィールドプレート構造と、
前記活性領域内に配置されたP型ボディ領域であって、前記P型ボディ領域は、前記ソース金属電極に結合されていることを特徴とするP型ボディ領域と、
前記P型ボディ領域内へと延びるN+型ソース領域と、
複数のフローティングP型ウェル領域であって、前記フローティングP型ウェル領域の各々は前記エッジ領域内に全体的に配置され、前記エッジ領域から直線が前記活性領域へと延び、そして、前記複数のフローティングP型ウェル領域は前記直線に沿って前記周辺ディープトレンチと前記活性領域との間に配置されることを特徴とする複数のフローティングP型ウェル領域と、
を具備することを特徴とするフィールドプレート電力用Nチャネル電界効果トランジスタダイ。 - 前記周辺ディープトレンチと前記P型ボディ領域との間のいかなる位置にも前記直線に沿ってP型ボディ領域が追加配置されていないことを特徴とする、請求項14に記載のフィールドプレート電力用Nチャネル電界効果トランジスタダイ。
- ゲート構造であって、前記ゲート構造は前記活性領域内に全体的に配置され、前記ゲート構造のいかなる部分も前記エッジ領域内へと延びていないことを特徴とするゲート構造をさらに具備することを特徴とする、請求項14に記載のフィールドプレート電力用Nチャネル電界効果トランジスタダイ。
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JP2022051356A (ja) * | 2020-09-18 | 2022-03-31 | サンケン電気株式会社 | 半導体装置 |
JP7094611B2 (ja) | 2020-09-18 | 2022-07-04 | サンケン電気株式会社 | 半導体装置 |
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CN110277452B (zh) | 2022-06-03 |
EP3540780A1 (en) | 2019-09-18 |
EP3540780B1 (en) | 2022-02-09 |
TW201946272A (zh) | 2019-12-01 |
TWI724363B (zh) | 2021-04-11 |
KR20190109250A (ko) | 2019-09-25 |
CN110277452A (zh) | 2019-09-24 |
JP6904991B2 (ja) | 2021-07-21 |
US10361276B1 (en) | 2019-07-23 |
KR102190708B1 (ko) | 2020-12-14 |
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