JP2019186545A - ワイドバンドギャップ半導体デバイスおよびワイドバンドギャップ半導体デバイスを形成する方法 - Google Patents
ワイドバンドギャップ半導体デバイスおよびワイドバンドギャップ半導体デバイスを形成する方法 Download PDFInfo
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Abstract
Description
Claims (21)
- ワイドバンドギャップ半導体デバイス(500)を形成する方法(100)であって、前記方法(100)は、
ワイドバンドギャップ半導体基板上にゲート絶縁層を形成するステップ(110)と、
少なくとも1つの第1の反応性ガス種および少なくとも1つの第2の反応性ガス種を使用して前記ゲート絶縁層をアニーリングするステップ(120)と、
を含み、
前記第1の反応性ガス種は、前記第2の反応性ガス種とは異なる、
方法(100)。 - 前記ゲート絶縁層をアニーリングするステップ(120)は、少なくとも1つの第1のアニーリングプロセスと、前記第1のアニーリングプロセスの後に行われる少なくとも1つの第2のアニーリングプロセスと、を含み、
前記第1のアニーリングプロセスは、最小0.1体積%の前記第1の反応性ガス種と最大0.1体積%の前記第2の反応性ガス種とを含む反応性ガス雰囲気において行われ、
前記第2のアニーリングプロセスは、最小0.1体積%の前記第2の反応性ガス種と最大0.1体積%の前記第1の反応性ガス種とを含む反応性ガス雰囲気において行われる、
請求項1記載の方法(100)。 - 前記ゲート絶縁層をアニーリングするステップ(120)は、最小0.1体積%の前記第1の反応性ガス種と最小0.1体積%の前記第2の反応性ガス種とを同時に含む反応性ガス雰囲気において行われる、
請求項1記載の方法(100)。 - 前記第1の反応性ガス種は、酸化窒素、一酸化二窒素、水素、アンモニア、過酸化水素、硝酸、水蒸気、塩化ホスホリル、酸素のうち1つであり、
前記第2の反応性ガス種は、酸化窒素、一酸化二窒素、水素、アンモニア、過酸化水素、硝酸、水蒸気、塩化ホスホリル、酸素のうち別の1つである、
請求項1から3までのいずれか1項記載の方法(100)。 - 前記第1の反応性ガス種は、前記ゲート絶縁層をアニーリングするステップ(120)中、不活性ガスによって希釈され、これにより前記第1の反応性ガス種の体積割合は、最小1体積%かつ最大50体積%であり、前記第1の反応性ガス種は、酸化窒素である、
請求項1から4までのいずれか1項記載の方法(100)。 - 前記第2の反応性ガス種は、前記ゲート絶縁層をアニーリングするステップ(120)中、不活性ガスによって希釈され、これにより前記第2の反応性ガス種の体積割合は、最小0.1体積%かつ最大10体積%であり、前記第2の反応性ガス種は、アンモニアである、
請求項1から5までのいずれか1項記載の方法(100)。 - 前記方法はさらに、前記ゲート絶縁層をアニーリングするステップ(120)の後、1200℃より低い温度の不活性ガス雰囲気において前記ゲート絶縁層を加熱して、前記ゲート絶縁層内の水素濃度を低減させるステップを含む、
請求項1から6までのいずれか1項記載の方法(100)。 - ワイドバンドギャップ半導体デバイス(500)を形成する方法(200)であって、前記方法(200)は、
ワイドバンドギャップ半導体基板上にゲート絶縁層を形成するステップ(210)と、
少なくとも1つの反応性ガス種を含む反応性ガス雰囲気において前記ゲート絶縁層をアニーリングするステップ(220)と、
前記反応性ガス雰囲気において前記ゲート絶縁層をアニーリングするステップ(220)の後、不活性ガス雰囲気において前記ゲート絶縁層をアニーリングするステップ(230)と、
を含む方法(200)。 - 前記反応性ガス種は、酸化窒素およびアンモニアの少なくとも一方を含み、
前記反応性ガス種の体積割合は、最小0.1体積%である、
請求項8記載の方法(200)。 - 前記反応性ガス種は、最小5体積%の酸化窒素を含み、前記不活性ガス種は、最小90体積%の窒素を含み、
前記不活性ガス種でのアニーリングの期間は、前記反応性ガス種でのアニーリングの期間より短い、
請求項8または9記載の方法(200)。 - 前記不活性ガス雰囲気は、最大0.5体積%の酸素濃度を有する、
請求項8から10までのいずれか1項記載の方法(200)。 - 前記ゲート絶縁層をアニーリングする期間は、最短10分かつ最長600分である、
請求項1から11までのいずれか1項記載の方法(100,200)。 - 前記ゲート絶縁層をアニーリングするアニーリング温度は、最低600℃かつ最高1200℃である、
請求項1から12までのいずれか1項記載の方法(100,200)。 - 前記方法はさらに、前記ゲート絶縁層をアニーリングするステップの前に、最低950℃の温度の不活性ガス雰囲気において前記ゲート絶縁層を加熱するステップを含む、
請求項1から13までのいずれか1項記載の方法(100,200)。 - 前記方法はさらに、前記ゲート絶縁層をアニーリングするステップ後に、前記ゲート絶縁層上にゲート電極を形成するステップ(130,240)を含む、
請求項1から14までのいずれか1項記載の方法(100,200)。 - 前記ゲート電極(130,240)は、前記ワイドバンドギャップ半導体基板の表面から前記ワイドバンドギャップ半導体基板内へ延在するゲートトレンチ電極である、
請求項15記載の方法(100,200)。 - 前記ワイドバンドギャップ半導体基板は、炭化ケイ素基板である、
請求項1から16までのいずれか1項記載の方法(100,200)。 - 前記ゲート絶縁層は、二酸化ケイ素層である、
請求項1から17までのいずれか1項記載の方法(100,200)。 - ワイドバンドギャップ半導体デバイス(500)であって、
ワイドバンドギャップ半導体基板(510)と、
トランジスタと、
前記トランジスタのゲート絶縁層(520)と、
前記トランジスタのゲート電極(530)と、
を含み、
前記ゲート絶縁層(520)は、前記ワイドバンドギャップ半導体基板(510)と前記ゲート電極(530)との間に位置しており、
前記ワイドバンドギャップ半導体基板(510)内の前記トランジスタのチャネル領域の電荷担体移動度は、最小50cm2/Vsであり、
前記トランジスタの閾値電圧は、公称ゲート電圧が150℃で1000時間にわたり印加される場合、公称閾値電圧からその最大10%だけ変化する、
ワイドバンドギャップ半導体デバイス(500)。 - 前記ゲート絶縁層(520)の屈折率は、最小631nmかつ最大633nmの波長で、最小1.457かつ最大1.468である、
請求項19記載のワイドバンドギャップ半導体デバイス(500)。 - 前記ワイドバンドギャップ半導体基板は、炭化ケイ素基板である、
請求項19または20記載のワイドバンドギャップ半導体デバイス(500)。
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