JP2018515991A5 - - Google Patents

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Publication number
JP2018515991A5
JP2018515991A5 JP2017558648A JP2017558648A JP2018515991A5 JP 2018515991 A5 JP2018515991 A5 JP 2018515991A5 JP 2017558648 A JP2017558648 A JP 2017558648A JP 2017558648 A JP2017558648 A JP 2017558648A JP 2018515991 A5 JP2018515991 A5 JP 2018515991A5
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JP
Japan
Prior art keywords
stage
inverter stage
buffer
input node
inverter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2017558648A
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English (en)
Japanese (ja)
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JP2018515991A (ja
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Publication date
Priority claimed from US14/714,954 external-priority patent/US9473120B1/en
Application filed filed Critical
Publication of JP2018515991A publication Critical patent/JP2018515991A/ja
Publication of JP2018515991A5 publication Critical patent/JP2018515991A5/ja
Pending legal-status Critical Current

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JP2017558648A 2015-05-18 2016-04-15 レプリカバイアス印加を用いる高速ac結合インバータベースバッファ Pending JP2018515991A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/714,954 US9473120B1 (en) 2015-05-18 2015-05-18 High-speed AC-coupled inverter-based buffer with replica biasing
US14/714,954 2015-05-18
PCT/US2016/027813 WO2016186770A1 (en) 2015-05-18 2016-04-15 High-speed ac-coupled inverter-based buffer with replica biasing

Publications (2)

Publication Number Publication Date
JP2018515991A JP2018515991A (ja) 2018-06-14
JP2018515991A5 true JP2018515991A5 (enExample) 2019-05-09

Family

ID=55861218

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2017558648A Pending JP2018515991A (ja) 2015-05-18 2016-04-15 レプリカバイアス印加を用いる高速ac結合インバータベースバッファ

Country Status (5)

Country Link
US (1) US9473120B1 (enExample)
EP (1) EP3298694B1 (enExample)
JP (1) JP2018515991A (enExample)
CN (1) CN107771373B (enExample)
WO (1) WO2016186770A1 (enExample)

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CN107872219B (zh) * 2017-12-13 2023-11-24 福建科立讯通信有限公司 一种数字对讲机鉴频器与adc之间的接口电路
US10374554B2 (en) 2017-12-27 2019-08-06 Qualcomm Incorporated Differential amplifier with complementary unit structure
US10148257B1 (en) * 2018-04-19 2018-12-04 Realtek Semiconductor Corp. Method and apparatus for generating twenty-five percent duty cycle clock
US10809757B2 (en) * 2018-10-04 2020-10-20 Mediatek Inc. Clock buffer having low power, low noise and low spur
US10855281B2 (en) * 2018-10-04 2020-12-01 Raytheon Company Wide supply range digital level shifter cell
CN110995253A (zh) * 2019-11-05 2020-04-10 芯创智(北京)微电子有限公司 一种延时单元电路及环形压控振荡器

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