JP2018200429A - 表示装置及びその製造方法 - Google Patents
表示装置及びその製造方法 Download PDFInfo
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- JP2018200429A JP2018200429A JP2017105791A JP2017105791A JP2018200429A JP 2018200429 A JP2018200429 A JP 2018200429A JP 2017105791 A JP2017105791 A JP 2017105791A JP 2017105791 A JP2017105791 A JP 2017105791A JP 2018200429 A JP2018200429 A JP 2018200429A
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Abstract
【解決手段】基板100に画素電極12と半導体層16を有するTFTが形成された表示装置であって、前記半導体層16のソースはソース電極24と接続し、前記半導体層16のドレインはドレイン電極23と接続し、前記画素電極12は前記ソース電極24と接続し、前記ドレイン電極23は映像信号線と接続し、前記ドレイン電極23と前記ソース電極24は前記半導体層16よりも前記基板100側に存在し、前記ドレイン電極と前記ソース電極は前記半導体層よりも前記基板側に存在し、前記画素電極12は、前記半導体層16に対し、前記基板100とは逆側の層に形成されていることを特徴とする表示装置。
【選択図】図3
Description
図11は、ゲート絶縁膜17の上にゲート電極18を形成した状態を示す断面図である。ゲート電極18は、Mo、W、Al、Tiあるいはこれらの合金をスパッタリング等によって形成し、その後パターニングしたものである。ゲート電極18をパターニングした後、ゲート電極18をマスクにして、イオンインプランテーションによってリン(P)、ボロン(B)等をLTPS16に打ち込み、LTPS16に導電性を付与する。イオンインプランテーションによって、LTPS16に与えられたダメージから回復させるために、LTPS16に対して活性化アニールを450℃で1時間程度行う。
Claims (20)
- 基板に画素電極および半導体層を有するTFTが形成された表示装置であって、
前記半導体層のソース領域はソース電極と接続し、前記半導体層のドレイン領域はドレイン電極と接続し、前記画素電極は前記ソース電極と接続し、前記ドレイン電極は映像信号線と接続し、
前記ドレイン電極は前記半導体層よりも前記基板側に存在し、
前記半導体層は、前記画素電極と前記基板との間の層に形成されていることを特徴とする表示装置。 - 前記ドレイン電極は前記半導体層と第1のスルーホールで接続し、
前記ソース電極は前記半導体層と第2のスルーホールで接続し、
前記画素電極は前記ソース電極と第3のスルーホールで接続し、
前記第1のスルーホール、第2のスルーホール、第3のスルーホールは前記基板側の開口がそれぞれ前記半導体層側、前記画素電極側の開口よりも広いことを特徴とする請求項1に記載の表示装置。 - 前記半導体層はpoly−Siであり、前記TFTを構成するゲート電極が前記TFTのチャネル部に対する遮光膜として作用することを特徴とする請求項1に記載の表示装置。
- 前記半導体層は酸化物半導体であり、前記TFTを構成するゲート電極が前記TFTのチャネル部に対する遮光膜として作用することを特徴とする請求項1に記載の表示装置。
- 前記半導体層は酸化物半導体であり、前記TFTを構成するゲート電極が前記酸化物半導体の上下に存在するデュアルゲートとなっていることを特徴とする請求項1に記載の表示装置。
- 前記基板はポリイミドで形成されていることを特徴とする請求項1に記載の表示装置。
- 前記表示装置は液晶表示装置であることを特徴とする請求項1に記載の表示装置。
- 前記表示装置は有機EL表示装置であることを特徴とする請求項1に記載の表示装置。
- 第1の基板に画素電極および半導体層を有するTFTが形成され、第2の基板との間に液晶が挟持された液晶表示装置であって、
前記第1の基板と前記第2の基板において、前記液晶と接する面には配向膜が形成され、
前記配向膜は、前記画素電極と前記と前記TFTを接続するスルーホール内には形成されていないことを特徴とする液晶表示装置。 - 前記半導体層のソースはソース電極と接続し、前記半導体層のドレインはドレイン電極と接続し、前記画素電極は前記ソース電極と接続し、前記ドレイン電極は映像信号線と接続し、
前記ドレイン電極は前記半導体層よりも前記基板側に存在していることを特徴とする請求項9に記載の表示装置。 - 前記ドレイン電極は前記半導体層と第1のスルーホールで接続し、
前記ソース電極は前記半導体層と第2のスルーホールで接続し、
前記画素電極は前記ソース電極と第3のスルーホールで接続し、
前記第1のスルーホール、第2のスルーホール、第3のスルーホールは前記基板側の開口がそれぞれ前記半導体層側、前記画素電極側の開口よりも広いことを特徴とする請求項10に記載の液晶表示装置。 - 前記半導体層はpoly−Siであり、前記TFTを構成するゲート電極が前記TFTのチャネル部に対する遮光膜として作用することを特徴とする請求項9に記載の液晶表示装置。
- 前記半導体層は酸化物半導体であり、前記TFTを構成するゲート電極が前記TFTのチャネル部に対する遮光膜として作用することを特徴とする請求項9に記載の液晶表示装置。
- 前記基板はポリイミドで形成されていることを特徴とする請求項9に記載の表示装置。
- 第1の基板に画素電極および半導体層を有するTFTが形成された表示装置の製造方法であって、
第2の基板に画素電極を形成し、その後、前記画素電極とは別な層に前記半導体層を形成し、
その後、前記半導体層を覆って前記第1の基板を形成し、
その後、前記第2の基板を除去することを特徴とする表示装置の製造方法。 - 前記第2の基板の耐熱性は前記第1の基板よりも高いことを特徴とする請求項15に記載の表示装置の製造方法。
- 前記第2の基板は着色ポリイミドであることを特徴とする請求項15に記載の表示装置の製造方法。
- 前記第1の基板の波長500nmの光に対する透過率は、前記第2の基板よりも大きいことを特徴とする請求項15に記載の表示装置の製造方法。
- 前記半導体層はpoly−Siで形成され、前記poly−Siは400℃乃至450℃でアニールされ、前記アニール工程では、前記poly−Siは前記第2の基板に形成されていることを特徴とする請求項15に記載の表示装置の製造方法。
- 前記半導体層は酸化物半導体で形成され、前記酸化物半導体は300℃乃至400℃でアニールされ、前記アニール工程では、前記poly−Siは前記第2の基板に形成されていることを特徴とする請求項15に記載の表示装置の製造方法。
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