JP2018198257A - Wiring board - Google Patents

Abstract

To provide a wiring board excellent in transmission characteristic.SOLUTION: A wiring board has, on an upper surface of a first insulation layer 2: a laminate body 3 formed by stacking a second insulation layer 8, a third insulation layer 9, and a fourth insulation layer 10 in that order; a connection pad 5 located on an upper surface of the fourth insulation layer 10; veer holes 11 located in the second to fourth insulation layers 8 to 10; signal conductors 4S located on an upper surface of the second insulation layer 8 and in the veer holes 11 and connected to the connection pad 5; and grounding conductors 4G located in the upper surfaces of the first to fourth insulation layers 2 and 8 to 10. The grounding conductor 4G located on the upper surface of the second insulation layer 8 is located along the signal conductor 4S in a top view and has a non-formation part in an area overlapping at least the connection pad 5. The grounding conductor 4G located on the upper surface of the first insulation layer 2 and on the upper surface of the third insulation layer 9 are located in an area overlapping at least the signal conductor 4S in a top view and has a non-formation part in an area overlapping the connection pad 5.SELECTED DRAWING: Figure 3

Description

  The present disclosure relates to a wiring board on which electronic components are mounted.

  Currently, a wiring board for transmitting a high-frequency signal at a high speed of 10 Gbps or more has been developed, and is used for an electronic device such as a supercomputer that transmits a large-capacity signal at a high speed. In such a wiring board, an electronic component called a DC cut capacitor may be connected to the signal conductor. The DC cut capacitor has a function of stably operating an electronic device by removing a direct current component and efficiently transmitting a high frequency signal.

JP 2003-298204 A

  In the wiring board, the miniaturization of the signal conductor is progressing. However, the electrode size of an electronic component such as a DC cut capacitor is larger than the size of the signal conductor. For this reason, since the connection pad that electrically connects the electrode of the electronic component and the signal conductor is larger than the signal conductor, it is difficult to achieve impedance matching between the connection pad and the signal conductor. As a result, the transmission characteristics of the high-frequency signal are deteriorated, and the electronic device may not operate stably.

  A wiring board of the present disclosure includes a first insulating layer, a stacked body in which a second insulating layer, a third insulating layer, and a fourth insulating layer are stacked in this order on the top surface of the first insulating layer, and a fourth insulating layer A pair of connection pads electrically connected to each other through electronic components, a plurality of signal via holes located in the third insulating layer and the fourth insulating layer, and a second insulating layer A signal conductor electrically connected to the pair of connection pads, and a grounding conductor located on the upper surface of the first to fourth insulating layers. The grounding conductor located on the upper surface of the second insulating layer is located along the signal conductor in a top view, and has a non-formed portion at least in a region overlapping with the connection pad, The grounding conductor located on the upper surface of the first insulating layer and the upper surface of the third insulating layer is: In plane view, is characterized in that it comprises at least a second is located in the region overlapping the signal conductor of the insulating layer top surface, a non-formation portion in a region overlapping the connection pad.

  According to the wiring board of the present disclosure, it is possible to provide a wiring board having excellent transmission characteristics that allows electronic devices to operate stably.

FIG. 1 is a schematic top view illustrating a first embodiment of a wiring board according to the present disclosure. FIG. 2 is a schematic cross-sectional view illustrating a first embodiment of a wiring board according to the present disclosure. 3A to 3D are top views showing the top surfaces of the fourth, third, second, and first insulating layers, which are the main parts of the first embodiment of the wiring board according to the present disclosure. 4A to 4D are top views illustrating the top surfaces of the fourth, third, second, and first insulating layers, which are the main parts of the second embodiment of the wiring board according to the present disclosure.

  Next, the wiring board 1 according to the embodiment of the present disclosure will be described with reference to FIGS. FIG. 1 is a top view illustrating a first embodiment of a wiring board 1 according to the present disclosure. 2 is a cross-sectional view taken along the line XX shown in FIG. 3A to 3D show the same region of the fourth insulating layer 10, the third insulating layer 9, the second insulating layer 8, and the first insulating layer 2 in a top view.

  The wiring board 1 includes a first insulating layer 2, a laminated body 3, a wiring conductor 4, a connection pad 5, and a solder resist 6.

  The first insulating layer 2 is made of, for example, an insulating material obtained by impregnating glass fiber with an insulating resin such as an epoxy resin or a bismaleimide triazine resin. The first insulating layer 2 has a plurality of through holes 7 penetrating the upper surface and the lower surface. The first insulating layer 2 is a part that ensures mechanical strength as the wiring board 1. The thickness of the first insulating layer 2 is set to 100 to 1200 μm. The diameter of the through hole 7 is set to 50 to 300 μm.

  The first insulating layer 2 is formed into a flat plate shape by, for example, laminating a plurality of prepregs in which a glass fiber for reinforcement is impregnated with a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin, and performing pressing under heating. It is formed. The through hole 7 is formed by performing processing such as drilling, laser processing, or blasting on the first insulating layer 2.

  The stacked body 3 is located on the upper surface of the first insulating layer 2. The stacked body 3 is composed of insulating layers stacked in the order of the second insulating layer 8, the third insulating layer 9, and the fourth insulating layer 10 in the upper surface direction of the first insulating layer 2. The multilayer body 3 has a function of securing an arrangement area for the wiring conductor 4.

  The 2nd-4th insulating layers 8-10 consist of insulating materials, such as a polyimide resin, an epoxy resin, or a bismaleimide triazine resin, for example, and the insulating particle is disperse | distributed inside. The second to fourth insulating layers 8 to 10 have a plurality of via holes 11 having the wiring conductor 4 as a bottom surface. The thicknesses of the second to fourth insulating layers 8 to 10 are set to 5 to 50 μm. The diameter of the via hole 11 is set to 10 to 65 μm.

  The second to fourth insulating layers 8 to 10 are formed by sticking a film for an insulating layer containing a thermosetting resin such as a polyimide resin, an epoxy resin, or a bismaleimide triazine resin to the surface of an adherend under vacuum. It is formed by thermosetting. Insulating particles such as silicon oxide may be dispersed in the thermosetting resin.

  A plurality of insulating layers 12 for lamination are located on the lower surface of the first insulating layer 2. These insulating layers 12 also have a function of securing the arrangement area of the wiring conductor 4 on the lower surface of the first insulating layer 2. Each laminated insulating layer 12 also has a plurality of via holes 11. The insulating layer 12 for stacking is formed by the same method as the second to fourth insulating layers 8 to 10.

  The wiring conductor 4 is located on the top surfaces of the first to fourth insulating layers 2 and 8 to 10, the inside of the through hole 7, and the inside of the via hole 11. The wiring conductor 4 includes a signal conductor 4S and a grounding conductor 4G. A part of the wiring conductor 4 located on the surface of the fourth insulating layer 10 functions as a semiconductor element pad 13 connected to the semiconductor element. Moreover, the wiring conductor 4 is located also about the insulating layer 12 for lamination | stacking similarly to the 1st-4th insulating layers 2 and 8-10. Of the upper and lower wiring conductors 4, those requiring electrical connection are electrically connected to each other through, for example, through holes 7.

  The signal conductor 4 </ b> S extends in a band shape on the upper surface of the second insulating layer 8 and is located in the via hole 11 located in the third insulating layer 9 and the fourth insulating layer 10.

  The grounding conductor 4G is positioned flat on the upper surface of the second insulating layer 8 with a predetermined interval along the strip-shaped signal conductor 4S. Further, the grounding conductor 4G located on the upper surface of the second insulating layer 8 has a non-formed portion at least in a region overlapping with the connection pad 5 in a top view. Details of the connection pad 5 will be described later. Further, the grounding conductor 4G located on the upper surface of the first insulating layer 2 and the upper surface of the third insulating layer 9 is located in a region overlapping at least the signal conductor 4S on the upper surface of the second insulating layer 8 in a top view. The non-forming portion is provided in a region overlapping the connection pad 5. In other words, the grounding conductor 4G is located above and below the signal conductor 4S above and below the signal conductor 4S. Further, the grounding conductor 4G does not overlap the connection pad 5.

  Such a wiring conductor 4 is formed of a highly conductive metal such as copper plating using, for example, a semi-additive method.

  The connection pad 5 is located on the upper surface of the fourth insulating layer 10. Two connection pads 5 which form a pair are opposed to each other, and a plurality of pairs are arranged. Each connection pad 5 in each pair is electrically connected to a signal conductor 4S located in the via hole 11 of the fourth insulating layer 10. And the electronic component D is connected in the aspect bridged to each connection pad 5 of each pair. In other words, each connection pad 5 of each pair is electrically connected via the electronic component D. Examples of the electronic component D include a DC cut capacitor. The DC cut capacitor has a function of removing a direct current component and efficiently transmitting a high-frequency signal advantageous for high-speed transmission.

  The solder resist 6 is located on the lowermost surface of the insulating layer 12 for lamination located on the upper surface side of the fourth insulating layer 10 and the lower surface side of the first insulating layer 2. The solder resist 6 is made of an insulating material such as an epoxy resin or a polyimide resin. The solder resist 6 is mainly for protecting the wiring conductor 4 from the external environment. The solder resist 6 has an opening 6A for exposing the connection pad 5 on the upper surface side of the fourth insulating layer 10 and an opening 6B for exposing the semiconductor element pad 13 for mounting the semiconductor element. Further, an opening 6 </ b> C for exposing a part of the wiring conductor 4 is provided on the lower surface side of the insulating layer 12 for lamination. A part of the wiring conductor 4 exposed in the opening 6C functions as an external substrate pad 14 for connection to an external electric substrate.

  As described above, in the wiring board 1 of this example, the grounding conductor 4G is positioned flat on the upper surface of the second insulating layer 8 with a predetermined interval along the strip-shaped signal conductor 4S. Furthermore, the grounding conductor 4G on the upper surface of the second insulating layer 8 has a non-formed portion at least in a region overlapping with the connection pad 5 in a top view. In addition, on the top surface of the first insulating layer 2 and the top surface of the third insulating layer 9, the grounding conductor 4G is located in a region overlapping at least the signal conductor 4S on the top surface of the second insulating layer 8 when viewed from above. A non-formation portion is provided in a region overlapping the connection pad 5. As a result, the signal conductor 4S can be easily adjusted for impedance matching in a portion extending in a strip shape. Further, by suppressing the connection pad 5 from having a capacitance with the grounding conductor 4G, the impedance matching can be easily adjusted at the connection portion between the connection pad 5 and the signal conductor 4S. As a result, it is possible to provide a wiring board having excellent high-frequency signal transmission characteristics.

  In this case, the grounding conductor 4G does not have a non-formation portion only on the upper surface of the third insulating layer 9 just below the connection pad 5, but rather than the second insulating layer 8 where the signal conductor 4S is located. Also on the upper surface of the first insulating layer 2 below, the grounding conductor 4G has a non-formed portion. Therefore, even when the thickness of the second to fourth insulating layers 8 to 10 is thin and it is easy to form a capacitance between the connection pad 5 and the grounding conductor 4G, the grounding conductor 4G facing the connection pad 5 is Since it does not exist, it becomes easy to suppress having a capacitance.

  Note that the present disclosure is not limited to the above-described exemplary embodiment, and various modifications can be made without departing from the gist of the present disclosure. For example, in the example of the above-described embodiment, the case where the via hole 11 where the part of the grounding conductor 4G is located is not located around the via hole 11 where the signal conductor 4S is located is shown in FIGS. As shown in FIG. 4D, a plurality of via holes 11 where a part of the grounding conductor 4G is located may be located around the via hole 11 where the signal conductor 4S is located. This further facilitates adjustment of impedance matching at the connection portion between the connection pad 5 and the signal conductor 4S. Further, by improving the efficiency of absorbing the electromagnetic wave emitted from the signal conductor 4S and the electromagnetic wave entering from the outside by the grounding conductor 4G, it is possible to further improve the high-frequency signal transmission characteristics. 4A to 4D show the same region of the fourth insulating layer 10, the third insulating layer 9, the second insulating layer 8, and the first insulating layer 2 in a top view.

  In the example of the above-described embodiment, the size of the non-forming portion of the grounding conductor 4G located on the third insulating layer 9 and the non-forming portion of the grounding conductor 4G located on the first insulating layer 2 are the same. Although the same size is shown, the size of the non-forming portion of the grounding conductor 4G located on the third insulating layer 9 is the same as the size of the non-forming portion of the grounding conductor 4G located on the first insulating layer 2. You may form larger than a magnitude | size. Thereby, it can suppress more effectively that the connection pad 5 forms an electrostatic capacitance with the grounding conductor 4G in a closer position.

DESCRIPTION OF SYMBOLS 1 Wiring board 2 1st insulating layer 3 Laminated body 4S Signal conductor 4G Grounding conductor 5 Connection pad 8 2nd insulating layer 9 3rd insulating layer 10 4th insulating layer 11 Via hole D Electronic component

Claims (3)

A first insulating layer, and a laminate formed by laminating a second insulating layer, a third insulating layer, and a fourth insulating layer in this order on the upper surface of the first insulating layer;
A pair of connection pads located on the upper surface of the fourth insulating layer and electrically connected to each other through electronic components;
A plurality of via holes located in the second to fourth insulating layers;
A signal conductor located in an upper surface of the second insulating layer and in a part of the via hole and electrically connected to the connection pad;
A grounding conductor located on the top surface of the first to fourth insulating layers,
The grounding conductor located on the upper surface of the second insulating layer is located along the signal conductor in a top view, and has a non-formed portion at least in a region overlapping with the connection pad,
The grounding conductor located on the top surface of the first insulating layer and the top surface of the third insulating layer is located in a region overlapping at least the signal conductor on the top surface of the second insulating layer in top view, A wiring board having a non-formed portion in a region overlapping with a connection pad.   The wiring board according to claim 1, wherein the signal conductor is a differential line.   At least the third insulating layer and the fourth insulating layer have the via hole in which a part of the grounding conductor is positioned around the via hole in which the signal conductor is positioned. Item 3. The wiring board according to Item 1 or 2.

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