JP2009231480A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device preventing malfunction thereof and having high reliability in performance. <P>SOLUTION: Relating to a first package of the semiconductor device where a semiconductor chip and a spacer are mounted on a wiring board 2, a noise shielding layer 1 which is connected to a ground wiring different from a reference potential wiring that keeps a reference potential of a power source, is formed on the wiring board 2. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a semiconductor device including a package on which a semiconductor chip is mounted.

  In portable electronic devices such as mobile phones, miniaturization, thinning, and weight reduction are required, and in order to satisfy these requirements, a multi-chip semiconductor device in which a plurality of semiconductor chips are mounted in a single package Various structures have been proposed. For example, a semiconductor device in which a plurality of semiconductor chips are stacked in one package and connected by a method such as wire bonding or flip chip has been put into practical use, and is currently responsible for miniaturization and weight reduction.

  Furthermore, the development of a package called SiP (System in Package) that incorporates not only semiconductor chips but also passive elements such as inductors, capacitors, resistors, etc., and a matching circuit, a filter, etc. has been promoted, and the package structure is complicated. It has become a thing.

  As various active elements (semiconductor chips) and passive elements have a close structure, and as the operation speed of active elements increases, the influence of noise generated from each element and wiring has been taken up as a problem that cannot be ignored. Therefore, it is desired to reduce the influence of noise between elements.

  For example, Patent Document 1 employs a structure in which a conductive plate connected to a ground wiring is provided between semiconductor chips in a package to block noise propagation between the semiconductor chips.

  In Patent Document 2, a semiconductor element is housed in a cavity provided in a ceramic multilayer substrate, and an electromagnetic shield layer is added between cavities or between chips in the same cavity, thereby blocking the propagation of noise between semiconductor elements. I'm taking it.

By the way, when two or more packages having different or identical functions are installed on a motherboard, the packages are stacked so as to minimize the occupied area on the motherboard. It has been known.
JP 2004-111656 A (published April 8, 2004) JP-A-8-250650 (published September 27, 1996)

  The form of laminating a plurality of packages as described above is a form that is attracting more and more attention in realizing downsizing of the device, but the influence of noise from one package to another package has not been sufficiently solved. For example, when the semiconductor devices shown in Patent Documents 1 and 2 are used, the propagation of noise generated between a semiconductor chip and a semiconductor chip sealed in one package can be blocked, but one package As the signal is transmitted through the substrate located on the outermost part (uppermost part), noise is also propagated. For this reason, noise is propagated from one package to another, causing malfunction.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide a semiconductor device that prevents malfunction of the device and has high reliability in terms of performance.

  In order to solve the above-described problem, a semiconductor device according to the present invention is a semiconductor device in which a package in which a semiconductor chip and a spacer are mounted on one surface of a mounting substrate is disposed on a motherboard, and the mounting substrate includes the semiconductor A wiring layer including at least a power wiring that supplies power to the chip and a reference potential wiring that holds a reference potential of the power; and the semiconductor chip is electrically connected to the wiring of the mounting substrate. The spacer is electrically connected to the semiconductor chip mounted on the mounting substrate via the wiring of the mounting substrate, and the spacer is connected to the semiconductor chip. The package is mounted by connecting the spacer to the motherboard, and the package is mounted on the mounting board. Is different from the reference potential wiring connected to the conductive layer and the conductive layer disposed along the one surface of the mounting substrate on the surface opposite to the one surface from the wiring layer. A ground wiring is provided.

  By adopting the above configuration, the semiconductor device according to the present invention can prevent malfunction of the device and provide a semiconductor device having high reliability in terms of performance.

  Specifically, the semiconductor device according to the present invention is provided with a wiring layer including a wiring including at least a power supply wiring and a reference potential wiring on a mounting substrate on which a semiconductor chip is mounted. A ground wiring connected to the conductive layer is provided. By having such a mounting substrate, the noise from the semiconductor chip mounted on the mounting surface (one surface) of the mounting substrate and the wiring through the mounting substrate to the side opposite to the mounting surface Can be prevented from being emitted.

  Therefore, the semiconductor device according to the present invention can provide a semiconductor device having high reliability by avoiding an adverse effect due to noise of the package by preventing the malfunction by having the above structure.

  Here, the noise refers to noise caused by electrostatic induction, electromagnetic induction, and electromagnetic waves.

  In addition to the above configuration, the semiconductor device according to the present invention further includes a passive element mounted on the one surface of the mounting substrate, and the spacer is disposed so as to surround the passive element together with the semiconductor chip. It is preferable that

  According to said structure, even if it is a package of the SiP form which provided the passive element, the said conductive layer of the said mounting substrate can shield the noise radiated | emitted from a passive element.

  Another semiconductor device according to the present invention is a package stack type semiconductor device in which a plurality of packages each having a semiconductor chip and a spacer mounted on one surface of a mounting substrate are stacked in order to solve the above-described problem. The mounting substrate has a wiring layer including a wiring including at least a power supply wiring for supplying power to the semiconductor chip and a reference potential wiring for holding a reference potential of the power supply, and the semiconductor chip is mounted. The spacer is electrically connected to the wiring of the mounting substrate, and the spacer is electrically connected to the semiconductor chip mounted on the mounting substrate via the wiring of the mounting substrate. In addition, the spacer is arranged so as to surround the semiconductor chip, and the package is connected to the spacer via the spacer provided in the package. -It is electrically connected to the mounting substrate, or is electrically connected to the mounting substrate on a surface opposite to the one surface of the mounting substrate of the package different from the package. A conductive layer disposed along the one surface of the mounting substrate on the side opposite to the one surface from the wiring layer, and a ground wiring different from the reference potential wiring connected to the conductive layer. It is characterized by being provided.

  By adopting the above configuration, the semiconductor device according to the present invention can prevent malfunction of the device and provide a semiconductor device having high reliability in terms of performance.

  Specifically, in the semiconductor device according to the present invention, the mounting substrate is provided with a wiring layer including a wiring including at least a power supply wiring and a reference potential wiring, and further connected to the conductive layer and the conductive layer. And a plurality of packages having the mounting substrate are stacked (stacked). By having such a mounting substrate, noise is radiated from the semiconductor chip mounted on the mounting surface of the mounting substrate and the wiring to the opposite side of the mounting surface through the mounting substrate. Can be prevented. Therefore, as described above, even if the package has a structure in which the package is connected to the mounting board provided on the motherboard or another package via the spacer provided on the package, the package is stacked (stacked). A mounting substrate of the first package is disposed between the temporary package (assumed to be the first package) and the package stacked on the first package (tentatively referred to as the second package). ing. Therefore, it is possible to block the propagation of noise from the package which has been a problem in the past to other packages.

  In addition to the above-described configuration, another semiconductor device according to the present invention further includes a passive element mounted on the one surface of the mounting substrate in at least one of the plurality of packages. The passive element is preferably surrounded by the mounting substrate together with the semiconductor chip.

  According to said structure, even if it is a package of the SiP form which provided the passive element, the said conductive layer of the said mounting substrate can shield the noise radiated | emitted from a passive element.

  In the semiconductor device according to the present invention, in addition to the above structure, the conductive layer may be nickel-coated.

  According to said structure, since it can respond not only to a high frequency but electromagnetic induction noise of a lower frequency, it can shield more efficiently.

  It is preferable that a conductor connected to a ground wiring held at a ground potential is provided on a surface of the spacer opposite to the surface facing the semiconductor chip.

  According to said structure, a noise shielding function is realizable by providing the said conductor on the side surface of a spacer. As a result, it is possible to further prevent noise radiated from the inside of the package to the outside as compared with the configuration in which the mounting substrate is provided with the conductive layer, and to prevent the noise from reaching the outside from the outside. Further suppression can be achieved.

  As described above, a semiconductor device according to the present invention is a semiconductor device in which a package in which a semiconductor chip and a spacer are mounted on one surface of a mounting substrate is disposed on a motherboard, and the mounting substrate supplies power to the semiconductor chip. A wiring layer including at least a power supply wiring to be supplied and a reference potential wiring for holding a reference potential of the power supply; and the semiconductor chip is electrically connected to the wiring of the mounting substrate. The spacer is electrically connected to the semiconductor chip mounted on the mounting substrate via the wiring of the mounting substrate, and the spacer is disposed so as to surround the semiconductor chip. The package is mounted by connecting the spacer to the motherboard, and the wiring board includes the wiring layer. In addition, a conductive layer disposed along the one surface of the mounting substrate and a ground wiring different from the reference potential wiring connected to the conductive layer are provided on the surface opposite to the one surface. It is characterized by being. Another semiconductor device according to the present invention is a package stack type semiconductor device in which a plurality of packages each having a semiconductor chip and a spacer mounted on one surface of a mounting substrate are stacked as described above. The substrate has a wiring layer including a wiring including at least a power supply wiring for supplying power to the semiconductor chip and a reference potential wiring for holding a reference potential of the power supply. The semiconductor chip is mounted on the substrate. The spacer is electrically connected to the wiring of the mounting substrate, the spacer is electrically connected to the semiconductor chip mounted on the mounting substrate via the wiring of the mounting substrate, and The spacer is arranged so as to surround the semiconductor chip, and the package is connected to the motherboard via the spacer provided in the package. The wiring board is electrically connected to or electrically connected to the mounting board on a surface opposite to the one surface of the mounting board of the package different from the package. A conductive layer disposed along the one surface of the mounting substrate and a ground wiring different from the reference potential wiring connected to the conductive layer are provided on the surface opposite to the one surface. It is characterized by being.

  As a result, it is possible to avoid an adverse effect due to noise between packages, prevent malfunctions, and provide a highly reliable semiconductor device.

[Embodiment 1]
An embodiment of the present invention will be described with reference to FIGS. In the following description, various technically preferable limitations for carrying out the present invention are given, but the scope of the present invention is not limited to the following embodiments and drawings.

  FIG. 1 is a diagram illustrating a configuration of a semiconductor device in which two packages are stacked. As shown in FIG. 1, in the present embodiment, the first package 20a is stacked on the second package 20b to constitute a package stack type semiconductor device.

  In the following, each package will be described first, and then the stacked structure and the arrangement mode on the mother board will be described.

<First package>
FIG. 2 shows only the first package 20a.

  As shown in FIG. 2, the first package 20 a is provided with a wiring board 2 (mounting board), a semiconductor chip 5 a, and a spacer 4.

  The semiconductor chip 5a is not particularly limited as long as it has a function as a desired active element. As shown in FIG. 2, the semiconductor chip 5 a is bonded to the wiring substrate 2 through an adhesive film 9.

  The semiconductor chip 5a and the wiring board 2 are electrically connected to each other by a connection between a pad (not shown) provided on the semiconductor chip 5a and a pad 10 provided on the wiring board 2 via a wire 6 shown in FIG. Connected to. The wire 6 is mainly a gold wire, but is not limited to this.

  The wiring substrate 2 and the spacer 4 will be described in detail later. The plurality of protruding electrodes provided on the wiring substrate 2 and the plurality of protruding electrodes provided on the spacer 4 come into contact with each other. Connected to.

  Hereinafter, a specific configuration of the spacer 4 will be described in detail.

  The spacer 4 is made of an insulating resin such as an epoxy resin, and has a configuration for electrically connecting the first package 20a to the second package 20b shown in FIG. As the shape of the spacer 4, a shape in which a portion on which the semiconductor chip 5 a is mounted is cut out. That is, the semiconductor chip 5a is surrounded.

  The thickness of the spacer 4 (length in the vertical direction in FIG. 2) depends on the thickness of the protruding electrode, but may be set to be thicker than the thickness of the semiconductor chip 5a to be mounted. As an example, when the thickness of the semiconductor chip 5a is 100 μm, the thickness of the spacer 4 may be 150 μm.

  FIG. 3 is a cross-sectional view of the first package 20a to show the detailed configuration of the spacer 4. As shown in FIG.

  As shown in FIG. 3, protruding electrodes 8 are formed on the surface of the spacer 4 facing the wiring substrate 2 and on the surface opposite to the facing surface. The spacer 4 shown in FIG. 3 is shown as an example having two rows of electrodes on opposite sides. However, the spacer 4 can be produced by changing the number of rows according to the number of electrodes. it can.

  A through electrode 12 shown in FIG. 3 connects the protruding electrodes 8 on the upper and lower surfaces of the spacer 4. The main material of the protruding electrode 8 and the through electrode 12 is copper (Cu), and the surface of the protruding electrode 8 is plated with a metal having a low electric resistance such as nickel (Ni) or gold (Au). Also, solder plating can be applied depending on the application.

  Next, a specific configuration of the wiring board 2 on which the semiconductor chip 5a and the spacer 4 described above are mounted will be described in detail.

  FIG. 4 is a partial cross-sectional view showing the configuration of only the wiring board 2. The wiring board 2 is electrically connected to the semiconductor chip 5a and the spacer 4 to be mounted, and can input signals from the outside to the semiconductor chip 5a via the spacer 4, and outputs signals from the semiconductor chip 5a to the outside. Can be made. Specifically, as shown in FIG. 4, an electrode 11 is formed on the mounting surface of the semiconductor chip 5 a and the spacer 4 on the wiring substrate 2 and the opposite surface, and the electrode 11 is formed on the spacer 4. It is electrically connected to the formed protruding electrode 8. Further, the pad 10 is formed on the mounting surface of the semiconductor chip 5 a and the spacer 4 on the wiring substrate 2, and is electrically connected to the semiconductor chip 5 a through the wire 6. A through electrode 13 shown in FIG. 4 electrically connects the electrodes 11 formed on both surfaces of the wiring board 2.

  The pad 10 and the electrode 11 are mainly made of copper (Cu), and the surface thereof is plated with a metal having a low electrical resistance such as nickel (Ni) or gold (Au). It is the through electrode 13 that electrically connects the electrodes 11 on both sides of the wiring board, and the main material is copper (Cu).

  As the wiring board 2, for example, a film or plate having a thickness of 20 μm to 100 μm can be adopted.

  The wiring board 2 has a characteristic configuration in which a plurality of conductor layers are disposed inside an insulator made of an insulating resin such as an epoxy resin, and is arranged on the outermost side among the plurality of conductor layers. The noise shielding function is realized in the conductor layer. In the present embodiment, as the plurality of conductor layers, as shown in FIG. 4, an aspect composed of a total of two layers of a wiring layer 15 and a noise shielding layer 1 (conductive layer) will be described.

  The wiring layer 15 is a wiring layer that is disposed generally along the surface direction of the wiring substrate 2 and electrically connects the pad 10 and the electrode 11. The wiring layer 15 shown in FIG. 4 is one layer, but may be a plurality of layers. The main material of the wiring layer 15 is copper (Cu), but is not limited to this.

  The wiring layer 15 includes a plurality of wirings such as a signal wiring, a power supply wiring, and a chassis connection wiring. Of these wirings, only the signal wiring and the power supply wiring may be provided as the wiring layer 15. Here, the power supply wiring is a combination of a power supply (for example, 3V or 1.8V) on a circuit and a reference potential wiring (for example, 0V) also called VSS or ground. The reference potential wiring has a range of −0.2 V to +0.2 V, for example, in the specification, and is not necessarily grounded (grounded). On the other hand, the chassis connection wiring is wiring connected to a metal frame or case.

  The noise shielding layer 1 is a layer provided for the purpose of reducing noise emission from the first package 20a and reducing noise intrusion into the first package 20a from the outside. Noise mainly refers to electromagnetic noise emitted from semiconductor chips and other electronic components.

  The noise shielding layer 1 is the uppermost of the plurality of conductors disposed in the wiring substrate 2, that is, the position farthest from the semiconductor chip 5a among the plurality of conductors disposed in the wiring substrate 2. It is a conductor to be formed. In the case of this embodiment, the noise shielding layer 1 is formed outside the package with respect to the wiring layer 15.

  The noise shielding layer 1 is connected to a ground wiring (not shown) held at the ground potential.

  That is, in this embodiment, a noise shielding effect is realized by providing a ground wiring different from the reference potential wiring included in the wiring layer 15 and connecting the noise shielding layer 1 to the ground wiring.

  As shown in FIG. 4, the noise shielding layer 1 is disposed in a range that covers the mounting region of the spacer 4 beyond the mounting region of the semiconductor chip 5 a in the wiring substrate 2. Thereby, noise shielding can be realized on the entire surface of the wiring board 2.

  The main material of the noise shielding layer 1 is copper (Cu), but is not limited thereto. Moreover, the noise shielding effect can also be enhanced by applying nickel (Ni) to the noise shielding layer 1 by electroless plating or the like.

  Here, the positional relationship between the through electrode 13 in the wiring board 2 and the noise shielding layer 1 will be described with reference to FIGS. FIG. 5A is a perspective view of the wiring board 2. For convenience of explanation, it is assumed that the noise shielding layer 1 is formed on the entire upper surface side. In the following description, a view of the portion indicated by a broken line in FIG. 5A viewed from the upper surface side is shown in FIG. 5B, and a view viewed from the lower surface side is shown in FIG. As shown in FIG. 5B, the wiring board 2 is provided with a ground wiring connected to the noise shielding layer 1 and a signal / power wiring connected to the wiring layer 15 and not connected to the noise shielding layer 1. The grounding wiring is arranged outside and the signal / power supply wiring is arranged inside.

  When there are many signal / power supply wirings and many ground wiring electrodes, the arrangement shown in FIGS. 5D and 5E may be employed. In this arrangement, a high noise shielding effect can be obtained.

  Next, a method for manufacturing the wiring board 2 will be described with reference to FIG. However, the manufacturing method is not limited to this.

  6A to 6I are cross-sectional views showing the wiring board 2 along the manufacturing process thereof. In addition, the aspect demonstrated below is a thing of the structure where the wiring layer 15 is 1 layer and the electrode 11 is 2 rows.

  First, as shown to (a) of FIG. 6, the laminated board by which the metal layer was provided in both surfaces of insulating boards, such as glass epoxy, is prepared. The laminated board is a metal layer (copper) whose upper surface is the noise shielding layer 1, and a metal layer (copper) whose lower surface is the wiring layer 15. Next, as shown in FIG. 6 (b), the laminate is subjected to a drilling (drilling) process by a conventionally known method, a hole is formed, and subsequently, as shown in FIG. 6 (c), Apply copper plating. Next, as shown in FIG. 6D, a dry film (etching resist) 24 is pasted, and a pattern is produced on the pasted dry film 24 as shown in FIG. Is performed ((f) of FIG. 6). Next, the pattern-formed dry film (etching resist) 24 is removed, and after the removal, nickel plating and gold plating are performed (not shown). Further, in FIG. 6H, the solder resist 14 is attached (or applied), and finally a pattern is formed on the applied or applied solder resist 14 as shown in FIG. 6I. In FIG. 6A, A becomes the electrode 11 of the ground electrode, and B becomes the power source 11 of the signal / power wiring. The wiring board 2 is completed by the above method.

  The ground wiring and the noise shielding layer 1 may be directly connected or indirectly connected.

  The first package 20a shown in FIG. 2 is an example in which one semiconductor chip is mounted. However, the present invention is not limited to this, and two or more semiconductors are used as shown in FIG. A first package 20a ′ on which a chip is mounted may be used.

  Further, the first package 20a may be filled with the resin 16 as shown in FIG. 8 for the purpose of improving the strength, insulation and moisture resistance of the first package 20a shown in FIG. The resin 16 is desirably an insulating and moisture-proof material such as an epoxy resin.

  Next, the second package 20b shown in FIG. 1 will be described. In the following description, only the configuration different from the first package 20a described above will be described.

<Second package>
FIG. 9 is a side view showing the configuration of only the second package 20b. The second package 20b is different from the first package 20a in that a semiconductor chip 5b is provided instead of the semiconductor chip 5a of the first package 20a shown in FIG. That is, except for the configuration of the semiconductor chip, the configuration of the spacer 4 and the wiring substrate 2 is the same as that of the first package 20a shown in FIG.

  The semiconductor chip 5b of the second package 20b is electrically connected to the pad 10 of the wiring substrate 2 by the flip chip method via the electrode 7 provided on the bonding pad of the semiconductor chip.

  Between the wiring board 2 and the semiconductor chip 5b, a resin 17 for assisting the bonding strength is filled or pasted. The resin 17 is liquid or film-like.

  For the purpose of improving the strength, insulation, and moisture resistance of the second package 20b, the inside of the second package 20b may be filled with the resin 16 as shown in FIG.

<Laminated structure and placement on the motherboard>
FIG. 11 shows an example in which the first package 20a of FIG. 8 and the second package 20b of FIG. The second package 20 b located in the lower layer is electrically connected by the electrode 30 formed on the mother board 19 and the protruding electrode 8 of the spacer 4.

  Further, a resin 21 for assisting the bonding strength may be filled or affixed between the second package 20b and the mother board 19 or between the first package 20a and the second package 20b.

  Further, by providing the mother board 19 with the noise shielding film 22, it is possible to more effectively reduce noise emission from the second package 20b and noise intrusion from the outside. The noise shielding film 22 is connected to a ground wiring that is held at a ground potential.

  As described above, the package described in this embodiment (the first package 20a and the second package 20b) includes the semiconductor chip and the spacer, the wiring board 2 provided in the package, the noise shielding layer 1, A grounding wiring different from the reference potential wiring connected to the noise shielding layer 1 is provided. This prevents noise from being emitted from the semiconductor chip 5a or 5b mounted on the mounting surface of the wiring substrate 2 and the wiring layer 15 to the side opposite to the mounting surface through the wiring substrate 2. it can. As described above, the first package 20a is stacked on the second package 20b via the spacer 4 of the first package 20a, and the second package 20b is stacked on the mother board 19. Even so, between the first package 20a and the second package 20b, strictly speaking, the wiring substrate 2 is disposed between the semiconductor chip and the semiconductor chip provided in each package. Therefore, it is possible to block the propagation of noise from the package, which has been a problem in the past, to other packages. Note that when the packages have a stack structure, a noise shielding sheet may be interposed between the package and another package. However, the noise shielding sheet is generally thicker than 100 μm. Therefore, if it is adopted in the stack structure, the thickness of the stack structure is increased, which is contrary to miniaturization. Therefore, as described in this embodiment, by providing the noise shielding layer 1 in the wiring substrate 2, noise can be shielded without undesirably increasing the thickness of the stack structure. That is, according to the semiconductor device of this embodiment, not only can a plurality of packages that realize a desired function for each package be mounted with a relatively small occupation area, but also the adverse effects due to noise between the packages can be avoided. Thus, malfunction can be prevented and a highly reliable semiconductor device can be provided.

  In this embodiment, two packages are mounted on the mother board 19, but the present invention is not limited to this, and the number thereof may be one, or three or more. Also good. Further, the mounting method of the semiconductor chip in the package is not limited to the above-described wire bonding or flip chip method.

  In the present embodiment, the configuration in which the first package 20a is stacked on the second package 20b via the spacer 4 of the first package 20a is described. However, the stacking order is not limited to this. Instead, the second package 20b may be formed by stacking the spacer 4 of the second package 20b on the wiring substrate 2 of the first package 20a.

  Next, a modification of this embodiment will be described.

<Modification>
FIG. 12 shows a modification of the second package 20b shown in FIG. A second package 20b ′ shown in FIG. 12 includes a passive element 18 in addition to the semiconductor chip 5b.

  The passive element 18 is mounted on the surface of the wiring board 2 on the semiconductor chip 5b mounting side and is electrically connected to the pad 10 of the wiring board 2.

  The passive element 18 is a resistor, a capacitor, a coil, or the like, and is selected according to the purpose, but in addition to these, elements having various functions such as a ferrite bead and an EMI filter may be used.

  As shown in FIG. 12, the passive element 18 is mounted in a region surrounded by the spacer 4 in the wiring board 2 as in the semiconductor chip 5b.

  Here, insertion positions of various passive elements 18 are shown in FIGS. 13 (a) to 13 (c). FIG. 13A shows an insertion location when a decoupling capacitor is used as the passive element 18. As shown in FIG. 13A, the decoupling capacitor 18 a is disposed between the power supply of the semiconductor chip 5 b and the reference potential, and the wiring pattern of the wire 6, the pad 10, the electrode 11, and the wiring layer 15. It is connected to the. FIG. 13B and FIG. 13C both show the insertion location when a ferrite bead is used as the passive element 18. FIG. 13B shows the case where the ferrite bead 18b is arranged on the power supply wiring, and FIG. 13C shows the case where the ferrite bead 18b is arranged on the signal wiring.

  Even when the passive element 18 is mounted as in this modification, the wiring board 2 includes the noise shielding layer 1 connected to the ground wiring as described above. The noise can be prevented from being radiated to the outside, and the noise can be prevented from reaching the passive element 18 disposed in the package from the outside of the package.

  Also in this modified example, a resin 17 for assisting the bonding strength is filled or pasted between the wiring board 2 and the semiconductor chip 5b.

  Further, for the purpose of improving the strength, insulation, and moisture resistance of the second package 20b ′, the second package 20b ′ may be filled with the resin 16 as shown in FIG.

  In this modification, the configuration in which the passive element 18 is mounted on the second package 20b ′ has been described. However, the present invention is not limited to this, and may be mounted on the first package 20a shown in FIG.

  Also in this modification, the number of stacked packages may be one on the mother board, or may be three or more. Further, in the case of a stack type in which a plurality of packages are stacked, passive elements may be mounted on all packages, or passive elements may be mounted on some packages.

  In other words, it can be said that the semiconductor device according to the present invention is characterized by the following points. In other words, the semiconductor device of the present invention is held at at least one ground potential at the top of the wiring board of the package manufactured for each function in the semiconductor device composed of one or a plurality of semiconductor chips and passive elements. In other words, the conductor layer is formed separately from the ground wiring in the signal wiring and has an electromagnetic noise shielding effect. . In this configuration, nickel (Ni) may be applied to the conductor layer by electroless plating or the like for the purpose of enhancing the shielding effect of electromagnetic noise. In other words, the semiconductor device can be configured by stacking the above packages.

[Embodiment 2]
Another embodiment according to the present invention will be described below with reference to FIGS. 15 to 17. In this embodiment, in order to explain the differences from the first embodiment, for the sake of convenience of explanation, members having the same functions as those described in the first embodiment are given the same member numbers, and Description is omitted.

  FIG. 15 is a side view showing the configuration of the semiconductor device of this embodiment. Instead of the spacer 4 of the first embodiment described above, in this embodiment, as shown in FIG. 15, a noise shield (conductive) that is also connected to the ground wiring to which the noise shielding layer 1 is connected on the outer surface. And a spacer 4 'provided with a body.

  The noise shield 3 can be formed by attaching a film-like conductor to the resin surface of the spacer 4 ′ or by plating, but the forming method is not limited to this. The noise shield 3 is configured using, for example, Cu.

  In FIG. 15, the noise shield 3 is configured to have the same size as the spacer 4 ′. However, the present invention is not limited to this, and the spacer 4 is further improved to further improve the shielding effect. You may comprise larger than the magnitude | size of '. Specifically, as shown in FIG. 16, the spacer 4 ′ may be larger than the protruding electrode 8 and reach a side portion of the wiring board 2.

  FIG. 17 shows a modification of the noise shield 3. In the configuration shown in FIG. 17, the spacer 4 ′ is manufactured using a conductive material. In this case, an insulating material for insulating the through electrode 13 from the material is provided around the through electrode 13 connected to the wiring not connected to the ground potential. A part of the material is connected to a ground wiring that is held at the ground potential.

  Based on the configuration of this modification, the thermal conductivity (heat dissipation) and the strength of the package can be increased as compared with the noise shield 3 shown in FIGS. 15 and 16.

  Here, an example of a manufacturing method of the spacer 4 'will be described. FIG. 18 is a perspective view of the spacer 4 ′, and FIGS. 19A to 19H correspond to cross-sectional views taken along broken lines of the spacer 4 ′ shown in FIG. It shows the state of the method as viewed along each process at that location. 19A shows a dry film in which a dry film (etching resist) 41 is pasted and pasted on a conductor 40 such as metal in which a through hole 50 for the through electrode 12 is formed by performing a drilling process. 41 shows a state where a pattern is formed. Subsequently, as shown in FIG. 19B, the insulating film 42 is formed in the open through hole 50 and its periphery. Next, the dry film 41 is removed as shown in FIG. 19C, and a metal film 43 such as copper is formed on the surface of the through hole 50 and the conductor 40 as shown in FIG. . Then, a dry film (etching resist) 44 is attached to the surface of the metal film 43, and a pattern is formed on the attached dry film 44 as shown in FIG. Next, the metal film 43 on which the dry film 44 is not formed is removed, and finally the dry film 44 is removed as shown in FIG. Here, the portion indicated by A in FIG. 19G is the protruding electrode 8 connected to the spacer 4 ′, and the portion indicated by B is the protruding electrode 8 not connected to the spacer 4 ′. .

  As described above, according to the present embodiment, in addition to the noise shielding layer 1 provided on the wiring board 2, the noise shielding body is also provided on the spacer side. While being able to prevent further, it can suppress further that a noise spreads in a package from the outside.

  In FIG. 15 of this embodiment, the noise shielding body is provided on the outer side surface of the spacer. However, the present invention is not limited to this, and may be provided on the inner side surface of the spacer.

  In other words, the semiconductor device according to this embodiment is characterized by the following points. That is, in the semiconductor device including the package, it is preferable that a conductive material for shielding noise is provided on the side surface of the spacer, and the conductive material is connected to a ground wiring that is held at a ground potential. Further, the semiconductor device including the package preferably includes a spacer manufactured using a conductive material, and the conductive portion of the spacer is connected to a ground wiring that is held at a ground potential. .

  The present invention is not limited to the above-described embodiments, and various modifications can be made within the scope of the claims, and technical means disclosed in different embodiments can be appropriately combined. The obtained embodiments are also included in the technical scope of the present invention.

  The present invention provides a semiconductor device that prevents malfunction of the device and has high reliability in terms of performance.

  Therefore, as a package for mounting a semiconductor chip configured to drive a liquid crystal display, a drive element for an EL (electroluminescence) display, and an element mounted inside a device such as various portable electronic devices. It is possible to apply.

It is sectional drawing which showed the structure of one Embodiment of the semiconductor device which concerns on this invention. FIG. 2 is a cross-sectional view illustrating a configuration of a package which is a partial configuration of the semiconductor device illustrated in FIG. 1. It is sectional drawing which shows the structure of the package shown in FIG. It is sectional drawing which shows the structure of the wiring board which is the principal part of the package shown in FIG. It is the figure which showed the positional relationship of the penetration electrode and noise shielding layer in the wiring board which are the principal parts of the package shown in FIG. It is a figure which shows the manufacture process of the wiring board which is the principal part of the package shown in FIG. It is sectional drawing which showed the modification of the package shown in FIG. It is sectional drawing which showed another modification of the package shown in FIG. FIG. 2 is a cross-sectional view illustrating a configuration of a package which is a partial configuration of the semiconductor device illustrated in FIG. 1. FIG. 10 is a cross-sectional view showing a modification of the package shown in FIG. 9. FIG. 2 is a cross-sectional view showing a detailed configuration of the semiconductor device shown in FIG. 1. It is sectional drawing which showed another modification of the package shown in FIG. (A)-(c) is a figure explaining the detail of the passive element provided in the modification of the package shown in FIG. FIG. 12 is a cross-sectional view showing a modification of the package shown in FIG. 11. It is sectional drawing which showed the structure of other embodiment of the semiconductor device which concerns on this invention. FIG. 16 is a cross-sectional view illustrating a modified example of the semiconductor device illustrated in FIG. 15. FIG. 16 is a cross-sectional view illustrating a modified example of a package that is a partial configuration of the semiconductor device illustrated in FIG. 15. FIG. 16 is a perspective view illustrating a configuration of a spacer that is a partial configuration of the semiconductor device illustrated in FIG. 15. It is sectional drawing which shows the manufacturing process of the spacer shown in FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Noise shielding layer 2 Wiring board 3 Noise shielding body 4 Spacer 5a Semiconductor chip 5b Semiconductor chip 6 Wire 7 Electrode 8 Projection electrode 9 Adhesive film 10 Pad 11 Electrode 12 Through electrode 13 Through electrode 15 Wiring layers 16 and 17 Resin 18 Passive element 19 Mother board 20a First package 20b Second package 21 Resin 22 Noise shielding layer 24 Dry film 30 Electrode 40 Conductor 41 Dry film 42 Insulating film 43 Metal film 44 Dry film 50 Through hole

Claims (6)

A semiconductor device in which a package in which a semiconductor chip and a spacer are mounted on one surface of a mounting substrate is disposed on a motherboard,
The mounting substrate has a wiring layer including a wiring including at least a power supply wiring for supplying power to the semiconductor chip and a reference potential wiring for holding a reference potential of the power supply;
The semiconductor chip is electrically connected to the wiring of the mounting substrate,
The spacer is electrically connected to the semiconductor chip mounted on the mounting substrate via the wiring of the mounting substrate, and the spacer is disposed so as to surround the semiconductor chip. And
The package is mounted by connecting the spacer to the motherboard,
The mounting substrate includes a conductive layer disposed along the one surface of the mounting substrate on a surface opposite to the one surface from the wiring layer, and the reference potential connected to the conductive layer. A semiconductor device comprising a ground wiring different from the wiring. A passive element is further mounted on the one surface of the mounting substrate.
The semiconductor device according to claim 1, wherein the spacer is disposed so as to surround the passive element together with the semiconductor chip. A package stack type semiconductor device in which a plurality of packages each having a semiconductor chip and a spacer mounted on one surface of a mounting substrate are stacked,
The mounting substrate has a wiring layer including a wiring including at least a power supply wiring for supplying power to the semiconductor chip and a reference potential wiring for holding a reference potential of the power supply;
The semiconductor chip is electrically connected to the wiring of the mounted mounting board,
The spacer is electrically connected to the semiconductor chip mounted on the mounting substrate via the wiring of the mounting substrate, and the spacer is disposed so as to surround the semiconductor chip. And
The package is electrically connected to the mother board via the spacer provided in the package, or the mounting substrate on a surface opposite to the one surface of the mounting substrate of the package different from the package. Is electrically connected to
The mounting substrate includes a conductive layer disposed along the one surface of the mounting substrate on a surface opposite to the one surface from the wiring layer, and the reference potential connected to the conductive layer. A semiconductor device comprising a ground wiring different from the wiring. In at least one of the plurality of packages, a passive element is further mounted on the one surface of the mounting substrate.
The semiconductor device according to claim 3, wherein the passive element is surrounded by the mounting substrate together with the semiconductor chip.   5. The semiconductor device according to claim 1, wherein the conductive layer is nickel-coated.   6. A conductor connected to a ground wiring held at a ground potential is provided on a surface of the spacer opposite to the surface facing the semiconductor chip. The semiconductor device according to any one of the above.

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