JP2018190875A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device which can ensure heat dissipation properties while reducing concentration of thermal stress acting on a sealing resin.SOLUTION: A semiconductor device comprises: a die pad 1 having a mounting surface 11 and a pad rear face 12; a semiconductor element 2 mounted on the mounting surface 11; a plurality of terminals 3 which are arranged to surround the die pad 1 and electrically connected with the semiconductor element 2; and a sealing resin 5 which has a resin rear face 52 facing the same direction with a pad rear face 12 and partially covers the semiconductor element 2, the die pad 1 and the plurality of terminals 3. Both of the pad rear face 12 and the terminal rear face 32 are exposed from the resin rear face 52; and pad recesses 14 denting from the pad rear face 12 are formed on the die pad 1.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a semiconductor device whose package format is QFN.

  There are various types of package formats for semiconductor devices in which semiconductor elements are mounted on a die pad, which is a part of a lead frame that is a base of a plurality of terminals (leads), and these are covered with a sealing resin. Among these package types, QFN (Quad Flat No-leads) is a type in which a plurality of terminals do not protrude sideways at all from the sealing resin. Since QFN can reduce the mounting range on the circuit board, it contributes to downsizing of electronic devices.

  Patent Document 1 discloses an example of a semiconductor device whose package format is QFN. The semiconductor device includes a die pad on which a semiconductor element (semiconductor chip) is mounted, a plurality of terminals (leads) arranged around the die pad, and a sealing resin (sealing body) covering these. In the semiconductor device, the back surface of the die pad is exposed from the sealing resin, and the area of the die pad in plan view occupies most of the device area. For this reason, in the semiconductor device, heat generated from the semiconductor element can be efficiently released from the die pad to the outside. However, since the volume of the die pad is relatively large, thermal expansion occurs in the die pad due to a temperature cycle for use of the semiconductor device. And the thermal stress resulting from the said thermal expansion acts on sealing resin. If the concentration of thermal stress acting on the sealing resin becomes significant, the sealing resin may crack. If moisture or the like enters the crack, there is a concern that a defect may occur in the semiconductor device. For these reasons, when the size of the die pad is reduced in order to reduce the concentration of thermal stress acting on the sealing resin, the surface area of the die pad exposed from the sealing resin is reduced. In this case, there is a problem of a decrease in heat dissipation due to heat generated from the semiconductor element.

JP 2013-16624 A

  In view of the above circumstances, an object of the present invention is to provide a semiconductor device capable of ensuring heat dissipation while relaxing the concentration of thermal stress acting on the sealing resin.

  A semiconductor device provided by the present invention includes a die pad having a mounting surface and a pad back surface facing in opposite directions in the thickness direction, a semiconductor element mounted on the mounting surface, and a terminal each facing in the same direction as the pad back surface A plurality of terminals that are disposed so as to surround the die pad as viewed in the thickness direction of the die pad and that are electrically connected to the semiconductor element; and a resin back surface that faces in the same direction as the pad back surface, and A semiconductor device comprising a semiconductor element and a sealing resin that covers each of the die pad and each of the plurality of terminals, wherein the pad back surface and the terminal back surface are both exposed from the resin back surface, The die pad is characterized in that a pad recess recessed from the back surface of the pad is formed.

  In the practice of the present invention, the pad recess is preferably exposed from the resin back surface.

  Preferably, in the implementation of the present invention, the pad recess is composed of a plurality of annular grooves surrounding the center of the back surface of the pad, and the center positions of the regions surrounded by the annular grooves on the pad back surface are all the same. It is.

  In the practice of the present invention, the pad recess is preferably composed of a plurality of grooves extending along a direction perpendicular to the thickness direction.

  Preferably, in the embodiment of the present invention, the die pad further includes a pad side surface that intersects the pad back surface and faces the plurality of terminals, the die pad being flush with the mounting surface, and the Pad protrusions that protrude from the side surface of the pad toward the plurality of terminals are formed.

  Preferably, in the implementation of the present invention, the pad recess is filled with the sealing resin, and the back surface of the pad has a pad center part and a pad outer peripheral part located around the pad center part, The pad center portion and the pad outer peripheral portion are separated from each other by the pad recess when viewed in the thickness direction.

  In an embodiment of the present invention, preferably, the pad outer peripheral portion has a pair of first regions separated from each other in one direction perpendicular to the thickness direction.

  In the practice of the present invention, preferably, the pad outer peripheral portion has a pair of second regions spaced from each other in a direction perpendicular to both the thickness direction and the one direction.

  Preferably, in the implementation of the present invention, a mounting surface recess that is recessed from the four corners of the mounting surface toward the inside of the die pad in the thickness direction view is formed at an edge of the mounting surface, and in the thickness direction view. A part of the semiconductor element overlaps the mounting surface recess.

  In the implementation of the present invention, preferably, a part of the semiconductor element overlaps the outer peripheral portion of the pad in the thickness direction view.

  In the embodiment of the present invention, preferably, in the thickness direction, the position of the pad outer peripheral portion is equal to the position of the pad central portion.

  In the embodiment of the present invention, preferably, the terminal further includes a terminal main surface facing the same direction as the mounting surface, and further includes a wire connecting the semiconductor element and the terminal main surface.

  In the embodiment of the present invention, preferably, the die pad and the terminal are provided with an interior plating layer in contact with either the mounting surface or the terminal main surface.

  Preferably, in the embodiment of the present invention, the terminal further includes a terminal outer surface that intersects both the terminal main surface and the terminal back surface and faces outward, and the sealing resin intersects the resin back surface. It further has a resin side surface, and the terminal outer surface is exposed from the resin side surface.

  Preferably, in the implementation of the present invention, the terminal further includes a terminal inner surface that intersects the terminal back surface and faces away from the terminal outer surface, and the terminal is flush with the terminal main surface. And a terminal protrusion that protrudes from the inner surface of the terminal toward the die pad.

  Preferably, in the implementation of the present invention, the plurality of terminals include a plurality of first terminals arranged along a first direction perpendicular to the thickness direction, and the thickness direction and the first direction. A plurality of second terminals arranged along a second direction that is perpendicular to both, and the terminal outer surface is flush with the resin side surface.

  According to the semiconductor device of the present invention, it is possible to ensure heat dissipation while reducing the concentration of thermal stress acting on the sealing resin.

  Other features and advantages of the present invention will become more apparent from the detailed description given below with reference to the accompanying drawings.

1 is a perspective view of a semiconductor device according to a first embodiment of the present invention. FIG. 2 is a bottom view of the semiconductor device shown in FIG. 1. FIG. 2 is a plan view of the semiconductor device shown in FIG. 1 (through a sealing resin). FIG. 2 is a front view of the semiconductor device shown in FIG. 1. FIG. 2 is a right side view of the semiconductor device shown in FIG. 1. It is sectional drawing which follows the VI-VI line of FIG. It is sectional drawing which follows the VII-VII line of FIG. It is the elements on larger scale of FIG. It is the elements on larger scale of FIG. It is a bottom view of the semiconductor device concerning the modification of 1st Embodiment of this invention. It is sectional drawing which follows the XI-XI line of FIG. It is a bottom view of the semiconductor device concerning 2nd Embodiment of this invention. FIG. 13 is a bottom view of the semiconductor device shown in FIG. 12 (through sealing resin, omitting wires). FIG. 13 is a plan view of the semiconductor device shown in FIG. 12 (through a sealing resin). It is sectional drawing which follows the XV-XV line | wire of FIG. It is the elements on larger scale of FIG. It is a bottom view of the semiconductor device concerning 3rd Embodiment of this invention. FIG. 18 is a plan view of the semiconductor device shown in FIG. 17 (through a sealing resin). FIG. 18 is a front view of the semiconductor device shown in FIG. 17. It is sectional drawing which follows the XX-XX line of FIG. It is the elements on larger scale of FIG. FIG. 18 is a cross-sectional view illustrating a manufacturing step of the semiconductor device shown in FIG. 17.

  A mode for carrying out the present invention (hereinafter referred to as “embodiment”) will be described with reference to the accompanying drawings.

[First Embodiment]
A semiconductor device A10 according to the first embodiment of the present invention will be described with reference to FIGS. The semiconductor device A10 includes a die pad 1, a semiconductor element 2, a plurality of terminals 3, and a sealing resin 5. In the present embodiment, the semiconductor device A10 further includes a wire 4.

  In FIG. 3, the sealing resin 5 is transmitted for convenience of understanding. In FIG. 3, the transmitted sealing resin 5 is indicated by an imaginary line (two-dot chain line). FIG. 8 is an enlarged view of the vicinity of the terminal 3 shown in FIG. FIG. 9 is an enlarged view of the vicinity of the die pad 1 shown in FIG.

  The semiconductor device A10 is surface-mounted on circuit boards of various electronic devices. The semiconductor device A10 has a QFN package format. As shown in FIG. 1 and the like, the semiconductor device A10 in the thickness direction z view of the die pad 1 (hereinafter referred to as “plan view”) has a rectangular shape. Here, for convenience of explanation, a direction (lateral direction in FIG. 2) perpendicular to the thickness direction z of the die pad 1 (hereinafter simply referred to as “thickness direction z”) is referred to as a first direction x. A direction (vertical direction in FIG. 2) perpendicular to both the thickness direction z and the first direction x of the die pad 1 is referred to as a second direction y.

  As shown in FIGS. 3 and 6, the die pad 1 is a member on which the semiconductor element 2 is mounted. The die pad 1 is made of a metal material, and the metal material is, for example, Cu. The die pad 1 is derived from a lead frame obtained by processing the metal material. The die pad 1 has a mounting surface 11, a pad back surface 12, a pad side surface 13, and a pad diagonal material 16.

  As shown in FIGS. 6 and 9, the mounting surface 11 faces the thickness direction z. As shown in FIG. 3, the mounting surface 11 has a rectangular shape. The semiconductor element 2 is mounted on the mounting surface 11. A portion of the mounting surface 11 where the semiconductor element 2 is not mounted is covered with the sealing resin 5.

  As shown in FIGS. 6 and 9, the pad back surface 12 faces the side opposite to the mounting surface 11 in the thickness direction z. As shown in FIG. 2, the pad back surface 12 has a rectangular shape, and its area is set to be smaller than the mounting surface 11. In the present embodiment, the pad back surface 12 is exposed from the sealing resin 5.

  As shown in FIGS. 3 and 9, the pad side surface 13 intersects the pad back surface 12 and faces the plurality of terminals 3. The pad side surface 13 includes four surfaces, and each pad side surface 13 faces either one of the first direction x and the second direction y. In the thickness direction z, the upper end of the pad side surface 13 positioned between the mounting surface 11 and the pad back surface 12 is bent toward either the first direction x or the second direction y. The pad side surface 13 is covered with the sealing resin 5.

  As shown in FIGS. 2, 6, and 9, a pad recess 14 that is recessed from the pad back surface 12 is formed in the die pad 1. In the present embodiment, the pad recess 14 is exposed from the sealing resin 5 together with the pad back surface 12. In the present embodiment, the pad recess 14 includes a plurality of annular grooves 141 that are recessed from the pad back surface 12 and surround the center of the pad back surface 12. As shown in FIG. 2, the center positions C of the regions surrounded by the respective annular grooves 141 on the pad back surface 12 are all the same. In the present embodiment, the regions surrounded by the respective annular grooves 141 are all rectangular, and the center position C indicates the intersection of diagonal lines of the regions. Here, the center of the pad back surface 12 is the same as the center position C. In addition, the area | region enclosed by each annular groove 141 may be circular, for example. The pad recess 14 can be formed in the die pad 1 by etching, for example.

  10 and 11 show a semiconductor device A11 that is a modification of the semiconductor device A10. In addition to the plurality of annular grooves 141 as in the semiconductor device A10, the pad recess 14 may be configured by a plurality of grooves 142 as in this modification. Each groove 142 extends along a direction perpendicular to the thickness direction z. In the present modification, the plurality of grooves 142 are recessed from the pad back surface 12 and arranged along the first direction x. Each groove 142 extends along the second direction y. The plurality of grooves 142 may be arranged along the second direction y, and each groove 142 may extend along the first direction x. Each groove 142 may be configured to extend along an oblique direction with respect to both the first direction x and the second direction y.

  As shown in FIGS. 3, 6, and 9, the die pad 1 is formed with a bowl-shaped pad protrusion 15 that is flush with the mounting surface 11 and protrudes from the pad side surface 13 toward the plurality of terminals 3. Has been. Four pad protrusions 15 are formed in the die pad 1, and each pad protrusion 15 protrudes in one of the first direction x and the second direction y. The pad protrusion 15 has a pad end surface 151 and a pad intermediate surface 152. The pad end surface 151 is along the thickness direction z and faces either the first direction x or the second direction y. The pad intermediate surface 152 faces the same direction as the pad back surface 12 and intersects the pad end surface 151. The pad intermediate surface 152 is connected to the pad side surface 13 inside the die pad 1. In the thickness direction z, the distance from the mounting surface 11 to the pad intermediate surface 152 is about half of the distance from the mounting surface 11 to the pad back surface 12. The pad protrusion 15 is covered with the sealing resin 5.

  As shown in FIG. 3 and FIG. 7, the pad diagonal 16 extends obliquely with respect to both the first direction x and the second direction y from the portion where the two pad end surfaces 151 intersect. The pad diagonal 16 is composed of four pieces and extends radially from the four corners of the die pad 1 in plan view. The pad diagonal 16 has a diagonal upper surface 161, a diagonal lower surface 162, and a diagonal end surface 163. The diagonal material upper surface 161 faces the same direction as the mounting surface 11 and is flush with the mounting surface 11. The diagonal material lower surface 162 faces the same direction as the pad back surface 12. In the direction in which the pad diagonal 16 extends, one end of the diagonal lower surface 162 is connected to the pad intermediate surface 152. Further, in the thickness direction z, the distance from the diagonal material upper surface 161 to the diagonal material lower surface 162 is substantially equal to the distance from the mounting surface 11 to the pad intermediate surface 152. The diagonal end surface 163 is located at the tip of the pad diagonal 16 in the direction in which the pad diagonal 16 extends, and intersects both the diagonal upper surface 161 and the diagonal lower surface 162. The diagonal material end surface 163 has an L shape and is exposed to the outside from the sealing resin 5. Note that, in the pad diagonal material 16, all portions except the diagonal material end surface 163 are covered with the sealing resin 5.

  As shown in FIGS. 3 and 6, the semiconductor element 2 is mounted on the mounting surface 11 of the die pad 1. In the present embodiment, the semiconductor element 2 is an integrated circuit (IC) in which a drive circuit for lighting a light source such as an LED is incorporated. The semiconductor element 2 has an element main surface 21 and an element back surface 22.

  As shown in FIGS. 6 and 9, the element main surface 21 faces the same direction as the mounting surface 11 of the die pad 1. A plurality of electrode pads 211 are provided on the element main surface 21. Each electrode pad 211 is electrically connected to a circuit incorporated in the semiconductor element 2. The electrode pad 211 is made of Al, for example. In the present embodiment, the wire 4 is connected to each electrode pad 211. Further, as shown in FIGS. 6 and 9, the element back surface 22 faces the side opposite to the mounting surface 11 in the thickness direction z. The element back surface 22 faces the mounting surface 11.

  As shown in FIGS. 6 and 9, the bonding layer 29 is interposed between the mounting surface 11 of the die pad 1 and the element back surface 22 of the semiconductor element 2. The bonding layer 29 is made of, for example, a synthetic resin (so-called Ag paste) mainly composed of an epoxy resin containing Ag. The semiconductor element 2 is mounted on the mounting surface 11 via the bonding layer 29.

  As shown in FIG. 3, the plurality of terminals 3 are disposed so as to surround the die pad 1 in a plan view and are electrically connected to the semiconductor element 2. The plurality of terminals 3 are each composed of a lead frame from which the die pad 1 is derived. The plurality of terminals 3 include a plurality of first terminals 3a arranged along the first direction x and a plurality of second terminals 3b arranged along the second direction y. In the present embodiment, seven first terminals 3a are arranged on each of two sides of the semiconductor device A10 in plan view and separated from each other in the second direction y. The plurality of second terminals 3b are arranged in seven on each of the two sides of the semiconductor device A10 that are separated from each other in the first direction x in plan view. Note that the number of arrangements of the plurality of first terminals 3a and second terminals 3b in the semiconductor device A10 is not limited to this embodiment. The plurality of terminals 3 have the same shape. In the present embodiment, the terminal 3 has a terminal main surface 31, a terminal back surface 32, a terminal outer surface 33, and a terminal inner surface 34.

  As shown in FIGS. 3 and 8, the terminal main surface 31 faces the same direction as the mounting surface 11 of the die pad 1 and has a strip shape. The terminal main surface 31 is covered with the sealing resin 5. A wire 4 is connected to the terminal main surface 31, and the terminal 3 is electrically connected to the semiconductor element 2 through the wire 4.

  As shown in FIGS. 2 and 8, the terminal back surface 32 faces the same direction as the pad back surface 12 of the die pad 1 and is exposed from the sealing resin 5. Terminal back surfaces 32 of the plurality of first terminals 3a and second terminals 3b are all in contact with each side of the semiconductor device A10 in plan view.

  As shown in FIGS. 2 to 6 and 8, the terminal outer surface 33 intersects both the terminal main surface 31 and the terminal back surface 32 and faces outward. In the present embodiment, the terminal outer surface 33 stands up from the terminal back surface 32 toward the terminal main surface 31 along the thickness direction z. The terminal outer surface 33 is exposed from the sealing resin 5 and faces one of the first direction x and the second direction y. The terminal outer surface 33 is a flat surface.

  As shown in FIGS. 3 and 8, the terminal inner surface 34 intersects the terminal back surface 32 and faces the side opposite to the terminal outer surface 33. In the thickness direction z, the upper end of the terminal inner side surface 34 located between the terminal main surface 31 and the terminal back surface 32 is bent toward either the first direction x or the second direction y. The terminal inner surface 34 is covered with the sealing resin 5.

  As shown in FIGS. 3, 6, and 8, the terminal 3 is formed with a hook-like terminal protrusion 35 that is flush with the terminal main surface 31 and protrudes from the terminal inner surface 34 toward the die pad 1. Has been. The terminal protrusion 35 has a terminal end surface 351 and a terminal intermediate surface 352. The terminal end surface 351 is along the thickness direction z and faces either the first direction x or the second direction y. The terminal end surface 351 faces the pad end surface 151 of the pad protrusion 15 of the die pad 1. The terminal intermediate surface 352 faces in the same direction as the terminal back surface 32 and intersects the terminal end surface 351. The terminal intermediate surface 352 is connected to the terminal inner surface 34 inside the terminal 3. In the thickness direction z, the distance from the terminal main surface 31 to the terminal intermediate surface 352 is about half of the distance from the terminal main surface 31 to the terminal back surface 32. The terminal protrusion 35 is covered with the sealing resin 5.

  As shown in FIGS. 3, 6, 8, and 9, the wire 4 connects the electrode pad 211 of the semiconductor element 2 and the terminal main surface 31 of the terminal 3. The plurality of terminals 3 are electrically connected to the semiconductor element 2 by the wires 4. The wire 4 is made of a metal material such as Au.

  As shown in FIG. 6, the sealing resin 5 covers the semiconductor element 2 and a part of each of the die pad 1 and the plurality of terminals 3. The sealing resin 5 is a synthetic resin having electrical insulation, for example, a black epoxy resin. The sealing resin 5 has a resin main surface 51, a resin back surface 52, and a resin side surface 53.

  As shown in FIG. 6, the resin main surface 51 faces the same direction as the mounting surface 11 of the die pad 1. The resin main surface 51 is a rectangular and flat surface. As shown in FIG. 6, the resin back surface 52 faces in the same direction as the pad back surface 12 of the die pad 1. For this reason, the resin main surface 51 and the resin back surface 52 face each other in the thickness direction z. As shown in FIG. 2, the pad back surface 12 and the pad recess 14 of the die pad 1 and the terminal back surface 32 of the terminal 3 are exposed from the resin back surface 52. As shown in FIGS. 4, 5, and 8, the resin side surface 53 intersects both the resin main surface 51 and the resin back surface 52. In the present embodiment, the resin side surface 53 includes four surfaces, and each resin side surface 53 faces one of the first direction x and the second direction y. From each resin side surface 53, the diagonal material end surface 163 of the pad diagonal material 16 of the die pad 1 and the terminal outer surface 33 of the terminal 3 are exposed. In the present embodiment, the terminal outer surface 33 is flush with the resin side surface 53.

  As shown in FIGS. 8 and 9, the interior plating layer 61 is provided so as to cover the mounting surface 11 of the die pad 1 and the terminal main surface 31 of the terminal 3. The interior plating layer 61 is in contact with either the mounting surface 11 or the terminal main surface 31. Further, one end of the bonding layer 29 and the wire 4 is in contact with the interior plating layer 61. The interior plating layer 61 is made of Ag, for example.

  As shown in FIGS. 8 and 9, the exterior plating layer 62 is provided so as to cover the pad back surface 12 of the die pad 1 and the terminal back surface 32 of the terminal 3. The exterior plating layer 62 is in contact with either the pad back surface 12 or the terminal back surface 32. The exterior plating layer 62 is made of Sn, for example.

  Next, functions and effects of the semiconductor device A10 will be described.

  In the semiconductor device A <b> 10, a pad recess 14 that is recessed from the pad back surface 12 is formed in the die pad 1. Both the pad back surface 12 and the pad recess 14 are exposed from the resin back surface 52 of the sealing resin 5. By adopting such a configuration, even when the size of the die pad 1 is reduced to alleviate the concentration of thermal stress acting on the sealing resin 5, the pad recess 14 exposes the sealing resin 5. A predetermined size can be secured for the surface area of the die pad 1. Therefore, according to the semiconductor device A10, it is possible to ensure heat dissipation while relaxing the concentration of thermal stress acting on the sealing resin 5.

  The configuration of the pad recess 14 can be a plurality of annular grooves 141 as in the semiconductor device A10 or a plurality of grooves 142 as in the semiconductor device A11. The pad recess 14 can be easily formed on the pad back surface 12 by etching.

  In the semiconductor device A10, the die pad 1 is formed with a pad protrusion 15 that is flush with the mounting surface 11 and protrudes from the pad side surface 13 toward the plurality of terminals 3. With this configuration, both the pad side surface 13 and the pad intermediate surface 152 of the pad protrusion 15 are covered with the sealing resin 5, and the die pad 1 is supported by the sealing resin 5 by the pad protrusion 15. It becomes a state. For this reason, the pad protrusion 15 can prevent the die pad 1 from falling off the sealing resin 5.

  The terminal 3 has a terminal outer surface 33 exposed from the resin side surface 53 of the sealing resin 5. In the present embodiment, the terminal outer surface 33 is flush with the resin side surface 53. By adopting such a configuration, when the semiconductor device A10 is mounted on the circuit board, the terminal outer surface 33 promotes the formation of solder fillets, so that the bonding strength of the semiconductor device A10 to the circuit board can be improved.

  The terminal 3 is formed with a terminal protrusion 35 that is flush with the terminal main surface 31 and protrudes from the terminal inner surface 34 toward the die pad 1. With this configuration, both the terminal inner side surface 34 and the terminal intermediate surface 352 of the terminal protruding portion 35 are covered with the sealing resin 5, and the terminal 3 is supported by the sealing resin 5 by the terminal protruding portion 35. It becomes a state. For this reason, the terminal protrusion 35 can prevent the terminal 3 from dropping from the sealing resin 5.

  The die pad 1 and the terminal 3 are provided with an interior plating layer 61 in contact with either the mounting surface 11 or the terminal main surface 31. The interior plating layer 61 can protect the die pad 1 from thermal shock or the like when the semiconductor element 2 is mounted on the die pad 1. In addition, when connecting the wire 4 to the terminal 3, the terminal 3 can be protected from thermal shock or the like.

[Second Embodiment]
A semiconductor device A20 according to the second embodiment of the present invention will be described with reference to FIGS. In these drawings, the same or similar elements as those of the semiconductor device A10 described above are denoted by the same reference numerals, and redundant description is omitted.

  The semiconductor device A20 according to the present embodiment is different from the semiconductor device A10 described above in the configuration of the die pad 1. Here, FIG. 13 and FIG. 14 are permeate | transmitting the sealing resin 5 for convenience of understanding. In FIG. 13 and FIG. 14, the transmitted sealing resin 5 is indicated by an imaginary line. Further, in FIG. 13, the wire 4 is omitted for convenience of understanding. FIG. 16 is an enlarged view of the vicinity of the die pad 1 shown in FIG.

  As shown in FIGS. 12, 13, and 16, in this embodiment, the pad recess 14 of the die pad 1 is filled with the sealing resin 5. In the present embodiment, the pad recess 14 includes a plurality of grooves 142 as in the semiconductor device A11 described above. Each groove 142 extends along one of the first direction x and the second direction y. Both ends of each groove 142 intersect the other groove 142.

  As shown in FIGS. 12 to 16, in this embodiment, the pad back surface 12 of the die pad 1 has a pad center portion 121 and a pad outer peripheral portion 122. The pad center portion 121 is a rectangular portion located in the center of the semiconductor device A20 in plan view. A pad recess 14 is formed along the outer edge of the pad central portion 121. The pad outer peripheral portion 122 is a portion located around the pad central portion 121. The pad central portion 121 and the pad outer peripheral portion 122 are separated by the pad concave portion 14 in plan view. In the present embodiment, the pad outer peripheral portion 122 has a pair of first regions 122a spaced from each other in the first direction x and a pair of second regions 122b spaced from each other in the second direction y. “One direction” described in the claims of the present invention refers to either the first direction x or the second direction y. The pad outer peripheral portion 122 may be configured by only one of the pair of first regions 122a and the pair of second regions 122b. Each first region 122a has a strip shape extending along the second direction y. Each of the second regions 122b has a strip shape extending along the first direction x.

  As shown in FIGS. 15 and 16, the position of the pad outer peripheral portion 122 is equal to the position of the pad central portion 121 in the thickness direction z. As shown in FIGS. 13 to 16, in the present embodiment, a part of the semiconductor element 2 overlaps the pad outer peripheral portion 122 in a plan view.

  As shown in FIGS. 13 and 14, in the present embodiment, a mounting surface recess 111 is formed at the edge of the mounting surface 11 of the die pad 1. The mounting surface recess 111 is recessed from the four corners of the mounting surface 11 toward the inside of the die pad 1 in plan view. In the present embodiment, a part of the semiconductor element 2 overlaps the mounting surface recess 111 in plan view.

  As shown in FIG. 16, in this embodiment, the pad protrusion 15 is not formed on the die pad 1. Further, as shown in FIGS. 13 to 16, in this embodiment, the pad side surface 13 of the die pad 1 intersects both the mounting surface 11 and the pad back surface 12. In the present embodiment, the pad side surface 13 stands up from the pad back surface 12 toward the mounting surface 11 along the thickness direction z. The pad side surface 13 is a flat surface and faces one of the first direction x and the second direction y.

  Next, functions and effects of the semiconductor device A20 will be described.

  In the semiconductor device A <b> 20, the pad recess 14 that is recessed from the pad back surface 12 is formed in the die pad 1. The pad recess 14 is filled with a sealing resin 5. The pad back surface 12 has a pad center portion 121 and a pad outer peripheral portion 122, which are exposed from the resin back surface 52 of the sealing resin 5. The pad central portion 121 and the pad outer peripheral portion 122 are separated from each other by the pad concave portion 14. By adopting such a configuration, the region of the die pad 1 extending from the mounting surface 11 to the pad back surface 12 in the thickness direction z is divided into a plurality of states. For this reason, the distortion of the sealing resin 5 due to the thermal expansion of the die pad 1 is dispersed throughout, and the concentration of thermal stress acting on the sealing resin 5 is alleviated. In this case, a predetermined size can be secured for the surface area of the die pad 1 exposed from the sealing resin 5 by the pad central portion 121 and the pad outer peripheral portion 122. Therefore, also by the semiconductor device A20, it is possible to ensure heat dissipation while reducing the concentration of thermal stress acting on the sealing resin 5.

  In the semiconductor device A <b> 20, the sealing resin 5 is filled in the pad recess 14 formed in the die pad 1. By adopting such a configuration, the die pad 1 is supported by the sealing resin 5, so that the die pad 1 can be prevented from falling off from the sealing resin 5.

  In the semiconductor device A <b> 20, a mounting surface recess 111 is formed at the edge of the mounting surface 11 of the die pad 1. A part of the semiconductor element 2 overlaps the mounting surface recess 111 in plan view. Further, a part of the semiconductor element 2 overlaps the pad outer peripheral portion 122 in plan view. By adopting such a configuration, the area of the semiconductor element 2 can be secured larger than the pad back surface 12 in a plan view, so that the distance between the electrode pad 211 arranged on the semiconductor element 2 and the terminal 3 is shortened. For this reason, the length of the wire 4 connecting the electrode pad 211 and the terminal 3 can be shortened, which contributes to cost reduction of the semiconductor device A20.

  In this case, by making the position of the pad outer peripheral portion 122 equal to the position of the pad central portion 121 in the thickness direction z, the pad central portion 121 and the pad outer peripheral portion 122 serve as a support surface for the work table or the like. Therefore, when the semiconductor element 2 is mounted on the die pad 1, when the semiconductor element 2 is pressed against the die pad 1 by a collet (not shown) or the like, the semiconductor element 2 receives a uniform reaction force from the mounting surface 11. Therefore, the bonding strength of the semiconductor element 2 to the die pad 1 can be ensured.

[Third Embodiment]
A semiconductor device A30 according to the third embodiment of the present invention will be described with reference to FIGS. In these drawings, the same or similar elements as those of the semiconductor device A10 described above are denoted by the same reference numerals, and redundant description is omitted.

  The semiconductor device A30 according to this embodiment is different from the semiconductor device A10 described above in the configuration of the plurality of terminals 3 and the sealing resin 5. In addition, the semiconductor device A30 includes an external wire 41 and an internal wire 42 instead of the wire 4. Here, FIG. 18 is penetrating the sealing resin 5 for convenience of understanding. In FIG. 18, the transmitted sealing resin 5 is indicated by an imaginary line. FIG. 21 is an enlarged view of the vicinity of the terminal 3 shown in FIG. The cross-sectional position in FIG. 22 is the same as the cross-sectional position in FIG.

  As shown in FIGS. 17 and 19 to 21, in this embodiment, the sealing resin 5 is formed with a groove portion 54 that is recessed from the resin back surface 52 and penetrates each terminal 3. In the present embodiment, four groove portions 54 are formed, and each groove portion 54 is along one of the first direction x and the second direction y.

  As shown in FIGS. 17 and 20, in this embodiment, each terminal 3 includes an external terminal 301 located outside the groove 54 and an internal located inside (die pad 1 side) relative to the groove 54. Terminal 302. The external terminal 301 and the internal terminal 302 are separated from each other by the groove 54. The external terminal 301 and the internal terminal 302 constitute the first terminal 3a and the second terminal 3b, respectively.

  As illustrated in FIGS. 17 to 21, the external terminal 301 includes a terminal first main surface 311, a terminal first back surface 321, an external terminal outer surface 331, and an external terminal inner surface 341.

  As shown in FIGS. 18, 20, and 21, the terminal first main surface 311 faces the same direction as the mounting surface 11 of the die pad 1. An external wire 41 is connected to the terminal first main surface 311. The external wire 41 connects the electrode pad 211 of the semiconductor element 2 and the terminal first main surface 311. The external wire 41 is made of a metal material such as Au. The terminal first main surface 311 is provided with an interior plating layer 61 in contact therewith. The external wire 41 is in contact with the interior plating layer 61.

  As shown in FIGS. 17, 20, and 21, the terminal first back surface 321 faces the same direction as the pad back surface 12 of the die pad 1 and is exposed from the sealing resin 5. The terminal first back surfaces 321 of the plurality of first terminals 3a and second terminals 3b are all in contact with each side of the semiconductor device A10 in plan view. The terminal first back surface 321 is provided with an exterior plating layer 62 in contact therewith.

  As shown in FIGS. 14 and 19 to 21, the external terminal outer surface 331 intersects both the terminal first main surface 311 and the terminal first back surface 321. In the present embodiment, the external terminal outer side surface 331 stands from the terminal first back surface 321 toward the terminal first main surface 311 along the thickness direction z. The external terminal outer surface 331 is exposed from the resin side surface 53 of the sealing resin 5 and faces one of the first direction x and the second direction y. The external terminal outer surface 331 is a flat surface and is flush with the resin side surface 53.

  As shown in FIG. 21, the external terminal inner side surface 341 intersects the terminal first back surface 321 and faces away from the external terminal outer surface 331. In the thickness direction z, the upper end of the external terminal inner side surface 341 located between the terminal first main surface 311 and the terminal first back surface 321 is bent toward either the first direction x or the second direction y. doing. The external terminal inner side surface 341 is covered with the sealing resin 5.

  As shown in FIG. 21, the external terminal 301 is flush with the terminal first main surface 311 and protrudes from the external terminal inner surface 341 toward the groove 54 of the sealing resin 5. A portion 36 is formed. The external terminal protrusion 36 has an external terminal end surface 361 and an external terminal intermediate surface 362. The external terminal end surface 361 is along the thickness direction z and faces either the first direction x or the second direction y. The external terminal end surface 361 is exposed from the groove 54. The external terminal intermediate surface 362 faces the same direction as the terminal first back surface 321 and intersects the external terminal end surface 361. The external terminal intermediate surface 362 is connected to the external terminal inner side surface 341 inside the external terminal 301. In the thickness direction z, the distance from the terminal first main surface 311 to the external terminal intermediate surface 362 is about half of the distance from the terminal first main surface 311 to the terminal first back surface 321. The external terminal protrusion 36 is covered with the sealing resin 5 except for the external terminal end surface 361.

  As shown in FIG. 18, in the plurality of external terminals 301 constituting a part of the plurality of first terminals 3a arranged on one side of the semiconductor device A10 in plan view, the external terminal protrusions of the external terminals 301 located at the center 36 is formed in a state along the second direction y. The external terminal protrusions 36 of the external terminals 301 arranged away from the external terminal 301 located at the center in the first direction x are formed in an inclined state with respect to the second direction y. The external terminal protrusion 36 of the external terminal 301 is set such that the inclination with respect to the second direction y increases as the distance from the external terminal 301 located at the center increases in the first direction x. In addition, as shown in FIG. 18, in the plurality of external terminals 301 constituting a part of the plurality of second terminals 3b arranged on one side of the semiconductor device A10 in plan view, the external terminals of the external terminal 301 located at the center The protrusion 36 is formed in a state along the first direction x. The external terminal protrusions 36 of the external terminals 301 arranged away from the external terminal 301 located in the center in the second direction y are formed in an inclined state with respect to the first direction x. The external terminal protrusion 36 of the external terminal 301 is set such that the inclination with respect to the first direction x increases as the distance from the external terminal 301 located at the center increases in the second direction y.

  As shown in FIGS. 17, 18, 20, and 21, the internal terminal 302 has a terminal second main surface 312, a terminal second back surface 322, and an internal terminal inner side surface 342.

  As shown in FIGS. 18, 20, and 21, the terminal second main surface 312 faces the same direction as the mounting surface 11 of the die pad 1. An internal wire 42 is connected to the terminal second main surface 312. The internal wire 42 connects the electrode pad 211 of the semiconductor element 2 and the terminal second main surface 312. The internal wire 42 is made of a metal material such as Au. The terminal second main surface 312 is provided with an interior plating layer 61 in contact therewith. The internal wire 42 is in contact with the interior plating layer 61.

  As shown in FIGS. 17, 20, and 21, the terminal second back surface 322 faces the same direction as the pad back surface 12 of the die pad 1 as well as the terminal first back surface 321, and is exposed from the sealing resin 5. The terminal second back surface 322 in each terminal 3 is located between the terminal first back surface 321 and the pad back surface 12 in plan view. In the plurality of first terminals 3a and second terminals 3b, the interval between the adjacent terminal second back surfaces 322 is set to be shorter than the interval between the adjacent terminal first back surfaces 321.

  As shown in FIG. 21, the inner terminal inner surface 342 intersects the terminal second back surface 322 and faces the outer terminal inner surface 341. In the thickness direction z, the upper end of the inner terminal inner side surface 342 positioned between the terminal second main surface 312 and the terminal second back surface 322 is bent toward either the first direction x or the second direction y. doing. The inner terminal inner side surface 342 is covered with the sealing resin 5.

  As shown in FIG. 21, the internal terminal 302 is flush with the terminal second main surface 312 and protrudes from the internal terminal inner surface 342 toward the groove 54 of the sealing resin 5. A portion 37 is formed. The internal terminal protrusion 37 has an internal terminal end surface 371 and an internal terminal intermediate surface 372. The internal terminal end surface 371 is along the thickness direction z and faces either the first direction x or the second direction y. The internal terminal end surface 371 is exposed from the groove portion 54 and faces the external terminal end surface 361 of the external terminal protruding portion 36. The internal terminal intermediate surface 372 faces the same direction as the terminal second back surface 322 and intersects the internal terminal end surface 371. The internal terminal intermediate surface 372 is connected to the internal terminal inner surface 342 inside the internal terminal 302. In the thickness direction z, the distance from the terminal second main surface 312 to the internal terminal intermediate surface 372 is half of the distance from the terminal second main surface 312 to the terminal second back surface 322. The internal terminal protruding portion 37 is covered with the sealing resin 5 except for the internal terminal end surface 371.

  As shown in FIG. 18, in the plurality of internal terminals 302 constituting a part of the plurality of first terminals 3 a arranged on one side of the semiconductor device A <b> 10 in a plan view, the internal terminal protruding portion of the internal terminal 302 positioned at the center 37 is formed in a state along the second direction y. The internal terminal protrusions 37 of the internal terminals 302 arranged away from the central internal terminal 302 in the first direction x are formed in an inclined state with respect to the second direction y. The internal terminal protrusion 37 of the internal terminal 302 is set so that the inclination with respect to the second direction y increases as the distance from the internal terminal 302 located at the center increases in the first direction x. In addition, as shown in FIG. 18, among the plurality of internal terminals 302 constituting a part of the plurality of second terminals 3 b arranged on one side of the semiconductor device A <b> 10 in plan view, the internal terminals of the internal terminal 302 positioned at the center The protrusion 37 is formed in a state along the first direction x. The internal terminal protrusions 37 of the internal terminals 302 arranged away from the central internal terminal 302 in the second direction y are formed in an inclined state with respect to the first direction x. The internal terminal protrusion 37 of the internal terminal 302 is set so that the inclination with respect to the first direction x increases as the distance from the internal terminal 302 located at the center increases in the second direction y.

  As shown in FIGS. 19 to 21, the insulator 55 interposed between the external terminal end surface 361 of the external terminal protruding portion 36 and the internal terminal end surface 371 of the internal terminal protruding portion 37 is provided in the groove portion 54 of the sealing resin 5. Has been injected. The insulator 55 is made of a synthetic resin having fluidity used for underfill, for example.

  In the semiconductor device A30, as shown in FIG. 22, the groove portion 54, the external terminal 301, and the internal terminal 302 can be simultaneously formed by inserting the blade 81 from the resin back surface 52 after forming the sealing resin 5. it can.

  Next, functions and effects of the semiconductor device A30 will be described.

  In the semiconductor device A30, the pad recess 14 that is recessed from the pad back surface 12 is formed in the die pad 1 as in the semiconductor device A10 described above. Both the pad back surface 12 and the pad recess 14 are exposed from the resin back surface 52 of the sealing resin 5. Therefore, the semiconductor device A30 can also ensure heat dissipation while reducing the concentration of thermal stress acting on the sealing resin 5.

  In the semiconductor device A <b> 30, the sealing resin 5 is formed with a groove portion 54 that is recessed from the resin back surface 52 and penetrates each terminal 3. Further, each terminal 3 is located outside the groove 54 and has an external terminal 301 having a terminal first back surface 321, and an inside located inside the groove 54 and a terminal second back 322. Terminal 302. By adopting such a configuration, the external terminal 301 and the internal terminal 302 are in an electrically insulated state, and each can be an independent terminal 3. The external terminal 301 has a terminal first main surface 311, and the external wire 41 is connected to the terminal first main surface 311. The internal terminal 302 has a terminal second main surface 312, and the internal wire 42 is connected to the terminal second main surface 312. Different electrical signals can flow through the external wire 41 and the internal wire 42, respectively. For this reason, in the semiconductor device A20, the number of terminals 3 can be increased, and the semiconductor element 2 in which a denser circuit is integrated can be provided.

  The external terminal 301 has an external terminal outer side surface 331 exposed from the resin side surface 53 of the sealing resin 5. In the present embodiment, the external terminal outer surface 331 is flush with the resin side surface 53. By adopting such a configuration, when the semiconductor device A30 is mounted on the circuit board, the outer surface 331 of the external terminal promotes the formation of a solder fillet, so that the bonding strength of the semiconductor device A30 to the circuit board can be improved.

  The external terminal 301 is formed with an external terminal protrusion 36 that is flush with the terminal first main surface 311 and protrudes from the external terminal inner surface 341 toward the groove 54 of the sealing resin 5. By adopting such a configuration, the external terminal inner side surface 341 and the external terminal intermediate surface 362 of the external terminal protruding portion 36 are both covered with the sealing resin 5, and the external terminal 301 is sealed by the external terminal protruding portion 36. The resin 5 is supported. For this reason, the external terminal protrusion 36 can prevent the external terminal 301 from dropping from the sealing resin 5.

  Further, the internal terminal 302 is formed with an internal terminal protruding portion 37 that is flush with the terminal second main surface 312 and protrudes from the internal terminal inner surface 342 toward the groove portion 54 of the sealing resin 5. By adopting such a configuration, the inner terminal inner surface 342 and the inner terminal intermediate surface 372 of the inner terminal protruding portion 37 are both covered with the sealing resin 5, and the inner terminal 302 is sealed by the inner terminal protruding portion 37. The resin 5 is supported. For this reason, the internal terminal protrusion 37 can prevent the internal terminal 302 from dropping from the sealing resin 5.

  Both the external terminal end surface 361 of the external terminal protruding portion 36 and the internal terminal end surface 371 of the internal terminal protruding portion 37 are exposed from the groove portion 54 of the sealing resin 5. An insulator 55 interposed between the external terminal end surface 361 and the internal terminal end surface 371 is injected into the groove portion 54. By adopting such a configuration, it is possible to appropriately ensure electrical insulation between the external terminal 301 and the internal terminal 302.

  The present invention is not limited to the embodiment described above. The specific configuration of each part of the present invention can be changed in various ways.

A10, A11, A20, A30: Semiconductor device 1: Die pad 11: Mounting surface 111: Mounting surface recess 12: Pad back surface 121: Pad center portion 122: Pad outer peripheral portion 122a: First region 122b: Second region 13: Pad side surface 14: pad recess 141: annular groove 142: groove 15: pad protrusion 151: pad end surface 152: pad intermediate surface 16: pad diagonal material 161: diagonal material upper surface 162: diagonal material lower surface 163: diagonal material end surface 2: semiconductor element 21 : Element main surface 211: electrode pad 22: element back surface 29: bonding layer 3: terminal 3 a: first terminal 3 b: second terminal 301: external terminal 302: internal terminal 31: terminal main surface 311: terminal first main surface 312 : Terminal second main surface 32: Terminal back surface 321: Terminal first back surface 322: Terminal second back surface 33: Terminal outer surface 331: External terminal outer surface 4: Terminal inner surface 341: External terminal inner surface 342: Internal terminal inner surface 35: Terminal protrusion 351: Terminal end surface 352: Terminal intermediate surface 36: External terminal protruding portion 361: External terminal end surface 362: External terminal intermediate surface 37: Internal terminal protrusion 371: Internal terminal end surface 372: Internal terminal intermediate surface 4: Wire 41: External wire 42: Internal wire 5: Sealing resin 51: Resin main surface 52: Resin back surface 53: Resin side surface 54: Groove 55: Insulation Body 61: Interior plating layer 62: Exterior plating layer 81: Blade C: Center position z: Thickness direction x: First direction y: Second direction

Claims (16)

A die pad having a mounting surface and a pad back surface facing opposite sides in the thickness direction;
A semiconductor element mounted on the mounting surface;
A plurality of terminals each having a terminal back surface facing in the same direction as the pad back surface, disposed so as to surround the die pad in the thickness direction of the die pad, and conducting to the semiconductor element;
A semiconductor device having a resin back surface facing in the same direction as the pad back surface, and including the semiconductor element and a sealing resin covering each of the die pad and each of the plurality of terminals,
The pad back surface and the terminal back surface are both exposed from the resin back surface,
The semiconductor device according to claim 1, wherein the die pad has a pad recess recessed from the back surface of the pad.   The semiconductor device according to claim 1, wherein the pad recess is exposed from the resin back surface. The pad recess is composed of a plurality of annular grooves surrounding the center of the back surface of the pad,
The semiconductor device according to claim 2, wherein the center positions of the regions surrounded by the respective annular grooves on the back surface of the pad are all the same.   The semiconductor device according to claim 2, wherein the pad recess is configured by a plurality of grooves extending along a direction perpendicular to the thickness direction. The die pad further has a pad side surface that intersects the back surface of the pad and faces the plurality of terminals,
5. The semiconductor device according to claim 2, wherein the die pad includes a pad protrusion that is flush with the mounting surface and protrudes from the side surface of the pad toward the plurality of terminals. . The pad recess is filled with the sealing resin,
The pad back surface has a pad center part, and a pad outer peripheral part located around the pad center part,
2. The semiconductor device according to claim 1, wherein the pad central portion and the pad outer peripheral portion are separated from each other by the pad concave portion when viewed in the thickness direction.   The semiconductor device according to claim 6, wherein the pad outer peripheral portion has a pair of first regions separated from each other in one direction perpendicular to the thickness direction.   The semiconductor device according to claim 7, wherein the pad outer peripheral portion has a pair of second regions spaced from each other in a direction perpendicular to both the thickness direction and the one direction. On the edge of the mounting surface, a mounting surface recess is formed that is recessed from the four corners of the mounting surface toward the inside of the die pad in the thickness direction view.
The semiconductor device according to claim 6, wherein a part of the semiconductor element overlaps with the mounting surface recess when viewed in the thickness direction.   The semiconductor device according to claim 9, wherein a part of the semiconductor element overlaps with the outer peripheral portion of the pad when viewed in the thickness direction.   The semiconductor device according to claim 10, wherein a position of the pad outer peripheral portion is equal to a position of the pad central portion in the thickness direction. The terminal further has a terminal main surface facing the same direction as the mounting surface,
The semiconductor device according to claim 1, further comprising a wire connecting the semiconductor element and the terminal main surface.   The semiconductor device according to claim 12, wherein the die pad and the terminal are provided with an interior plating layer in contact with either the mounting surface or the terminal main surface. The terminal further has a terminal outer surface that intersects both the terminal main surface and the terminal back surface and faces outward.
The sealing resin further has a resin side surface intersecting the resin back surface,
The semiconductor device according to claim 12, wherein the terminal outer surface is exposed from the resin side surface. The terminal further has a terminal inner surface that intersects the terminal back surface and faces away from the terminal outer surface;
The semiconductor device according to claim 14, wherein the terminal is formed with a terminal protruding portion that is flush with the terminal main surface and protrudes from the inner surface of the terminal toward the die pad. The plurality of terminals include a plurality of first terminals arranged along a first direction that is perpendicular to the thickness direction, and a plurality of first terminals that are perpendicular to both the thickness direction and the first direction. A plurality of second terminals arranged along two directions,
The semiconductor device according to claim 14, wherein the terminal outer surface is flush with the resin side surface.

Images