JP6909630B2 - Semiconductor device - Google Patents

Description

The present invention relates to a semiconductor device having a package format of QFN.

There are various types of package types in a semiconductor device in which a semiconductor element is mounted on a die pad which is a part of a lead frame which is a base of a plurality of terminals (leads) and the semiconductor elements are covered with a sealing resin. Among these package types, QFN (Quad Flat No-leads) is a type in which a plurality of terminals do not protrude laterally from the sealing resin at all. Since the QFN can reduce the mounting range on the circuit board, it contributes to the miniaturization of electronic devices.

Patent Document 1 discloses an example of a semiconductor device having a package format of QFN. The semiconductor device includes a die pad on which a semiconductor element (semiconductor chip) is mounted, a plurality of terminals (leads) arranged around the die pad, and a sealing resin (sealing body) that covers them. In the semiconductor device, the back surface of the die pad is exposed from the sealing resin, and the area of the die pad in a plan view occupies most of the device area. Therefore, in the semiconductor device, the heat generated from the semiconductor element can be released to the outside from the die pad. However, since the volume of the die pad is relatively large, thermal expansion occurs in the die pad due to the temperature cycle required for using the semiconductor device or the like. Then, the thermal stress caused by the thermal expansion acts on the sealing resin. If the thermal stress acting on the sealing resin increases, the sealing resin may crack. If moisture or the like enters the crack, there is a concern that a defect may occur in the semiconductor device.

Therefore, when the size of the die pad is reduced in order to suppress the increase in thermal stress in the semiconductor device, a measure may be taken to extend the direction in which the die pad faces at each terminal arranged around the die pad. .. This is because the size of the semiconductor element is reduced in accordance with the die pad, so that the wire connecting the semiconductor element and the terminal is prevented from becoming excessively long. In this case, if each terminal is simply extended, the volume of the terminal is conversely increased and the increase in thermal stress is not suppressed, and there is a problem that the mountability of the semiconductor device on the circuit board is deteriorated. Therefore, by removing the lower half of the extended portion of each terminal by etching or the like to reduce the thickness, it is possible to suppress an increase in thermal stress of the semiconductor device and avoid deterioration of mountability. However, when connecting a wire to a portion thinned by wire bonding, the thinned portion pressed by the capillary bends downward, so that it is difficult to secure the bonding strength of the wire to the terminal to be subjected to wire bonding. There is.

Japanese Unexamined Patent Publication No. 2013-16624

In view of the above circumstances, the present invention provides a semiconductor device capable of ensuring the bonding strength of a wire to a terminal subjected to wire bonding while reducing the size of a die pad in order to suppress an increase in thermal stress. That is the issue.

The semiconductor device provided by the present invention includes a die pad having a mounting surface and a back surface of the pad facing opposite sides in the thickness direction, a semiconductor element mounted on the mounting surface, and the die pad in the thickness direction of the die pad. A plurality of terminals arranged so as to surround the semiconductor element and conductive to the semiconductor element, and a resin back surface facing the same direction as the back surface of the pad, and a part of the semiconductor element, the die pad, and the plurality of terminals, respectively. A semiconductor device comprising a sealing resin that covers each of the terminals, wherein the terminal has a terminal first back surface and a terminal second back surface that face the same direction as the pad back surface and are exposed from the resin back surface. The second back surface of the terminal in each of the terminals is characterized in that it is located between the first back surface of the terminal and the back surface of the pad in the thickness direction.

In the practice of the present invention, the terminal is preferably located between the first back surface of the terminal and the second back surface of the terminal in the thickness direction, and from the first back surface of the terminal and the second back surface of the terminal. A recessed terminal recess is formed, and the terminal recess is filled with the sealing resin.

Preferably, in the practice of the present invention, the terminal further has a terminal main surface facing in the same direction as the mounting surface, and further includes a wire connecting the semiconductor element and the terminal main surface.

In the practice of the present invention, preferably, the terminal further has a terminal side surface that intersects both the terminal main surface and the terminal first back surface, and the sealing resin further has a resin side surface that intersects the resin back surface. The terminal side surface is exposed from the resin side surface.

In the practice of the present invention, preferably, the plurality of the terminals are the plurality of first terminals arranged along the first direction perpendicular to the thickness direction, and the plurality of first terminals in the thickness direction and the first direction. A plurality of second terminals arranged along a second direction perpendicular to both are included, and the terminal side surface is flush with the resin side surface.

In the practice of the present invention, preferably, the sealing resin is formed with a groove portion recessed from the back surface of the resin and penetrating each of the terminals, and each of the terminals is located outside the groove portion. It also includes an external terminal having the first back surface of the terminal and an internal terminal located inside the groove and having the second back surface of the terminal.

Preferably, in the practice of the present invention, the external terminal further includes a terminal first main surface facing in the same direction as the mounting surface, and further includes an external wire connecting the semiconductor element and the terminal first main surface. ..

In the practice of the present invention, preferably, the internal terminal further has a terminal second main surface facing in the same direction as the terminal first main surface, and an internal wire connecting the semiconductor element and the terminal second main surface. Further prepare.

In the practice of the present invention, preferably, the external terminal further has an external terminal outer surface that intersects both the terminal first main surface and the terminal first back surface and faces outward, and the sealing resin is used. It further has a resin side surface that intersects the resin back surface, and the outer terminal outer surface is exposed from the resin side surface.

In the practice of the present invention, preferably, the external terminal further has an inner side surface of the external terminal that intersects the first back surface of the terminal and faces the side opposite to the outer surface of the external terminal, and the external terminal has the above-mentioned external terminal. An external terminal projecting portion that is flush with the first main surface of the terminal and projects from the inner side surface of the external terminal toward the groove portion is formed.

In the practice of the present invention, preferably, the internal terminal further has an inner terminal inner surface that intersects the second back surface of the terminal and faces the inner surface of the outer terminal, and the internal terminal has the second terminal. An internal terminal projecting portion that is flush with the main surface and projects from the inner surface of the internal terminal toward the groove is formed.

In the practice of the present invention, preferably, the external terminal protruding portion has an external terminal end surface exposed from the groove portion, the internal terminal protruding portion has an internal terminal end surface exposed from the groove portion, and the groove portion has an internal terminal end surface exposed. , An insulator interposed between the outer terminal end face and the inner terminal end face is injected.

In the practice of the present invention, preferably, the plurality of the terminals are the plurality of first terminals arranged along the first direction perpendicular to the thickness direction, and the plurality of first terminals in the thickness direction and the first direction. A plurality of second terminals arranged along a second direction perpendicular to both are included, and the outer surface of the outer terminal is flush with the resin side surface.

In the practice of the present invention, the back surface of the pad is preferably exposed from the back surface of the resin.

In the practice of the present invention, preferably, the die pad further has a pad side surface that intersects the back surface of the pad and faces the plurality of terminals, and the die pad is flush with the mounting surface and said. A pad protruding portion is formed so as to project from the side surface of the pad toward the plurality of terminals.

In the practice of the present invention, preferably, a heat dissipation promoting means for promoting the release of heat generated from the semiconductor element is provided on the back surface of the pad.

In the practice of the present invention, the heat dissipation promoting means is preferably composed of a plurality of annular grooves recessed from the back surface of the pad and surrounding the center of the back surface of the pad, and a region surrounded by each of the annular grooves on the back surface of the pad. The center positions of are the same.

According to the semiconductor device according to the present invention, it is possible to secure the bonding strength of the wire to the terminal to be subjected to wire bonding while reducing the size of the die pad in order to suppress the increase in thermal stress.

Other features and advantages of the present invention will become more apparent with the detailed description given below based on the accompanying drawings.

It is a perspective view of the semiconductor device which concerns on 1st Embodiment of this invention. It is a bottom view of the semiconductor device shown in FIG. It is a top view (permeating the sealing resin) of the semiconductor device shown in FIG. It is a front view of the semiconductor device shown in FIG. It is a right side view of the semiconductor device shown in FIG. It is sectional drawing which follows the VI-VI line of FIG. FIG. 3 is a cross-sectional view taken along the line VII-VII of FIG. It is a partially enlarged view of FIG. It is a partially enlarged view of FIG. It is sectional drawing explaining the operation effect of the semiconductor device shown in FIG. It is sectional drawing explaining the operation effect of the semiconductor device shown in FIG. It is a bottom view of the semiconductor device which concerns on 2nd Embodiment of this invention. It is a top view (permeating the sealing resin) of the semiconductor device shown in FIG. It is a front view of the semiconductor device shown in FIG. It is sectional drawing which follows the XV-XV line of FIG. It is a partially enlarged view of FIG. It is sectional drawing explaining the manufacturing process of the semiconductor device shown in FIG. It is a bottom view of the semiconductor device which concerns on 3rd Embodiment of this invention. It is sectional drawing which follows the XIX-XIX line of FIG. It is a partially enlarged view of FIG. It is a bottom view of the semiconductor device which concerns on the modification of 3rd Embodiment of this invention. FIG. 2 is a cross-sectional view taken along the line XXII-XXII of FIG.

An embodiment for carrying out the present invention (hereinafter referred to as “embodiment”) will be described with reference to the accompanying drawings.

[First Embodiment]
The semiconductor device A10 according to the first embodiment of the present invention will be described with reference to FIGS. 1 to 11. The semiconductor device A10 includes a die pad 1, a semiconductor element 2, a plurality of terminals 3, and a sealing resin 5. In this embodiment, the semiconductor device A10 further includes a wire 4.

FIG. 3 is transparent to the sealing resin 5 for convenience of understanding. The transparent sealing resin 5 in FIG. 3 is shown by an imaginary line (dashed-dotted line). FIG. 8 is an enlargement of the vicinity of the terminal 3 shown in FIG. FIG. 9 is an enlargement of the vicinity of the die pad 1 shown in FIG.

The semiconductor device A10 is surface-mounted on circuit boards of various electronic devices. The package type of the semiconductor device A10 is QFN. As shown in FIG. 1 and the like, the semiconductor device A10 in the thickness direction z-view (hereinafter referred to as “planar view”) of the die pad 1 has a rectangular shape. Here, for convenience of explanation, the direction (horizontal direction in FIG. 2) perpendicular to the thickness direction z of the die pad 1 (hereinafter, simply referred to as “thickness direction z”) is referred to as the first direction x. Further, a direction (vertical direction in FIG. 2) perpendicular to both the thickness direction z and the first direction x of the die pad 1 is referred to as a second direction y.

As shown in FIGS. 3 and 6, the die pad 1 is a member on which the semiconductor element 2 is mounted. The die pad 1 is made of a metal material, and the metal material is, for example, Cu. The die pad 1 is derived from a lead frame obtained by processing the metal material. The die pad 1 has a mounting surface 11, a pad back surface 12, a pad side surface 13, and a pad diagonal member 15.

As shown in FIGS. 6 and 9, the mounting surface 11 faces the thickness direction z. As shown in FIG. 3, the mounting surface 11 has a rectangular shape. The semiconductor element 2 is mounted on the mounting surface 11. The portion of the mounting surface 11 on which the semiconductor element 2 is not mounted is covered with the sealing resin 5.

As shown in FIGS. 6 and 9, the pad back surface 12 faces the side opposite to the mounting surface 11 in the thickness direction z. As shown in FIG. 2, the back surface 12 of the pad has a rectangular shape, and its area is set smaller than that of the mounting surface 11. In this embodiment, the back surface 12 of the pad is exposed from the sealing resin 5.

As shown in FIGS. 3 and 9, the pad side surface 13 intersects the pad back surface 12 and faces the plurality of terminals 3. The pad side surface 13 is composed of four surfaces, and each pad side surface 13 faces either the first direction x or the second direction y. In the thickness direction z, the upper end of the pad side surface 13 located between the mounting surface 11 and the pad back surface 12 is bent toward either the first direction x or the second direction y. The pad side surface 13 is covered with the sealing resin 5.

As shown in FIGS. 3, 6 and 9, the die pad 1 is formed with eaves-shaped pad protrusions 14 that are flush with the mounting surface 11 and project from the pad side surfaces 13 toward the plurality of terminals 3. Has been done. The pad projecting portions 14 are formed at four positions on the die pad 1, and each pad projecting portion 14 projects in either the first direction x or the second direction y. The pad protrusion 14 has a pad end surface 141 and a pad intermediate surface 142. The pad end face 141 is along the thickness direction z and faces either the first direction x or the second direction y. The pad intermediate surface 142 faces in the same direction as the pad back surface 12 and intersects the pad end surface 141. The pad intermediate surface 142 is connected to the pad side surface 13 inside the die pad 1. In the thickness direction z, the distance from the mounting surface 11 to the pad intermediate surface 142 is about half the distance from the mounting surface 11 to the pad back surface 12. The pad protrusion 14 is covered with the sealing resin 5.

As shown in FIGS. 3 and 7, the pad diagonal member 15 extends obliquely from the intersection of the two pad end faces 141 with respect to both the first direction x and the second direction y. The pad diagonal member 15 is composed of four members and extends radially from the four corners of the die pad 1 in a plan view. The pad slanted lumber 15 has a slanted lumber upper surface 151, a slanted lumber lower surface 152, and a slanted lumber end surface 153. The slanted lumber upper surface 151 faces in the same direction as the mounting surface 11 and is flush with the mounting surface 11. The slanted lumber lower surface 152 faces in the same direction as the pad back surface 12. In the direction in which the pad diagonal member 15 extends, one end of the diagonal member lower surface 152 is connected to the pad intermediate surface 142. Further, in the thickness direction z, the distance from the diagonal member upper surface 151 to the diagonal member lower surface 152 is substantially equal to the distance from the mounting surface 11 to the pad intermediate surface 142. The slanted lumber end surface 153 is located at the tip of the pad slanted lumber 15 in the direction in which the pad slanted lumber 15 extends, and intersects both the slanted lumber upper surface 151 and the slanted lumber lower surface 152. The diagonal lumber end face 153 has an L shape and is exposed to the outside from the sealing resin 5. In the pad diagonal member 15, all the portions except the diagonal member end face 153 are covered with the sealing resin 5.

As shown in FIGS. 3 and 6, the semiconductor element 2 is mounted on the mounting surface 11 of the die pad 1. In the present embodiment, the semiconductor element 2 is an integrated circuit (IC) in which a drive circuit for lighting a light source such as an LED is incorporated. The semiconductor element 2 has an element main surface 21 and an element back surface 22.

As shown in FIGS. 6 and 9, the element main surface 21 faces in the same direction as the mounting surface 11 of the die pad 1. A plurality of electrode pads 211 are provided on the element main surface 21. Each electrode pad 211 conducts to a circuit incorporated inside the semiconductor element 2. The electrode pad 211 is made of, for example, Al. In this embodiment, the wire 4 is connected to each electrode pad 211. Further, as shown in FIGS. 6 and 9, the back surface 22 of the element faces the side opposite to the mounting surface 11 in the thickness direction z. The back surface 22 of the element faces the mounting surface 11.

As shown in FIGS. 6 and 9, the bonding layer 29 is interposed between the mounting surface 11 of the die pad 1 and the element back surface 22 of the semiconductor element 2. The bonding layer 29 is composed of, for example, a synthetic resin (so-called Ag paste) containing an epoxy resin containing Ag as a main component. The semiconductor element 2 is mounted on the mounting surface 11 via the bonding layer 29.

As shown in FIG. 3, the plurality of terminals 3 are arranged so as to surround the die pad 1 in a plan view, and are electrically connected to the semiconductor element 2. Each of the plurality of terminals 3 is composed of a lead frame derived from the die pad 1. The plurality of terminals 3 include a plurality of first terminals 3a arranged along the first direction x and a plurality of second terminals 3b arranged along the second direction y. In the present embodiment, seven of the plurality of first terminals 3a are arranged on two sides of the semiconductor device A10 which is separated from each other in the second direction y in a plan view. Further, seven of the plurality of second terminals 3b are arranged on two sides of the semiconductor device A10 which is separated from each other in the first direction x in a plan view. The number of arrays of the plurality of first terminals 3a and second terminals 3b in the semiconductor device A10 is not limited to this embodiment. In the present embodiment, the terminal 3 has a terminal main surface 31, a terminal first back surface 321 and a terminal second back surface 322, and a terminal side surface 33.

As shown in FIGS. 3 and 8, the terminal main surface 31 faces in the same direction as the mounting surface 11 of the die pad 1 and has a band shape. The terminal main surface 31 is covered with the sealing resin 5. A wire 4 is connected to each terminal main surface 31, and each terminal 3 is conductive to the semiconductor element 2 via the wire 4. As shown in FIG. 3, in a plurality of first terminals 3a arranged on one side of the semiconductor device A10 in a plan view, the terminal main surface 31 of the first terminal 3a located at the center extends along the second direction y. ing. The terminal main surface 31 of the first terminal 3a arranged so as to be separated from the first terminal 3a located at the center in the first direction x has a portion inclined with respect to the second direction y. The portion is set so that the inclination with respect to the second direction y increases as the distance from the first terminal 3a located at the center increases in the first direction x. Further, as shown in FIG. 3, in a plurality of second terminals 3b arranged on one side of the semiconductor device A10 in a plan view, the terminal main surface 31 of the second terminal 3b located at the center is along the first direction x. Is extending. The terminal main surface 31 of the second terminal 3b arranged so as to be separated from the second terminal 3b located at the center in the second direction y has a portion inclined with respect to the first direction x. The portion is set so that the inclination with respect to the first direction x increases as the distance from the second terminal 3b located at the center in the second direction y increases.

As shown in FIGS. 2 and 8, the terminal first back surface 321 faces in the same direction as the pad back surface 12 of the die pad 1 and is exposed from the sealing resin 5. The terminal first back surface 321 of the plurality of first terminals 3a and the second terminal 3b are all arranged in contact with each side of the semiconductor device A10 in a plan view.

As shown in FIGS. 2 and 8, the terminal second back surface 322 faces the same direction as the pad back surface 12 of the die pad 1 like the terminal first back surface 321 and is exposed from the sealing resin 5. The terminal second back surface 322 at each terminal 3 is located between the terminal first back surface 321 and the pad back surface 12 in a plan view. Further, in the plurality of first terminals 3a and the second terminal 3b, the distance between the adjacent terminal second back surfaces 322 is set shorter than the distance between the adjacent terminal first back surfaces 321.

As shown in FIGS. 2 to 6 and 8, the terminal side surface 33 intersects both the terminal main surface 31 and the terminal first back surface 321. In the present embodiment, the terminal side surface 33 stands up from the terminal first back surface 321 toward the terminal main surface 31 along the thickness direction z. The terminal side surface 33 is exposed from the sealing resin 5 and faces either the first direction x or the second direction y.

As shown in FIGS. 3 and 8, each terminal 3 is formed with a terminal recess 34. The terminal recess 34 is located between the terminal first back surface 321 and the terminal second back surface 322 in a plan view. The terminal recess 34 is recessed from the terminal first back surface 321 and the terminal second back surface 322. The terminal recess 34 is filled with the sealing resin 5. The terminal recess 34 can be formed in the terminal 3 by etching, for example. By forming the terminal recess 34, the terminal first back surface 321 and the terminal second back surface 322 appear on the terminal 3.

As shown in FIG. 3, in a plurality of first terminals 3a arranged on one side of the semiconductor device A10 in a plan view, the terminal recess 34 of the first terminal 3a located at the center is in a state along the second direction y. It is formed. The terminal recesses 34 of the first terminal 3a arranged apart from the first terminal 3a located at the center in the first direction x are formed in a state of being inclined with respect to the second direction y. The terminal recess 34 of the first terminal 3a is set so that the inclination with respect to the second direction y increases as the distance from the central first terminal 3a in the first direction x increases. Further, as shown in FIG. 3, in a plurality of second terminals 3b arranged on one side of the semiconductor device A10 in a plan view, the terminal recess 34 of the second terminal 3b located at the center is along the first direction x. It is formed in a state. The terminal recesses 34 of the second terminal 3b arranged apart from the second terminal 3b located at the center in the second direction y are formed in a state of being inclined with respect to the first direction x. The terminal recess 34 of the second terminal 3b is set so that the inclination with respect to the first direction x increases as the distance from the second terminal 3b located at the center in the second direction y increases.

As shown in FIGS. 3, 6, 8 and 9, the wire 4 connects the electrode pad 211 of the semiconductor element 2 and the terminal main surface 31 of the terminal 3. The wires 4 conduct the plurality of terminals 3 to the semiconductor element 2. The wire 4 is composed of, for example, Au.

As shown in FIG. 6, the sealing resin 5 covers the semiconductor element 2, the die pad 1, and a part of each of the plurality of terminals 3. The sealing resin 5 is a synthetic resin having electrical insulation, for example, a black epoxy resin. The sealing resin 5 has a resin main surface 51, a resin back surface 52, and a resin side surface 53.

As shown in FIG. 6, the resin main surface 51 faces in the same direction as the mounting surface 11 of the die pad 1. The resin main surface 51 is rectangular and flat. As shown in FIG. 6, the resin back surface 52 faces in the same direction as the pad back surface 12 of the die pad 1. Therefore, the resin main surface 51 and the resin back surface 52 face opposite to each other in the thickness direction z. As shown in FIG. 2, the back surface 12 of the pad and the terminal first back surface 321 and the terminal second back surface 322 of each terminal 3 are exposed from the resin back surface 52. As shown in FIGS. 4, 5 and 8, the resin side surface 53 intersects both the resin main surface 51 and the resin back surface 52. In the present embodiment, the resin side surface 53 is composed of four surfaces, and each resin side surface 53 faces either the first direction x or the second direction y. From each of the resin side surfaces 53, the diagonal member end surface 153 of the pad diagonal member 15 of the die pad 1 and the terminal side surface 33 of the terminal 3 are exposed. In this embodiment, the terminal side surface 33 is flush with the resin side surface 53.

As shown in FIGS. 8 and 9, the interior plating layer 61 is provided so as to cover the mounting surface 11 of the die pad 1 and the terminal main surface 31 of each terminal 3. Therefore, one end of the bonding layer 29 and the wire 4 is in contact with the interior plating layer 61. The interior plating layer 61 is composed of, for example, Ag.

As shown in FIGS. 8 and 9, the exterior plating layer 62 is provided so as to cover the pad back surface 12 of the die pad 1 and the terminal first back surface 321 and the terminal second back surface 322 of each terminal 3. The exterior plating layer 62 is composed of, for example, Sn.

Next, the action and effect of the semiconductor device A10 will be described.

In the semiconductor device A10, each terminal 3 has a terminal first back surface 321 and a terminal second back surface 322 exposed from the resin back surface 52 of the sealing resin 5. The terminal second back surface 322 at each terminal 3 is located between the terminal first back surface 321 and the pad back surface 12 of the die pad 1 in a plan view. By adopting such a configuration, even when the size of the die pad 1 is reduced and the length of each terminal 3 in either the first direction x or the second direction y is extended. It is possible to suppress an increase in the volume of each terminal 3. Therefore, it is possible to suppress an increase in thermal stress in the semiconductor device A10.

In this case, as shown in FIG. 10, when the wire 4 is bonded, the terminal first back surface 321 and the terminal second back surface 322 serve as the support surface of the terminal 3 with respect to the work table 81. Therefore, when the capillary 82 is pressed against the terminal main surface 31 directly above the terminal second back surface 322, the capillary 82 receives a reaction force from the terminal main surface 31 and the terminal 3 does not bend in the thickness direction z. .. Therefore, the bonding strength of the wire 4 with respect to the terminal 3 can be ensured. As shown in FIG. 11, when the terminal 3 does not have the terminal second back surface 322, when the capillary 82 is pressed against the terminal main surface 31, the terminal 3 bends as shown in the imaginary line in the thickness direction z. It ends up. Therefore, it is difficult to secure the bonding strength of the wire 4 with respect to the terminal 3. From the above, according to the semiconductor device A10, it is possible to secure the bonding strength of the wire 4 with respect to the terminal 3 subjected to wire bonding while reducing the size of the die pad 1 in order to suppress the increase in thermal stress.

The terminal 3 is formed with a terminal recess 34 located between the terminal first back surface 321 and the terminal second back surface 322 in the thickness direction z and recessed from the terminal first back surface 321 and the terminal second back surface 322. .. The terminal recess 34 is filled with the sealing resin 5. By adopting such a configuration, since the terminal 3 is supported by the sealing resin 5, it is possible to prevent the terminal 3 from falling off from the sealing resin 5.

The terminal 3 has a terminal side surface 33 exposed from the resin side surface 53 of the sealing resin 5. In this embodiment, the terminal side surface 33 is flush with the resin side surface 53. With such a configuration, when the semiconductor device A10 is mounted on the circuit board, the terminal side surface 33 promotes the formation of solder fillets, so that the bonding strength of the semiconductor device A10 to the circuit board can be improved.

The pad back surface 12 of the die pad 1 is exposed from the resin back surface 52 of the sealing resin 5. With such a configuration, the heat generated from the semiconductor element 2 when the semiconductor device A10 is used can be efficiently dissipated from the back surface 12 of the pad to the outside.

The die pad 1 is formed with a pad projecting portion 14 that is flush with the mounting surface 11 and projects from the pad side surface 13 toward the plurality of terminals 3. By adopting such a configuration, both the pad side surface 13 and the pad intermediate surface 142 of the pad protrusion 14 are covered with the sealing resin 5, and the die pad 1 is supported by the sealing resin 5 by the pad protrusion 14. It becomes a state. Therefore, the pad protrusion 14 can prevent the die pad 1 from falling off from the sealing resin 5.

[Second Embodiment]
The semiconductor device A20 according to the second embodiment of the present invention will be described with reference to FIGS. 12 to 17. In these figures, the same or similar elements as the above-mentioned semiconductor device A10 are designated by the same reference numerals, and duplicate description will be omitted.

The semiconductor device A20 according to the present embodiment is different from the semiconductor device A10 described above in the configurations of the plurality of terminals 3 and the sealing resin 5. Further, the semiconductor device A20 includes an outer wire 41 and an inner wire 42 instead of the wire 4. Here, FIG. 13 is transparent to the sealing resin 5 for convenience of understanding. In FIG. 13, the permeated sealing resin 5 is shown by an imaginary line. FIG. 16 is an enlargement of the vicinity of the terminal 3 shown in FIG. The cross-sectional position of FIG. 17 is the same as the cross-sectional position of FIG.

As shown in FIGS. 12 and 14 to 16, the sealing resin 5 is formed with a groove portion 54 that is recessed from the resin back surface 52 and penetrates each terminal 3. In the present embodiment, the groove portions 54 are formed at four positions, and each of the groove portions 54 is along either the first direction x or the second direction y.

As shown in FIGS. 12 and 15, each terminal 3 includes an external terminal 301 located outside the groove 54 and an internal terminal 302 located inside the groove 54. In the present embodiment, the external terminal 301 and the internal terminal 302 constitute the first terminal 3a and the second terminal 3b, respectively.

As shown in FIGS. 12 to 16, the external terminal 301 has a terminal first back surface 321. Further, the external terminal 301 has a terminal first main surface 311 and an external terminal outer surface 331 and an external terminal inner side surface 341.

As shown in FIGS. 13, 15 and 16, the terminal first main surface 311 faces the same direction as the mounting surface 11 of the die pad 1. An external wire 41 is connected to the terminal first main surface 311. The external wire 41 connects the electrode pad 211 of the semiconductor element 2 and the terminal first main surface 311. The external wire 41 is composed of, for example, Au. Further, the terminal first main surface 311 is provided with an interior plating layer 61 that covers the terminal first main surface 311. The outer wire 41 is in contact with the interior plating layer 61.

As shown in FIGS. 12 and 14 to 16, the outer terminal outer surface 331 intersects both the terminal first main surface 311 and the terminal first back surface 321. In the present embodiment, the outer terminal outer surface 331 stands up from the terminal first back surface 321 toward the terminal first main surface 311 along the thickness direction z. The outer terminal outer surface 331 is exposed from the resin side surface 53 of the sealing resin 5 and faces either the first direction x or the second direction y. The outer terminal outer surface 331 is flush with the resin side surface 53.

As shown in FIG. 16, the outer terminal inner side surface 341 intersects the terminal first back surface 321 and faces the side opposite to the outer terminal outer surface 331. In the thickness direction z, the upper end of the outer terminal inner surface 341 located between the terminal first main surface 311 and the terminal first back surface 321 is bent toward either the first direction x or the second direction y. is doing. The inner side surface 341 of the outer terminal is covered with the sealing resin 5.

As shown in FIG. 16, the external terminal 301 is flush with the first main surface of the terminal 311 and protrudes from the inner side surface 341 of the external terminal toward the groove 54 of the sealing resin 5. The portion 35 is formed. The external terminal protrusion 35 has an external terminal end surface 351 and an external terminal intermediate surface 352. The external terminal end face 351 is along the thickness direction z and faces either the first direction x or the second direction y. The external terminal end surface 351 is exposed from the groove portion 54. The external terminal intermediate surface 352 faces in the same direction as the terminal first back surface 321 and intersects the external terminal end surface 351. The external terminal intermediate surface 352 is connected to the external terminal inner side surface 341 inside the external terminal 301. In the thickness direction z, the distance from the terminal first main surface 311 to the external terminal intermediate surface 352 is about half the distance from the terminal first main surface 311 to the terminal first back surface 321. The external terminal protrusion 35 is covered with the sealing resin 5 except for the external terminal end surface 351.

As shown in FIG. 13, in a plurality of external terminals 301 forming a part of a plurality of first terminals 3a arranged on one side of the semiconductor device A10 in a plan view, an external terminal protrusion of the external terminal 301 located at the center thereof. 35 is formed in a state along the second direction y. The external terminal protrusions 35 of the external terminals 301 arranged apart from the external terminal 301 located at the center in the first direction x are formed in a state of being inclined with respect to the second direction y. The external terminal protrusion 35 of the external terminal 301 is set so that the inclination with respect to the second direction y increases as the distance from the centrally located external terminal 301 in the first direction x increases. Further, as shown in FIG. 13, in the plurality of external terminals 301 forming a part of the plurality of second terminals 3b arranged on one side of the semiconductor device A10 in a plan view, the external terminals of the external terminals 301 located at the center are external terminals. The protruding portion 35 is formed in a state along the first direction x. The external terminal protrusions 35 of the external terminals 301 arranged apart from the external terminal 301 located at the center in the second direction y are formed in a state of being inclined with respect to the first direction x. The external terminal protrusion 35 of the external terminal 301 is set so that the inclination with respect to the first direction x increases as the distance from the centrally located external terminal 301 in the second direction y increases.

As shown in FIGS. 12, 13, 15 and 16, the internal terminal 302 has a terminal second back surface 322. Further, the internal terminal 302 has a terminal second main surface 312 and an internal terminal inner side surface 342.

As shown in FIGS. 13, 15 and 16, the terminal second main surface 312 faces in the same direction as the mounting surface 11 of the die pad 1. An internal wire 42 is connected to the terminal second main surface 312. The internal wire 42 connects the electrode pad 211 of the semiconductor element 2 and the terminal second main surface 312. The internal wire 42 is composed of, for example, Au. Further, the terminal second main surface 312 is provided with an interior plating layer 61 that covers the terminal second main surface 312. The internal wire 42 is in contact with the interior plating layer 61.

As shown in FIG. 16, the inner terminal inner side surface 342 intersects the terminal second back surface 322 and faces the outer terminal inner side surface 341. In the thickness direction z, the upper end of the inner terminal inner surface 342 located between the terminal second main surface 312 and the terminal second back surface 322 is bent toward either the first direction x or the second direction y. is doing. The inner side surface 342 of the internal terminal is covered with the sealing resin 5.

As shown in FIG. 16, the internal terminal 302 has an eaves-shaped internal terminal protrusion that is flush with the second main surface 312 of the terminal and protrudes from the inner side surface 342 of the internal terminal toward the groove 54 of the sealing resin 5. The portion 36 is formed. The internal terminal protrusion 36 has an internal terminal end surface 361 and an internal terminal intermediate surface 362. The internal terminal end surface 361 is along the thickness direction z and faces either the first direction x or the second direction y. The internal terminal end surface 361 is exposed from the groove portion 54 and faces the external terminal end surface 351 of the external terminal protrusion 35. The internal terminal intermediate surface 362 faces in the same direction as the terminal second back surface 322 and intersects the internal terminal end surface 361. The internal terminal intermediate surface 362 is connected to the internal terminal inner side surface 342 inside the internal terminal 302. In the thickness direction z, the distance from the terminal second main surface 312 to the internal terminal intermediate surface 362 is half the distance from the terminal second main surface 312 to the terminal second back surface 322. The internal terminal protrusion 36 is covered with the sealing resin 5 except for the internal terminal end surface 361.

As shown in FIG. 13, in the plurality of internal terminals 302 forming a part of the plurality of first terminals 3a arranged on one side of the semiconductor device A10 in a plan view, the internal terminal protrusions of the internal terminals 302 located at the center thereof. 36 is formed in a state along the second direction y. The internal terminal protrusions 36 of the internal terminals 302 arranged apart from the centrally located internal terminal 302 in the first direction x are formed in a state of being inclined with respect to the second direction y. The internal terminal protrusion 36 of the internal terminal 302 is set so that the inclination with respect to the second direction y increases as the distance from the centrally located internal terminal 302 in the first direction x increases. Further, as shown in FIG. 13, in the plurality of internal terminals 302 forming a part of the plurality of second terminals 3b arranged on one side of the semiconductor device A10 in a plan view, the internal terminals of the internal terminals 302 located at the center thereof. The protruding portion 36 is formed in a state along the first direction x. The internal terminal protrusions 36 of the internal terminals 302 arranged apart from the centrally located internal terminal 302 in the second direction y are formed in a state of being inclined with respect to the first direction x. The internal terminal protrusion 36 of the internal terminal 302 is set so that the inclination with respect to the first direction x increases as the distance from the centrally located internal terminal 302 in the second direction y increases.

As shown in FIGS. 14 to 16, the groove 54 of the sealing resin 5 has an insulator 55 interposed between the external terminal end surface 351 of the external terminal protrusion 35 and the internal terminal end surface 361 of the internal terminal protrusion 36. Has been injected. The insulator 55 is composed of a fluid synthetic resin used for underfilling, for example.

As shown in FIG. 17, the semiconductor device A20 can simultaneously form the groove portion 54, the external terminal 301, and the internal terminal 302 by inserting the blade 83 from the resin back surface 52 after forming the sealing resin 5. can.

Next, the action and effect of the semiconductor device A20 will be described.

In the semiconductor device A20, similarly to the semiconductor device A10 described above, each terminal 3 has a terminal first back surface 321 and a terminal second back surface 322 exposed from the resin back surface 52 of the sealing resin 5. The terminal second back surface 322 at each terminal 3 is located between the terminal first back surface 321 and the pad back surface 12 of the die pad 1 in a plan view. Therefore, the semiconductor device A20 can also secure the bonding strength of the wire 4 with respect to the terminal 3 involved in wire bonding while reducing the size of the die pad 1 in order to suppress the increase in thermal stress.

In the semiconductor device A20, the sealing resin 5 is formed with a groove portion 54 that is recessed from the resin back surface 52 and penetrates each terminal 3. Further, each terminal 3 is located outside the groove 54 and has the terminal first back surface 321 and is located inside the groove 54 and has the terminal second back surface 322. Includes terminal 302. By adopting such a configuration, the external terminal 301 and the internal terminal 302 are in a state of being electrically insulated, and each of them can be an independent terminal 3. The external terminal 301 has a terminal first main surface 311 and an external wire 41 is connected to the terminal first main surface 311. The internal terminal 302 has a terminal second main surface 312, and an internal wire 42 is connected to the terminal second main surface 312. Different electric signals can be passed through the outer wire 41 and the inner wire 42. Therefore, in the semiconductor device A20, the number of terminals 3 can be increased, and the semiconductor element 2 in which a denser circuit is integrated can be provided.

The external terminal 301 has an external terminal outer surface 331 exposed from the resin side surface 53 of the sealing resin 5. In the present embodiment, the outer terminal outer surface 331 is flush with the resin side surface 53. With such a configuration, when the semiconductor device A20 is mounted on the circuit board, the outer terminal outer surface 331 promotes the formation of solder fillets, so that the bonding strength of the semiconductor device A20 to the circuit board can be improved.

The external terminal 301 is formed with an external terminal protruding portion 35 that is flush with the first main surface of the terminal 311 and projects from the inner side surface 341 of the external terminal toward the groove 54 of the sealing resin 5. By adopting such a configuration, both the outer terminal inner surface 341 and the outer terminal intermediate surface 352 of the outer terminal protrusion 35 are covered with the sealing resin 5, and the outer terminal 301 is sealed by the outer terminal protrusion 35. It is in a state of being supported by the resin 5. Therefore, the external terminal protrusion 35 can prevent the external terminal 301 from falling off from the sealing resin 5.

Further, the internal terminal 302 is formed with an internal terminal protruding portion 36 that is flush with the second main surface 312 of the terminal and projects from the inner side surface 342 of the internal terminal toward the groove 54 of the sealing resin 5. By adopting such a configuration, both the inner terminal inner surface 342 and the inner terminal intermediate surface 362 of the inner terminal protrusion 36 are covered with the sealing resin 5, and the inner terminal 302 is sealed by the inner terminal protrusion 36. It is in a state of being supported by the resin 5. Therefore, the internal terminal protrusion 36 can prevent the internal terminal 302 from falling off from the sealing resin 5.

Both the external terminal end surface 351 of the external terminal protrusion 35 and the internal terminal end surface 361 of the internal terminal protrusion 36 are exposed from the groove 54 of the sealing resin 5. An insulator 55 interposed between the external terminal end surface 351 and the internal terminal end surface 361 is injected into the groove portion 54. By adopting such a configuration, it is possible to appropriately secure the electrical insulation between the external terminal 301 and the internal terminal 302.

[Third Embodiment]
The semiconductor device A30 according to the third embodiment of the present invention will be described with reference to FIGS. 18 to 22. In these figures, the same or similar elements as the above-mentioned semiconductor device A10 are designated by the same reference numerals, and duplicate description will be omitted.

The semiconductor device A30 according to the present embodiment is different from the semiconductor device A10 described above in the configuration of the die pad 1. Here, FIG. 20 is an enlargement of the vicinity of the die pad 1 shown in FIG.

As shown in FIGS. 18 to 20, a heat dissipation promoting means 19 for promoting the release of heat generated from the semiconductor element 2 when the semiconductor device A30 is used is provided on the pad back surface 12 of the die pad 1. In the present embodiment, the heat dissipation promoting means 19 is composed of a plurality of annular grooves 191 that are recessed from the back surface 12 of the pad and surround the center of the back surface 12 of the pad. As shown in FIG. 18, the center position C of the region surrounded by each annular groove 191 on the back surface 12 of the pad is the same. The region surrounded by each annular groove 191 is rectangular, and the center position C points to the intersection of the diagonal lines of the region. The center of the back surface 12 of the pad is the same as the center position C. The heat dissipation promoting means 19 can be formed on the die pad 1 by etching, for example.

21 and 22 show a semiconductor device A31 which is a modification of the semiconductor device A30. In addition to the plurality of annular grooves 191, the heat dissipation promoting means 19 may have a form composed of a plurality of straight grooves 192 as shown in FIGS. 21 and 22. The plurality of straight grooves 192 are recessed from the back surface 12 of the pad and are arranged along the first direction x. Each straight groove 192 extends in the second direction y. The plurality of straight grooves 192 may be arranged along the second direction y, and each straight groove 192 may extend in the first direction x.

As shown in FIGS. 18 to 20, in the present embodiment, the configuration of the plurality of terminals 3 is the same as the configuration in the semiconductor device A20. The configuration of the plurality of terminals 3 may be the same as the configuration of the semiconductor device A10.

Next, the action and effect of the semiconductor device A30 will be described.

In the semiconductor device A30, similarly to the semiconductor device A10 described above, each terminal 3 has a terminal first back surface 321 and a terminal second back surface 322 exposed from the resin back surface 52 of the sealing resin 5. The terminal second back surface 322 at each terminal 3 is located between the terminal first back surface 321 and the pad back surface 12 of the die pad 1 in a plan view. Therefore, the semiconductor device A30 can also secure the bonding strength of the wire 4 with respect to the terminal 3 involved in wire bonding while reducing the size of the die pad 1 in order to suppress the increase in thermal stress.

In the semiconductor device A30, the back surface 12 of the pad 1 of the die pad 1 is provided with heat dissipation promoting means 19 for promoting the release of heat generated from the semiconductor element 2. The heat dissipation promoting means 19 is composed of a plurality of annular grooves 191 that are recessed from the back surface 12 of the pad and surround the center (the same position as the center position C) of the back surface 12 of the pad. Further, in the semiconductor device A31 which is a modification of the semiconductor device A30, the heat dissipation promoting means 19 is composed of a plurality of straight grooves 192 arranged in the first direction x. By adopting such a configuration, even when the size of the die pad 1 is reduced in order to suppress the increase in thermal stress, the decrease in the surface area of the die pad 1 exposed from the sealing resin 5 is avoided. Therefore, the heat dissipation of the semiconductor device A30 is ensured.

The present invention is not limited to the embodiments described above. The specific configuration of each part of the present invention can be freely redesigned.

A10, A20, A30, A31: Semiconductor device 1: Die pad 11: Mounting surface 12: Pad back surface 13: Pad side surface 14: Pad protruding part 141: Pad end surface 142: Pad intermediate surface 15: Pad diagonal material 151: Diagonal material upper surface 152 : Lower surface of diagonal material 153: End surface of diagonal material 19: Heat dissipation promoting means 191: Circular groove 192: Straight groove 2: Semiconductor element 21: Main surface of element 211: Electrode pad 22: Back surface of element 29: Bonding layer 3: Terminal 3a: First Terminal 3b: 2nd terminal 301: External terminal 302: Internal terminal 31: Terminal main surface 311: Terminal 1st main surface 312: Terminal 2nd main surface 3211: Terminal 1st back surface 322: Terminal 2nd back surface 33: Terminal side surface 331 : External terminal outer surface 34: Terminal recess 341: External terminal inner surface 342: Internal terminal inner surface 35: External terminal protrusion 351: External terminal end surface 352: External terminal intermediate surface 36: Internal terminal protrusion 361: Internal terminal end surface 362 : Internal terminal intermediate surface 4: Wire 41: External wire 42: Internal wire 5: Encapsulating resin 51: Resin main surface 52: Resin back surface 53: Resin side surface 54: Groove 55: Insulator 61: Interior plating layer 62: Exterior plating Layer 81: Worktable 82: Capillary 83: Blade C: Center position z: Thickness direction x: First direction y: Second direction

Claims (8)

A die pad having a mounting surface and a pad back surface that face each other in the thickness direction,
The semiconductor element mounted on the mounting surface and
A plurality of terminals arranged so as to surround the die pad in the thickness direction of the die pad and conducting with the semiconductor element, and
A semiconductor device having a resin back surface facing in the same direction as the pad back surface, and comprising the semiconductor element and a sealing resin that covers a part of each of the die pad and the plurality of terminals.
The terminal has a terminal first back surface and a terminal second back surface that face the same direction as the pad back surface and are exposed from the resin back surface.
The second back surface of the terminal in each of the terminals is located between the first back surface of the terminal and the back surface of the pad in the thickness direction .
The terminal is formed with a terminal recess that is located between the first back surface of the terminal and the second back surface of the terminal in the thickness direction and is recessed from the first back surface of the terminal and the second back surface of the terminal.
A semiconductor device in which the terminal recess is filled with the sealing resin. The terminal further has a terminal main surface that faces in the same direction as the mounting surface.
The semiconductor device according to claim 1 , further comprising a wire connecting the semiconductor element and the terminal main surface. The terminal further has a terminal side surface that intersects both the terminal main surface and the terminal first back surface.
The sealing resin further has a resin side surface that intersects the resin back surface.
The semiconductor device according to claim 2, wherein the terminal side surface is exposed from the resin side surface. The plurality of terminals are a plurality of first terminals arranged along a first direction that is perpendicular to the thickness direction, and a first terminal that is perpendicular to both the thickness direction and the first direction. Includes a plurality of second terminals arranged along two directions,
The semiconductor device according to claim 3, wherein the terminal side surface is flush with the resin side surface. The semiconductor device according to any one of claims 1 to 4, wherein the back surface of the pad is exposed from the back surface of the resin. The die pad further has a pad side surface that intersects the back surface of the pad and faces the plurality of terminals.
The semiconductor device according to claim 5 , wherein the die pad is formed with pad projecting portions that are flush with the mounting surface and project from the pad side surface toward the plurality of terminals. The semiconductor device according to claim 5 or 6 , wherein a heat dissipation promoting means for promoting the release of heat generated from the semiconductor element is provided on the back surface of the pad . The heat dissipation promoting means is composed of a plurality of annular grooves that are recessed from the back surface of the pad and surround the center of the back surface of the pad.
The semiconductor device according to claim 7, wherein the central positions of the regions surrounded by the annular grooves on the back surface of the pad are the same.

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