JP2018110386A5 - - Google Patents

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JP2018110386A5
JP2018110386A5 JP2017247276A JP2017247276A JP2018110386A5 JP 2018110386 A5 JP2018110386 A5 JP 2018110386A5 JP 2017247276 A JP2017247276 A JP 2017247276A JP 2017247276 A JP2017247276 A JP 2017247276A JP 2018110386 A5 JP2018110386 A5 JP 2018110386A5
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Japan
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data
function
programmable logic
logic element
output
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JP2017247276A
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Japanese (ja)
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JP7032125B2 (ja
JP2018110386A (ja
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JP2017247276A 2016-12-28 2017-12-25 半導体装置、及び該半導体装置を有する電子機器 Expired - Fee Related JP7032125B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2016255452 2016-12-28
JP2016255452 2016-12-28

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JP2018110386A JP2018110386A (ja) 2018-07-12
JP2018110386A5 true JP2018110386A5 (https=) 2021-02-04
JP7032125B2 JP7032125B2 (ja) 2022-03-08

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JP2017247276A Expired - Fee Related JP7032125B2 (ja) 2016-12-28 2017-12-25 半導体装置、及び該半導体装置を有する電子機器

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JP (1) JP7032125B2 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI748035B (zh) 2017-01-20 2021-12-01 日商半導體能源硏究所股份有限公司 顯示系統及電子裝置
CN120561065B (zh) * 2025-07-31 2026-02-06 上海方宜万强微电子有限公司 一种集成算术逻辑单元的输入输出系统和方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2677656B2 (ja) * 1989-02-28 1997-11-17 富士通株式会社 ニューロコンピュータの集中制御方式
JP2517410B2 (ja) * 1989-05-15 1996-07-24 三菱電機株式会社 学習機能付集積回路装置
US5087826A (en) * 1990-12-28 1992-02-11 Intel Corporation Multi-layer neural network employing multiplexed output neurons
JPWO2010106587A1 (ja) 2009-03-18 2012-09-13 パナソニック株式会社 ニューラルネットワークシステム
KR102059218B1 (ko) 2012-05-25 2019-12-24 가부시키가이샤 한도오따이 에네루기 켄큐쇼 프로그래머블 로직 디바이스 및 반도체 장치

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