JP2017516305A - ビア材料選択および処理 - Google Patents

ビア材料選択および処理 Download PDF

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Publication number
JP2017516305A
JP2017516305A JP2016565680A JP2016565680A JP2017516305A JP 2017516305 A JP2017516305 A JP 2017516305A JP 2016565680 A JP2016565680 A JP 2016565680A JP 2016565680 A JP2016565680 A JP 2016565680A JP 2017516305 A JP2017516305 A JP 2017516305A
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Japan
Prior art keywords
conductive material
interconnect
interconnect layer
mol
conductive
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JP2016565680A
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English (en)
Japanese (ja)
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JP2017516305A5 (enExample
Inventor
ジョン・ジエンホン・ズ
ジェフリー・ジュンハオ・シュ
スタンリー・スンチュル・ソン
カーン・リム
ジョンゼ・ワン
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クアルコム，インコーポレイテッド
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Publication of JP2017516305A publication Critical patent/JP2017516305A/ja
Publication of JP2017516305A5 publication Critical patent/JP2017516305A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5226—Via connections in a multilevel interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • H01L21/76811—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving multiple stacked pre-patterned masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76816—Aspects relating to the layout of the pattern or to the size of vias or trenches
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76879—Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5228—Resistive arrangements or effects of, or between, wiring layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329—Insulating materials
    • H01L23/53295—Stacked insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53257—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being a refractory metal
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
JP2016565680A 2014-05-09 2015-04-02 ビア材料選択および処理 Pending JP2017516305A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/274,470 2014-05-09
US14/274,470 US9196583B1 (en) 2014-05-09 2014-05-09 Via material selection and processing
PCT/US2015/024083 WO2015171223A1 (en) 2014-05-09 2015-04-02 Via material selection and processing

Publications (2)

Publication Number Publication Date
JP2017516305A true JP2017516305A (ja) 2017-06-15
JP2017516305A5 JP2017516305A5 (enExample) 2018-04-26

Family

ID=52875811

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016565680A Pending JP2017516305A (ja) 2014-05-09 2015-04-02 ビア材料選択および処理

Country Status (5)

Country Link
US (1) US9196583B1 (enExample)
EP (1) EP3140857A1 (enExample)
JP (1) JP2017516305A (enExample)
CN (1) CN107004636B (enExample)
WO (1) WO2015171223A1 (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9620454B2 (en) * 2014-09-12 2017-04-11 Qualcomm Incorporated Middle-of-line (MOL) manufactured integrated circuits (ICs) employing local interconnects of metal lines using an elongated via, and related methods
US9793212B2 (en) * 2015-04-16 2017-10-17 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnect structures and methods of forming same
US11069609B2 (en) 2017-11-03 2021-07-20 Intel Corporation Techniques for forming vias and other interconnects for integrated circuit structures

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06283613A (ja) * 1992-10-20 1994-10-07 Hyundai Electron Ind Co Ltd 半導体素子の金属コンタクト形成方法
JP2000100975A (ja) * 1998-09-18 2000-04-07 Nec Corp 不揮発性半導体記憶装置及びその製造方法
JP2002319625A (ja) * 2001-04-23 2002-10-31 Toshiba Corp 半導体装置及びその製造方法
WO2004061947A1 (ja) * 2002-12-27 2004-07-22 Fujitsu Limited 半導体装置、ｄｒａｍ集積回路装置およびその製造方法
JP2010087350A (ja) * 2008-10-01 2010-04-15 Fujitsu Microelectronics Ltd 半導体装置とその製造方法

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6974766B1 (en) 1998-10-01 2005-12-13 Applied Materials, Inc. In situ deposition of a low κ dielectric layer, barrier layer, etch stop, and anti-reflective coating for damascene application
US6261960B1 (en) 2000-04-06 2001-07-17 Advanced Micro Devices, Inc High density contacts having rectangular cross-section for dual damascene applications
US20050285269A1 (en) 2004-06-29 2005-12-29 Yang Cao Substantially void free interconnect formation
US7160772B2 (en) 2005-02-23 2007-01-09 International Business Machines Corporation Structure and method for integrating MIM capacitor in BEOL wiring levels
US7863188B2 (en) * 2005-07-29 2011-01-04 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
US20070218685A1 (en) 2006-03-17 2007-09-20 Swaminathan Sivakumar Method of forming trench contacts for MOS transistors
US7767570B2 (en) * 2006-03-22 2010-08-03 Taiwan Semiconductor Manufacturing Company, Ltd. Dummy vias for damascene process
US7602027B2 (en) * 2006-12-29 2009-10-13 Semiconductor Components Industries, L.L.C. Semiconductor component and method of manufacture
US8089160B2 (en) * 2007-12-12 2012-01-03 International Business Machines Corporation IC interconnect for high current
JP5554951B2 (ja) 2008-09-11 2014-07-23 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US7999320B2 (en) 2008-12-23 2011-08-16 International Business Machines Corporation SOI radio frequency switch with enhanced signal fidelity and electrical isolation
US7843005B2 (en) 2009-02-11 2010-11-30 International Business Machines Corporation SOI radio frequency switch with reduced signal distortion
US8133774B2 (en) 2009-03-26 2012-03-13 International Business Machines Corporation SOI radio frequency switch with enhanced electrical isolation
US8796855B2 (en) * 2012-01-13 2014-08-05 Freescale Semiconductor, Inc. Semiconductor devices with nonconductive vias
US9355956B2 (en) * 2013-11-01 2016-05-31 Taiwan Semiconductor Manufacturing Co., Ltd. Inductor for semiconductor integrated circuit

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06283613A (ja) * 1992-10-20 1994-10-07 Hyundai Electron Ind Co Ltd 半導体素子の金属コンタクト形成方法
JP2000100975A (ja) * 1998-09-18 2000-04-07 Nec Corp 不揮発性半導体記憶装置及びその製造方法
JP2002319625A (ja) * 2001-04-23 2002-10-31 Toshiba Corp 半導体装置及びその製造方法
WO2004061947A1 (ja) * 2002-12-27 2004-07-22 Fujitsu Limited 半導体装置、ｄｒａｍ集積回路装置およびその製造方法
JP2010087350A (ja) * 2008-10-01 2010-04-15 Fujitsu Microelectronics Ltd 半導体装置とその製造方法

Also Published As

Publication number Publication date
EP3140857A1 (en) 2017-03-15
US9196583B1 (en) 2015-11-24
CN107004636A (zh) 2017-08-01
WO2015171223A1 (en) 2015-11-12
CN107004636B (zh) 2020-07-28
US20150325515A1 (en) 2015-11-12

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