JP2017158011A - 信号出力回路 - Google Patents

信号出力回路 Download PDF

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Publication number
JP2017158011A
JP2017158011A JP2016038954A JP2016038954A JP2017158011A JP 2017158011 A JP2017158011 A JP 2017158011A JP 2016038954 A JP2016038954 A JP 2016038954A JP 2016038954 A JP2016038954 A JP 2016038954A JP 2017158011 A JP2017158011 A JP 2017158011A
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JP
Japan
Prior art keywords
output
circuit
slope
signal
output circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2016038954A
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English (en)
Japanese (ja)
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JP2017158011A5 (enrdf_load_stackoverflow
Inventor
典正 岡
Norimasa Oka
典正 岡
博史 川合
Hiroshi Kawai
博史 川合
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
Denso Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denso Corp filed Critical Denso Corp
Priority to JP2016038954A priority Critical patent/JP2017158011A/ja
Priority to PCT/JP2017/001216 priority patent/WO2017149957A1/ja
Publication of JP2017158011A publication Critical patent/JP2017158011A/ja
Publication of JP2017158011A5 publication Critical patent/JP2017158011A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K4/00—Generating pulses having essentially a finite slope or stepped portions
    • H03K4/94—Generating pulses having essentially a finite slope or stepped portions having trapezoidal shape
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16—Modifications for eliminating interference voltages or currents
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
JP2016038954A 2016-03-01 2016-03-01 信号出力回路 Pending JP2017158011A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2016038954A JP2017158011A (ja) 2016-03-01 2016-03-01 信号出力回路
PCT/JP2017/001216 WO2017149957A1 (ja) 2016-03-01 2017-01-16 信号出力回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2016038954A JP2017158011A (ja) 2016-03-01 2016-03-01 信号出力回路

Publications (2)

Publication Number Publication Date
JP2017158011A true JP2017158011A (ja) 2017-09-07
JP2017158011A5 JP2017158011A5 (enrdf_load_stackoverflow) 2018-05-24

Family

ID=59743727

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016038954A Pending JP2017158011A (ja) 2016-03-01 2016-03-01 信号出力回路

Country Status (2)

Country Link
JP (1) JP2017158011A (enrdf_load_stackoverflow)
WO (1) WO2017149957A1 (enrdf_load_stackoverflow)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109714040B (zh) * 2018-12-21 2023-04-18 北京时代民芯科技有限公司 一种带反馈控制的cmos输出驱动电路
JP7251412B2 (ja) * 2019-08-30 2023-04-04 株式会社デンソー 通信装置
CN118112310B (zh) * 2024-04-30 2024-08-02 江苏帝奥微电子股份有限公司 一种电压正负斜率检测电路及其检测方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07273631A (ja) * 1994-03-29 1995-10-20 Oki Micro Design Miyazaki:Kk 半導体集積回路
JPH09186568A (ja) * 1995-07-28 1997-07-15 Texas Instr Deutschland Gmbh 電気的負荷の電源供給回路に配置されたｍｏｓ電界効果トランジスタを駆動するための回路構造
JPH11346147A (ja) * 1998-06-02 1999-12-14 Nec Corp スルーレート出力回路
US20080042696A1 (en) * 2006-08-08 2008-02-21 Ami Semiconductor Belgium Bvba Driver circuit with emi immunity
JP2011091888A (ja) * 2009-10-20 2011-05-06 Sharp Corp スイッチング制御回路及びこれを用いたスイッチング電源装置
JP2012114793A (ja) * 2010-11-26 2012-06-14 Denso Corp 通信ドライバ回路

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07273631A (ja) * 1994-03-29 1995-10-20 Oki Micro Design Miyazaki:Kk 半導体集積回路
JPH09186568A (ja) * 1995-07-28 1997-07-15 Texas Instr Deutschland Gmbh 電気的負荷の電源供給回路に配置されたｍｏｓ電界効果トランジスタを駆動するための回路構造
JPH11346147A (ja) * 1998-06-02 1999-12-14 Nec Corp スルーレート出力回路
US20080042696A1 (en) * 2006-08-08 2008-02-21 Ami Semiconductor Belgium Bvba Driver circuit with emi immunity
JP2011091888A (ja) * 2009-10-20 2011-05-06 Sharp Corp スイッチング制御回路及びこれを用いたスイッチング電源装置
JP2012114793A (ja) * 2010-11-26 2012-06-14 Denso Corp 通信ドライバ回路

Also Published As

Publication number Publication date
WO2017149957A1 (ja) 2017-09-08

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