JP2017045457A - トランザクション基盤のハイブリッドメモリモジュール、及びそれを動作させる方法 - Google Patents

トランザクション基盤のハイブリッドメモリモジュール、及びそれを動作させる方法 Download PDF

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JP2017045457A
JP2017045457A JP2016162674A JP2016162674A JP2017045457A JP 2017045457 A JP2017045457 A JP 2017045457A JP 2016162674 A JP2016162674 A JP 2016162674A JP 2016162674 A JP2016162674 A JP 2016162674A JP 2017045457 A JP2017045457 A JP 2017045457A
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memory
dram
cache
controller
transaction
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Pending
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JP2017045457A5 (enExample
Inventor
牧 天 張，
Mu-Tien Chang
牧 天 張，
宏 忠 ズン，
Hongzhong Zheng
宏 忠 ズン，
ディ 民 牛，
di-min Niu
ディ 民 牛，
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Samsung Electronics Co Ltd
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Samsung Electronics Co Ltd
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Publication of JP2017045457A publication Critical patent/JP2017045457A/ja
Publication of JP2017045457A5 publication Critical patent/JP2017045457A5/ja
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0253—Garbage collection, i.e. reclamation of unreferenced memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0877—Cache access modes
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061—Improving I/O performance
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0656—Data buffering arrangements
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7211—Wear leveling

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP2016162674A 2015-08-27 2016-08-23 トランザクション基盤のハイブリッドメモリモジュール、及びそれを動作させる方法 Pending JP2017045457A (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201562210939P 2015-08-27 2015-08-27
US62/210939 2015-08-27
US14/947,145 US20170060434A1 (en) 2015-08-27 2015-11-20 Transaction-based hybrid memory module
US14/947145 2015-11-20

Publications (2)

Publication Number Publication Date
JP2017045457A true JP2017045457A (ja) 2017-03-02
JP2017045457A5 JP2017045457A5 (enExample) 2019-08-29

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JP2016162674A Pending JP2017045457A (ja) 2015-08-27 2016-08-23 トランザクション基盤のハイブリッドメモリモジュール、及びそれを動作させる方法

Country Status (5)

Country Link
US (1) US20170060434A1 (enExample)
JP (1) JP2017045457A (enExample)
KR (1) KR20170026114A (enExample)
CN (1) CN106484628A (enExample)
TW (1) TW201710910A (enExample)

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US10387315B2 (en) * 2016-01-25 2019-08-20 Advanced Micro Devices, Inc. Region migration cache
US9830086B2 (en) * 2016-03-03 2017-11-28 Samsung Electronics Co., Ltd. Hybrid memory controller for arbitrating access to volatile and non-volatile memories in a hybrid memory group
US11080185B2 (en) 2017-06-15 2021-08-03 Rambus Inc. Hybrid memory module
KR102319189B1 (ko) 2017-06-21 2021-10-28 삼성전자주식회사 스토리지 장치, 이를 포함하는 스토리지 시스템 및 스토리지 장치의 동작 방법
CN107844436B (zh) * 2017-11-02 2021-07-16 郑州云海信息技术有限公司 一种缓存中脏数据的组织管理方法、系统及存储系统
KR102101622B1 (ko) * 2017-12-06 2020-04-17 주식회사 멤레이 메모리 제어 장치 및 이를 포함하는 컴퓨팅 디바이스
US10929291B2 (en) * 2017-12-06 2021-02-23 MemRay Corporation Memory controlling device and computing device including the same
CN108052296B (zh) * 2017-12-30 2021-02-19 惠龙易通国际物流股份有限公司 一种数据读取方法、设备及计算机存储介质
US10990463B2 (en) 2018-03-27 2021-04-27 Samsung Electronics Co., Ltd. Semiconductor memory module and memory system including the same
KR102538679B1 (ko) 2018-04-06 2023-06-02 삼성전자주식회사 메모리 시스템 및 메모리 시스템의 동작 방법
US10977198B2 (en) * 2018-09-12 2021-04-13 Micron Technology, Inc. Hybrid memory system interface
CN111399750B (zh) * 2019-01-03 2023-05-26 慧荣科技股份有限公司 闪存数据写入方法及计算机可读取存储介质
US11199991B2 (en) 2019-01-03 2021-12-14 Silicon Motion, Inc. Method and apparatus for controlling different types of storage units
CN109960471B (zh) * 2019-03-29 2022-06-03 深圳大学 数据存储方法、装置、设备以及存储介质
KR20220086785A (ko) * 2020-12-16 2022-06-24 삼성전자주식회사 트랜잭션 가속기의 동작 방법. 트랜잭션 가속기를 포함하는 컴퓨팅 장치의 동작 방법, 그리고 트랜잭션 가속기를 포함하는 컴퓨팅 장치
KR102560109B1 (ko) 2023-03-20 2023-07-27 메티스엑스 주식회사 바이트 어드레서블 장치 및 이를 포함하는 컴퓨팅 시스템
US12656954B2 (en) * 2023-03-21 2026-06-16 Micron Technology, Inc. Compute express link DRAM + NAND system solution

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CN106484628A (zh) 2017-03-08
KR20170026114A (ko) 2017-03-08
US20170060434A1 (en) 2017-03-02
TW201710910A (zh) 2017-03-16

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