JP2016528813A5 - - Google Patents
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- JP2016528813A5 JP2016528813A5 JP2016529827A JP2016529827A JP2016528813A5 JP 2016528813 A5 JP2016528813 A5 JP 2016528813A5 JP 2016529827 A JP2016529827 A JP 2016529827A JP 2016529827 A JP2016529827 A JP 2016529827A JP 2016528813 A5 JP2016528813 A5 JP 2016528813A5
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- 230000003111 delayed effect Effects 0.000 claims 13
- 230000007704 transition Effects 0.000 claims 13
- 239000004020 conductor Substances 0.000 claims 12
- 238000000034 method Methods 0.000 claims 7
- 238000011084 recovery Methods 0.000 claims 2
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201361857212P | 2013-07-22 | 2013-07-22 | |
| US61/857,212 | 2013-07-22 | ||
| US14/336,977 US9130735B2 (en) | 2013-07-22 | 2014-07-21 | Multi-phase clock generation method |
| US14/336,977 | 2014-07-21 | ||
| PCT/US2014/047586 WO2015013259A1 (en) | 2013-07-22 | 2014-07-22 | Multi-phase clock generation method |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2016528813A JP2016528813A (ja) | 2016-09-15 |
| JP2016528813A5 true JP2016528813A5 (enExample) | 2017-05-18 |
| JP6185171B2 JP6185171B2 (ja) | 2017-08-23 |
Family
ID=52343572
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2016529827A Active JP6185171B2 (ja) | 2013-07-22 | 2014-07-22 | 多相クロック生成方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US9130735B2 (enExample) |
| EP (1) | EP3025242B1 (enExample) |
| JP (1) | JP6185171B2 (enExample) |
| CN (1) | CN105393237B (enExample) |
| WO (1) | WO2015013259A1 (enExample) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9215063B2 (en) * | 2013-10-09 | 2015-12-15 | Qualcomm Incorporated | Specifying a 3-phase or N-phase eye pattern |
| US9621332B2 (en) | 2015-04-13 | 2017-04-11 | Qualcomm Incorporated | Clock and data recovery for pulse based multi-wire link |
| US9812057B2 (en) | 2015-08-05 | 2017-11-07 | Qualcomm Incorporated | Termination circuit to reduce attenuation of signal between signal producing circuit and display device |
| ES3023807T3 (en) * | 2016-01-25 | 2025-06-03 | Adaptix Ltd | Medical imaging system having an array of distributed x-ray generators |
| CN106385251A (zh) * | 2016-09-14 | 2017-02-08 | 豪威科技(上海)有限公司 | 时钟数据恢复电路 |
| US10630295B2 (en) * | 2018-04-23 | 2020-04-21 | Synaptics Incorporated | Device and method for detecting signal state transition |
| US10313068B1 (en) * | 2018-04-24 | 2019-06-04 | Qualcomm Incorporated | Signal monitoring and measurement for a multi-wire, multi-phase interface |
| US11095425B2 (en) * | 2019-10-25 | 2021-08-17 | Qualcomm Incorporated | Small loop delay clock and data recovery block for high-speed next generation C-PHY |
| KR20210088807A (ko) | 2020-01-06 | 2021-07-15 | 삼성전자주식회사 | 전자 장치 및 전자 장치의 동작 방법 |
| KR20210088808A (ko) | 2020-01-06 | 2021-07-15 | 삼성전자주식회사 | 전자 장치 및 전자 장치의 동작 방법 |
| US11092646B1 (en) * | 2020-02-18 | 2021-08-17 | Qualcomm Incorporated | Determining a voltage and/or frequency for a performance mode |
| US11545980B1 (en) * | 2021-09-08 | 2023-01-03 | Qualcomm Incorporated | Clock and data recovery for multi-phase, multi-level encoding |
Family Cites Families (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3992581A (en) * | 1975-09-02 | 1976-11-16 | Sperry Rand Corporation | Phase locked loop NRZ data repeater |
| US4419760A (en) * | 1982-01-29 | 1983-12-06 | Motorola Inc. | Augmented phase-locked loop for very wide range acquisition and method therefor |
| JP2000307561A (ja) * | 1999-04-21 | 2000-11-02 | Hitachi Ltd | バスシステム装置 |
| JP2001339376A (ja) * | 2000-05-26 | 2001-12-07 | Nec Yamagata Ltd | 同期回路 |
| US7512848B1 (en) | 2004-09-29 | 2009-03-31 | Xilinx, Inc. | Clock and data recovery circuit having operating parameter compensation circuitry |
| JP2007318807A (ja) * | 2006-04-27 | 2007-12-06 | Matsushita Electric Ind Co Ltd | 多重差動伝送システム |
| US20090274254A1 (en) * | 2006-06-16 | 2009-11-05 | Panasonic Corporation | Data transmitting device and data transmitting method |
| US20080129357A1 (en) * | 2006-11-30 | 2008-06-05 | Chlipala James D | Adaptive Integrated Circuit Clock Skew Correction |
| US9231790B2 (en) | 2007-03-02 | 2016-01-05 | Qualcomm Incorporated | N-phase phase and polarity encoded serial interface |
| EP2156555A4 (en) | 2007-06-05 | 2013-07-24 | Rambus Inc | TECHNIQUES FOR MULTIPLE CODING WITH AN EMBEDDED CLOCK |
| GB0718831D0 (en) | 2007-09-26 | 2007-11-07 | Bristol Microcircuits Ltd | Clock recovery |
| KR100898305B1 (ko) * | 2007-10-08 | 2009-05-19 | 주식회사 티엘아이 | 3라인 차동 신호법을 위한 클락 임베디드 차동 데이터수신장치 |
| US8175207B2 (en) * | 2007-12-12 | 2012-05-08 | Applied Micro Circuits Corporation | ISI pattern-weighted early-late phase detector with jitter correction |
| KR100928515B1 (ko) * | 2008-04-02 | 2009-11-26 | 주식회사 동부하이텍 | 데이터 수신 장치 |
| KR101606402B1 (ko) | 2009-12-29 | 2016-03-28 | 주식회사 동부하이텍 | 클록 복원 회로 |
| JP2011188042A (ja) * | 2010-03-05 | 2011-09-22 | Nec Corp | デジタル信号処理回路、デジタル信号処理方法、及び、プログラム |
| US8624645B2 (en) | 2011-08-15 | 2014-01-07 | Nanya Technology Corp. | Multi phase clock signal generator, signal phase adjusting loop utilizing the multi phase clock signal generator, and multi phase clock signal generating method |
| TW201404105A (zh) | 2012-07-06 | 2014-01-16 | Novatek Microelectronics Corp | 時脈資料回復電路及方法 |
-
2014
- 2014-07-21 US US14/336,977 patent/US9130735B2/en active Active
- 2014-07-22 JP JP2016529827A patent/JP6185171B2/ja active Active
- 2014-07-22 WO PCT/US2014/047586 patent/WO2015013259A1/en not_active Ceased
- 2014-07-22 CN CN201480041353.4A patent/CN105393237B/zh active Active
- 2014-07-22 EP EP14750406.2A patent/EP3025242B1/en active Active
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