JP2016134417A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2016134417A5 JP2016134417A5 JP2015006564A JP2015006564A JP2016134417A5 JP 2016134417 A5 JP2016134417 A5 JP 2016134417A5 JP 2015006564 A JP2015006564 A JP 2015006564A JP 2015006564 A JP2015006564 A JP 2015006564A JP 2016134417 A5 JP2016134417 A5 JP 2016134417A5
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor package
- underfill
- package substrate
- semiconductor chip
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims description 33
- 239000000758 substrate Substances 0.000 claims description 17
- 230000035515 penetration Effects 0.000 claims description 9
- 229910000679 solder Inorganic materials 0.000 claims description 5
- 238000004519 manufacturing process Methods 0.000 claims description 4
- 239000011347 resin Substances 0.000 claims description 4
- 229920005989 resin Polymers 0.000 claims description 4
- 230000002093 peripheral effect Effects 0.000 claims description 2
- 238000010030 laminating Methods 0.000 description 1
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2015006564A JP6464762B2 (ja) | 2015-01-16 | 2015-01-16 | 半導体パッケージ基板、および半導体パッケージと、半導体パッケージ基板の製造方法、および半導体パッケージの製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2015006564A JP6464762B2 (ja) | 2015-01-16 | 2015-01-16 | 半導体パッケージ基板、および半導体パッケージと、半導体パッケージ基板の製造方法、および半導体パッケージの製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2016134417A JP2016134417A (ja) | 2016-07-25 |
| JP2016134417A5 true JP2016134417A5 (https=) | 2018-02-01 |
| JP6464762B2 JP6464762B2 (ja) | 2019-02-06 |
Family
ID=56464392
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2015006564A Active JP6464762B2 (ja) | 2015-01-16 | 2015-01-16 | 半導体パッケージ基板、および半導体パッケージと、半導体パッケージ基板の製造方法、および半導体パッケージの製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP6464762B2 (https=) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2020191397A (ja) * | 2019-05-23 | 2020-11-26 | 凸版印刷株式会社 | 複合配線基板及びその製造方法 |
| CN112992691B (zh) * | 2021-04-23 | 2021-09-03 | 度亘激光技术(苏州)有限公司 | 半导体器件的焊接方法及半导体器件 |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001244384A (ja) * | 2000-02-28 | 2001-09-07 | Matsushita Electric Works Ltd | ベアチップ搭載プリント配線基板 |
| JP4321269B2 (ja) * | 2004-01-14 | 2009-08-26 | 株式会社デンソー | 半導体装置 |
| JP5162226B2 (ja) * | 2007-12-12 | 2013-03-13 | 新光電気工業株式会社 | 配線基板及び半導体装置 |
-
2015
- 2015-01-16 JP JP2015006564A patent/JP6464762B2/ja active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2016096292A5 (https=) | ||
| EP2866257A3 (en) | Printed circuit board and manufacturing method thereof and semiconductor pacakge using the same | |
| JP2018113414A5 (https=) | ||
| JP2014036110A5 (https=) | ||
| JP2017183521A5 (https=) | ||
| JP2016207957A5 (https=) | ||
| JP2013062474A5 (ja) | 配線基板及び配線基板の製造方法と半導体装置及び半導体装置の製造方法 | |
| JP2012256741A5 (https=) | ||
| JP2016072493A5 (https=) | ||
| WO2015039043A3 (en) | Microelectronic element with bond elements and compliant material layer | |
| JP2015153816A5 (https=) | ||
| JP2013153069A5 (https=) | ||
| JP2020513475A5 (https=) | ||
| KR20180084711A (ko) | 열전 레그 및 이를 포함하는 열전 소자 | |
| JP2017510075A5 (https=) | ||
| JP2017118067A5 (https=) | ||
| JP2014228489A5 (https=) | ||
| JP2013247293A5 (https=) | ||
| JP2015118988A5 (https=) | ||
| JP2016207959A5 (https=) | ||
| WO2012087072A3 (ko) | 인쇄회로기판 및 이의 제조 방법 | |
| JP2016533640A5 (https=) | ||
| SG10201401166YA (en) | Integrated circuit packaging system with embedded pad on layered substrate and method of manufacture thereof | |
| JP2014003292A5 (https=) | ||
| JP2015153811A5 (https=) |