JP2015525398A5 - - Google Patents

Download PDF

Info

Publication number
JP2015525398A5
JP2015525398A5 JP2015515261A JP2015515261A JP2015525398A5 JP 2015525398 A5 JP2015525398 A5 JP 2015525398A5 JP 2015515261 A JP2015515261 A JP 2015515261A JP 2015515261 A JP2015515261 A JP 2015515261A JP 2015525398 A5 JP2015525398 A5 JP 2015525398A5
Authority
JP
Japan
Prior art keywords
memory
physical address
address space
semiconductor die
functional unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2015515261A
Other languages
English (en)
Japanese (ja)
Other versions
JP2015525398A (ja
JP6105720B2 (ja
Filing date
Publication date
Priority claimed from US13/752,427 external-priority patent/US9448947B2/en
Application filed filed Critical
Publication of JP2015525398A publication Critical patent/JP2015525398A/ja
Publication of JP2015525398A5 publication Critical patent/JP2015525398A5/ja
Application granted granted Critical
Publication of JP6105720B2 publication Critical patent/JP6105720B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2015515261A 2012-06-01 2013-05-31 チップ間メモリインターフェース構造 Active JP6105720B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201261654156P 2012-06-01 2012-06-01
US61/654,156 2012-06-01
US13/752,427 US9448947B2 (en) 2012-06-01 2013-01-29 Inter-chip memory interface structure
US13/752,427 2013-01-29
PCT/US2013/043714 WO2013181603A2 (en) 2012-06-01 2013-05-31 Inter-chip memory interface structure

Publications (3)

Publication Number Publication Date
JP2015525398A JP2015525398A (ja) 2015-09-03
JP2015525398A5 true JP2015525398A5 (enExample) 2016-12-08
JP6105720B2 JP6105720B2 (ja) 2017-03-29

Family

ID=49671774

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015515261A Active JP6105720B2 (ja) 2012-06-01 2013-05-31 チップ間メモリインターフェース構造

Country Status (7)

Country Link
US (1) US9448947B2 (enExample)
EP (1) EP2856466B1 (enExample)
JP (1) JP6105720B2 (enExample)
KR (1) KR101748329B1 (enExample)
CN (1) CN104335279B (enExample)
IN (1) IN2014MN02115A (enExample)
WO (1) WO2013181603A2 (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102107147B1 (ko) * 2013-02-01 2020-05-26 삼성전자주식회사 패키지 온 패키지 장치
KR102144367B1 (ko) * 2013-10-22 2020-08-14 삼성전자주식회사 반도체 패키지 및 이의 제조 방법
US9570142B2 (en) * 2015-05-18 2017-02-14 Micron Technology, Inc. Apparatus having dice to perorm refresh operations
US20170118140A1 (en) * 2015-10-21 2017-04-27 Mediatek Inc. Network switch having identical dies and interconnection network packaged in same package
KR102755934B1 (ko) 2016-10-04 2025-01-17 삼성전자 주식회사 무선 통신 장치 및 그 제어 방법
KR102400101B1 (ko) 2017-11-03 2022-05-19 삼성전자주식회사 Pop 반도체 패키지 및 그를 포함하는 전자 시스템
US10579557B2 (en) * 2018-01-16 2020-03-03 Advanced Micro Devices, Inc. Near-memory hardened compute blocks for configurable computing substrates
KR20190087893A (ko) 2018-01-17 2019-07-25 삼성전자주식회사 클럭을 공유하는 반도체 패키지 및 전자 시스템
KR102674550B1 (ko) 2019-10-07 2024-06-13 삼성전자주식회사 온-다이 미러링 기능을 갖는 메모리 칩 및 그것을 테스트하는 방법
US11797229B2 (en) 2020-07-02 2023-10-24 Micron Technology, Inc. Multiple register clock driver loaded memory subsystem

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5945886A (en) * 1996-09-20 1999-08-31 Sldram, Inc. High-speed bus structure for printed circuit boards
US7352602B2 (en) * 2005-12-30 2008-04-01 Micron Technology, Inc. Configurable inputs and outputs for memory stacking system and method
JP2008140220A (ja) 2006-12-04 2008-06-19 Nec Corp 半導体装置
US8120958B2 (en) * 2007-12-24 2012-02-21 Qimonda Ag Multi-die memory, apparatus and multi-die memory stack
US7701251B1 (en) 2008-03-06 2010-04-20 Xilinx, Inc. Methods and apparatus for implementing a stacked memory programmable integrated circuit system in package
US7944726B2 (en) 2008-09-30 2011-05-17 Intel Corporation Low power termination for memory modules
US20100174858A1 (en) 2009-01-05 2010-07-08 Taiwan Semiconductor Manufacturing Co., Ltd. Extra high bandwidth memory die stack
US8683164B2 (en) * 2009-02-04 2014-03-25 Micron Technology, Inc. Stacked-die memory systems and methods for training stacked-die memory systems
US8713248B2 (en) * 2009-06-02 2014-04-29 Nokia Corporation Memory device and method for dynamic random access memory having serial interface and integral instruction buffer
US8296526B2 (en) * 2009-06-17 2012-10-23 Mediatek, Inc. Shared memory having multiple access configurations
US8604593B2 (en) * 2009-10-19 2013-12-10 Mosaid Technologies Incorporated Reconfiguring through silicon vias in stacked multi-die packages
US8472279B2 (en) * 2010-08-31 2013-06-25 Micron Technology, Inc. Channel skewing
US20120137090A1 (en) * 2010-11-29 2012-05-31 Sukalpa Biswas Programmable Interleave Select in Memory Controller
US8400808B2 (en) * 2010-12-16 2013-03-19 Micron Technology, Inc. Phase interpolators and push-pull buffers
JP2013058277A (ja) * 2011-09-07 2013-03-28 Renesas Electronics Corp 半導体装置
US20130159587A1 (en) * 2011-12-15 2013-06-20 Aaron Nygren Interconnect Redundancy for Multi-Interconnect Device

Similar Documents

Publication Publication Date Title
JP2015525398A5 (enExample)
JP2019067417A (ja) 最終レベルキャッシュシステム及び対応する方法
US20110060856A1 (en) Spi control device and method for accessing spi slave devices using the same
CN106575517A (zh) 用于基于存储器数据确定比较信息的装置、系统和方法
WO2016093977A1 (en) Apparatus and method for reducing latency between host and a storage device
TW201102827A (en) Memory system controller
CN107408019B (zh) 用于提高对非易失性存储器中的缺陷的抗干扰性的方法和装置
TW201629774A (zh) 使用資料壓縮的快取技術
CN105138470A (zh) 一种多通道nand flash控制器
CN204203855U (zh) 一种新型外置式sas 12g raid存储卡
CN104681077A (zh) 一种mram-nand控制器及贴片式固态硬盘
CN108733580A (zh) 读取命令排程方法
TW201250695A (en) Memory erasing method, memory controller and memory storage apparatus
CN102929813A (zh) 一种pci-e接口固态硬盘控制器的设计方法
US20180239557A1 (en) Nonvolatile memory device, data storage device including the same, and operating method of data storage device
US20140317339A1 (en) Data access system, data accessing device, and data accessing controller
CN102760109B (zh) 数据的通信方法、装置及系统
CN104616688A (zh) 一种集成mram的固态硬盘控制芯片及固态硬盘
KR20210087864A (ko) 판독-수정-기록 동작들의 감소된 레이턴시를 위한 시스템 및 방법
CN102955756A (zh) 多端口存储元件和包括其的半导体设备及系统
TW200634753A (en) Optical storage system comprising interface for transferring data
CN112748859A (zh) Mram-nand控制器及其数据写入方法
JP2013527541A5 (enExample)
JP2008262565A5 (enExample)
CN204203856U (zh) 一种新型内置式sas 12g raid存储卡