JP2015153777A - 半導体装置、スイッチング電源用制御icおよびスイッチング電源装置 - Google Patents
半導体装置、スイッチング電源用制御icおよびスイッチング電源装置 Download PDFInfo
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Abstract
【解決手段】起動素子のドレイン領域101の内部には、p型領域110、コレクタ領域111およびエミッタ領域112からなるnpn型素子83が設けられている。第1層間絶縁膜107の上には、npn型素子83のコレクタ電極配線121、npn型素子83のエミッタ電極配線と起動素子のドレイン電極配線とを兼ねるエミッタ・ドレイン電極配線122、起動素子のソース電極配線123、および起動素子のゲート電極配線124が設けられている。コレクタ電極配線121には、起動素子の入力端子とnpn型素子83の入力端子とを兼ねる第1金属配線131が接続されている。npn型素子83は、第1金属配線131に印加された入力電圧の低下を検出するための入力電圧検出手段として機能する。
【選択図】図3
Description
実施の形態1にかかる半導体装置の構成について説明する。図1,2は、この発明の実施の形態1にかかる半導体装置の要部を示す平面図である。また、図3は、図1,2に示す半導体装置を切断線X1−X1’で切断した断面図である。図4は、図1,2に示す半導体装置を切断線X2−X2’で切断した断面図である。図1には、半導体基板内部の不純物拡散領域および半導体基板上のポリシリコン層までの下層構造を示している。図2は、図1に続き半導体基板上の層間絶縁膜、コンタクトおよび金属配線などの上層構造を示している。この半導体装置は、スイッチング電源用制御IC(以下、制御ICとする)に内蔵される起動回路の起動素子を構成する。ここでは、JFETを備えた起動素子を例に説明する。
次に、実施の形態2にかかる半導体装置の構成について説明する。図8は、この発明の実施の形態2にかかる半導体装置を示す断面図である。図8に示すように、実施の形態2にかかる半導体装置は、起動素子65を構成する2個の高耐圧電界効果型トランジスタを、接合型のトランジスタ(実施の形態1のJFET81,82)に代えて、nチャネルの絶縁ゲート型のトランジスタ(NMOSFET)により構成したものである。以下、図8を参照しながら、実施の形態2にかかる半導体装置が実施の形態1にかかる半導体装置と異なる点についてのみ、説明する。
次に、本発明にかかるnpn型素子を備えた起動素子の電圧−電流特性について説明する。図9は、本発明にかかる半導体装置の電圧−電流特性を示す特性図である。上述した実施の形態1にかかる半導体装置(以下、実施例とする)の電圧−電流特性(ドレイン電圧とドレイン電流との関係)を検証した結果を図9に実線で示す。具体的には、実施例(起動素子)に備えられているnpn型素子83の入力電圧検出手段としての機能を検証した。図9には、入力電圧検出手段を備えていない起動素子単体(以下、比較例とする)の電圧−電流特性を一点鎖線で示し、入力電圧検出手段として抵抗分圧回路を備えた上記特許文献1の起動素子(以下、従来例とする)の電圧−電流特性を二点鎖線で示す。
41 起動回路
68 NMOSトランジスタ
81 第1のJFET
82 第2のJFET
83 npn型素子
100 p型基板
101 ドレイン領域
102 ドリフト領域
103 ゲート領域
104,144 ソース領域
105 ゲートポリシリコン電極
106 LOCOS酸化膜
107 第1層間絶縁膜
108 第2層間絶縁膜
110 p型領域
111 コレクタ領域
112 エミッタ領域
113,115 n+型高濃度領域
122 エミッタ・ドレイン電極配線
123,151 ソース電極配線
124 ゲート電極配線
125 コレクタコンタクト部
126a エミッタコンタクト部
126b ドレインコンタクト部
127,152 ソースコンタクト部
128a ゲートコンタクト部
128b ポリシリコンコンタクト部
131 第1金属配線
132 第2金属配線
133,153 第3金属配線
134,135,136,154 ビア
143 p型ベース領域
145 ゲート絶縁膜
Claims (6)
- 第1導電型の半導体基板の表面層に設けられた第2導電型のドリフト領域、および、前記ドリフト領域に接して前記半導体基板の表面層に設けられた第2導電型のドレイン領域を有する電界効果型トランジスタと、
前記ドレイン領域の内部に選択的に設けられた第1導電型半導体領域と、
前記第1導電型半導体領域の内部に選択的に設けられた第1の第2導電型半導体領域と、
前記第1の第2導電型半導体領域と離れて、前記第1導電型半導体領域の内部に選択的に設けられた第2の第2導電型半導体領域と、
前記第1の第2導電型半導体領域に接続され、外部から入力電圧が入力される第1電極配線と、
前記ドレイン領域および前記第2の第2導電型半導体領域に接続された第2電極配線と、
を備えることを特徴とする半導体装置。 - 前記電界効果型トランジスタは、
前記ドリフト領域に接して前記半導体基板の表面層に選択的に設けられた第1導電型のチャネル領域と、
前記チャネル領域に接して前記半導体基板の表面層に設けられ、前記ドリフト領域を挟んで前記ドレイン領域に対向する第2導電型のソース領域と、
前記チャネル領域に接続された制御電極と、
前記ソース領域に接続された第3電極配線と、
前記チャネル領域および前記制御電極に接続された第4電極配線と、
を備えることを特徴とする請求項1に記載の半導体装置。 - 前記電界効果型トランジスタは、
前記ドリフト領域に接して前記半導体基板の表面層に選択的に設けられ、前記ドリフト領域を挟んで前記ドレイン領域に対向する第1導電型のチャネル領域と、
前記チャネル領域の内部に選択的に設けられた第2導電型のソース領域と、
前記チャネル領域の、前記ドリフト領域と前記ソース領域とに挟まれた部分の表面上に絶縁膜を介して設けられた制御電極と、
前記チャネル領域および前記ソース領域に接続された第3電極配線と、
を備えることを特徴とする請求項1に記載の半導体装置。 - 請求項1〜3のいずれか一つに記載の半導体装置を含む起動回路を備えることを特徴とするスイッチング電源用制御IC。
- ドレイン端子に外部から1次側電圧が印加され、ゲート端子が接地され、ソース端子からスイッチ用トランジスタを制御するための信号を出力する電界効果型トランジスタと、
前記電界効果型トランジスタと同一半導体基板内で、かつ前記電界効果型トランジスタのドレイン領域内に集積され、前記電界効果型トランジスタのドレイン端子に印加される1次側電圧が所定電圧以上のときに導通して前記電界効果型トランジスタを動作させるバイポーラトランジスタと、
を含む起動回路、を備えることを特徴とするスイッチング電源用制御IC。 - 請求項4または5に記載のスイッチング電源用制御ICを有することを特徴とするスイッチング電源装置。
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US14/591,362 US10083953B2 (en) | 2014-02-10 | 2015-01-07 | Semiconductor device, control IC for switching power supply, and switching power supply unit |
CN201510012979.9A CN104835820B (zh) | 2014-02-10 | 2015-01-09 | 半导体装置、开关电源用控制ic以及开关电源装置 |
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JP6680102B2 (ja) * | 2016-06-16 | 2020-04-15 | 富士電機株式会社 | 半導体集積回路装置 |
JP7009854B2 (ja) * | 2017-09-11 | 2022-01-26 | 富士電機株式会社 | 起動素子、スイッチング電源回路の制御ic及びスイッチング電源回路 |
CN111063723B (zh) * | 2019-11-25 | 2021-12-28 | 深圳深爱半导体股份有限公司 | 开关集成控制器 |
CN111537773A (zh) * | 2020-06-05 | 2020-08-14 | 北京交通大学 | 电压检测电路及控制器和电子设备 |
CN112689366B (zh) * | 2020-11-03 | 2021-09-07 | 北京显芯科技有限公司 | Led驱动系统及电子设备 |
US11689097B2 (en) | 2021-05-05 | 2023-06-27 | Analog Devices, Inc. | High-voltage to low-voltage interface in power converter circuit |
CN113823678A (zh) * | 2021-09-03 | 2021-12-21 | 无锡市晶源微电子有限公司 | 一种高压npn器件 |
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JPH01125856A (ja) * | 1987-11-11 | 1989-05-18 | Hitachi Ltd | 半導体装置 |
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US20150228641A1 (en) | 2015-08-13 |
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