JP2015046423A - Wiring connection structure, and dielectric thin-film capacitor having this wiring connection structure - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a wiring connection structure capable of preventing interdiffusion between both wiring electrodes with certainty, in a case where a wiring electrode formed of Au and a wiring electrode formed of a metal different from Au are connected with each other.SOLUTION: A wiring connection structure comprises: a first wiring layer 16 consisting of an Au electrode provided on one principal surface of a semiconductor substrate 2; a second wiring layer 20 consisting of a conductive diffusion prevention film 20a formed on the first wiring layer 16; a second organic insulating layer 17 having an opening part 18a where a lower opening 18a1 is arranged on the second wiring layer 20, and covering the one principal surface of the semiconductor substrate 2, the first wiring layer 16, and the second wiring layer 20; and a third wiring layer 19 laminated on the second organic insulating layer 17, and consisting of a wiring electrode film 19a formed of any one of Cu, Al and Ag. The third wiring layer 19 is connected with a second wiring layer 20 exposed to the opening part 18a of the second organic insulating layer 17.

Description

  The present invention relates to a connection structure between electrodes formed of dissimilar metals and a dielectric thin film capacitor having the connection structure, and more specifically, interdiffusion between an Au electrode and an electrode formed of any one of Cu, Al, and Ag. The present invention relates to a wiring connection structure for preventing the above-described problem.

  Metals such as Au, Cu, Al, and Ag are generally used for various wiring electrodes formed on an electronic component or a module on which the electronic component is mounted. The module is selected in consideration of the cost and required characteristics of the module. Therefore, some wiring electrodes formed in electronic parts and modules are made of different metals, and wiring electrodes made of different metals are directly connected in electronic parts and modules. There is.

  However, for example, when a wiring electrode formed of Al and a wiring electrode formed of Au are directly connected to each other, Al and Au are mutually diffused to produce an alloy of Al and Au. This is not preferable because the electrical resistance at the connection interface increases and the connection strength decreases. Further, when the wiring electrode is formed of a thin film, the wiring electrode may disappear. Similarly, when a wiring electrode is formed of Cu or Ag instead of Al, an alloy with Au is generated.

  Therefore, conventionally, as shown in FIG. 7, a wiring connection structure has been proposed that can prevent mutual diffusion between wiring electrodes formed of dissimilar metals (see Patent Document 1). According to this wiring connection structure, an Al electrode 101 as a wiring electrode is formed on one main surface of the semiconductor substrate 100 (Si), and a protective film 102 covering the one main surface of the semiconductor substrate 100 and the Al electrode 101 is formed. Is done. At this time, the protective film 102 is provided with an opening 102a that exposes a part of the surface of the Al electrode 101. The inner wall of the opening 102a and the periphery of the opening on the surface side of the opening 102a are provided. A W-Ti diffusion preventing film 103 to be coated is formed. The Au electrode 104 is laminated on the diffusion prevention film 103 to form a connection structure between the wiring electrodes 101 and 104 formed of different metals. As described above, the interdiffusion between the Al electrode 101 and the Au electrode 104 can be prevented by interposing the W—Ti diffusion preventing film 103 between the Al electrode 101 and the Au electrode 104. Further, it is possible to prevent an increase in resistance value, a decrease in connection strength, and an electrode disappearance at the connection interface between the electrodes 101 and 104 due to mutual diffusion between the electrodes 101 and 104.

JP 2012-87335 A (refer to paragraphs 0004 and 0005, FIG. 2, etc.)

  However, in the conventional wiring connection structure, the W-Ti-based diffusion prevention film 103 is thinly formed along the inner wall of the opening 102a of the protective film 102, and a bent portion is formed in the diffusion prevention film 103 in the opening 102a. 103a is formed. In this case, for example, if the linear expansion coefficient of the protective film 102 is different from the linear expansion coefficients of the Al electrode 101, the Au electrode 104, and the diffusion prevention film 103, the diffusion prevention film 103 in the opening 102 a is changed to a protective film 102 when the temperature changes. The diffusion preventing film 103 may be broken at the bent portion 103a. Then, the Al electrode 101 and the Au electrode 104 come into contact with each other at the breakage point of the diffusion prevention film 103, and the mutual diffusion of the electrodes 101 and 104 proceeds from the breakage point. The problem of an increase in value, a decrease in connection strength, and electrode loss occurs.

  The present invention has been made in view of the above-described problems. When a wiring electrode formed of Au and a wiring electrode formed of a metal different from Au are connected, mutual diffusion between both wiring electrodes is achieved. It is an object of the present invention to provide a wiring connection structure capable of reliably preventing the above.

  In order to achieve the above object, a wiring connection structure according to the present invention includes a first wiring layer provided on one main surface of a semiconductor substrate, and a conductive diffusion prevention layer formed on the first wiring layer. A second wiring layer having a film; and a via hole in which one opening is disposed on the second wiring layer; one main surface of the semiconductor substrate; the first wiring layer; and the second wiring layer A resin layer covering the wiring layer; and a third wiring layer having a wiring electrode film laminated on the resin layer, wherein the first wiring layer includes a first metal made of Au, and Cu, Al And the wiring electrode film of the third wiring layer is formed of the other of the first metal and the second metal, and is formed of the second metal of any one of Ag and Ag. The third wiring layer is connected to the second wiring layer looking into the via hole. We are a symptom.

  In this case, a second wiring layer having a conductive diffusion prevention film is formed on the first wiring layer, and one opening of the via hole provided in the resin layer is disposed on the second wiring layer. The That is, the second wiring layer for preventing mutual diffusion between the first wiring layer and the third wiring layer is formed on the first wiring layer, so that the conventional wiring connection structure can be obtained. Like the diffusion prevention film, the second wiring layer is formed in a flat plate shape without forming a bent portion formed by being thinly formed along the inner wall of the via hole. As described above, the second wiring layer has a structure without a bent portion, so that when the second wiring layer receives stress from the resin layer at the time of temperature change due to a difference in linear expansion coefficient, the resin layer absorbs moisture. Even when the second wiring layer receives stress from the resin layer due to expansion due to the above, it is possible to prevent the second wiring layer from being broken.

  In addition, the second wiring that the third wiring layer formed of the other of the first metal made of Au and the second metal made of any one of Cu, Al, and Ag looks into the via hole of the resin layer. By being connected to the layer, the third wiring layer is connected to the first wiring layer having the wiring electrode film formed on one of the first metal and the second metal via the second wiring layer. The Therefore, when the second wiring layer breaks, interdiffusion proceeds between the first wiring layer and the third wiring layer that are in contact with each other at the broken portion, and the electrical resistance of the connection portion increases, the connection strength decreases, In addition, the wiring electrode layer may be lost. However, according to this configuration, since the second wiring layer can be prevented from being broken, the diffusion preventing film included in the second wiring layer prevents the mutual connection between the first wiring layer and the third wiring layer. Diffusion can be reliably prevented.

  Further, the diffusion prevention film of the second wiring layer may be formed of any one of Ti, Cr, and Ni—Cr alloy. Each of Ti, Cr, and Ni—Cr alloys has a mutual relationship between the Au electrode that forms the first wiring layer and the wiring electrode film of the third wiring layer that is formed of any one of Cu, Al, and Ag. Since it has a function of preventing diffusion and alloy formation, it is suitable as a material for forming a diffusion prevention film for preventing mutual diffusion between the first wiring layer and the third wiring layer.

  The third wiring layer may be formed in a multilayer structure including the wiring electrode film and an adhesion film formed of any one of Ti, Cr, and Ni—Cr alloy. Since all of Au, Cu, Al, and Ag have low adhesion to the resin layer, if the third wiring layer is composed of only a wiring electrode film formed of Au, Cu, Al, or Ag, the first 3 may be peeled off from the resin layer. Therefore, for example, in the third wiring layer, a part in contact with the resin layer is formed of any one of Ti, Cr, and Ni—Cr alloy having excellent adhesion to the resin layer, and the adhesion film is laminated. By using a multilayer structure composed of the formed wiring electrode film, it is possible to prevent the third wiring layer from being peeled off from the resin layer.

  Further, the above-described wiring connection structure may be used for a dielectric thin film capacitor. In this case, mutual diffusion between the first wiring layer and the third wiring layer is ensured by preventing breakage of the second wiring layer interposed between the first wiring layer and the third wiring layer. Therefore, a dielectric thin film capacitor having a low equivalent series resistance (ESR) is provided without causing an increase in parasitic resistance due to mutual diffusion between the first wiring layer and the third wiring layer. can do.

  According to the wiring connection structure of the present invention, the second wiring layer having the conductive diffusion prevention film is formed on the first wiring layer, and one opening of the via hole provided in the resin layer is the second opening. Is disposed on the wiring layer. That is, the second wiring layer for preventing mutual diffusion between the first wiring layer and the third wiring layer is formed on the first wiring layer, so that the conventional wiring connection structure can be obtained. Like the diffusion prevention film, the second wiring layer is formed in a flat plate shape without forming a bent portion formed by being thinly formed along the inner wall of the via hole. Thus, even if the second wiring layer is subjected to stress from the resin layer at the time of temperature change due to the difference in linear expansion coefficient, by having a structure in which the bent portion is not formed in the second wiring layer, It is possible to prevent the second wiring layer from being broken.

  Further, the third wiring layer is connected to the second wiring layer through the via hole of the resin layer, so that the third wiring layer is connected to the first wiring layer through the second wiring layer. Therefore, when the second wiring layer breaks, interdiffusion proceeds between the first wiring layer and the third wiring layer that are in contact with each other at the broken portion, thereby increasing the electrical resistance of the connecting portion and the connection strength. There is a possibility that the lowering of the wiring electrode layer and disappearance of the wiring electrode layer may occur. However, according to this configuration, since the second wiring layer can be prevented from being broken, the diffusion preventing film included in the second wiring layer prevents the mutual connection between the first wiring layer and the third wiring layer. Diffusion can be reliably prevented.

It is a schematic sectional drawing of the dielectric thin film capacitor which has the wiring connection structure concerning 1st Embodiment of this invention. It is a figure for demonstrating the wiring connection structure of FIG. It is a figure for demonstrating the manufacturing method of the wiring connection structure of FIG. It is a figure for demonstrating the manufacturing method of the wiring connection structure of FIG. It is a figure for demonstrating the wiring connection structure concerning 2nd Embodiment of this invention. It is a figure for demonstrating the wiring connection structure concerning 3rd Embodiment of this invention. It is sectional drawing for demonstrating the conventional wiring connection structure.

<First Embodiment>
A dielectric thin film capacitor 1 which is an example of an electronic component having a wiring connection structure according to a first embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a schematic sectional view of a dielectric thin film capacitor having the wiring connection structure according to the first embodiment, and FIG. 2 is an enlarged view of a region A in FIG.

  The dielectric thin film capacitor 1 having the wiring connection structure according to this embodiment is mounted on a photodiode. Below, the outline of the manufacturing method of this dielectric thin film capacitor 1 is demonstrated with reference to FIG.

First, a low-resistance P-type semiconductor substrate 2 is prepared, and a diffusion prevention layer 3 made of SiO ₂ is formed on one main surface of the semiconductor substrate 2 by a thermal oxidation method. The thickness of the diffusion preventing layer 3 is 700 nm, for example.

Next, an adhesion layer 4 made of barium strontium titanate ((Br, Sr) TiO ₃ ; hereinafter referred to as “BST”), a lower electrode layer 5 made of Pt, and a dielectric layer 6 made of BST are formed on the diffusion preventing layer 3. An intermediate electrode layer 7 made of Pt, a dielectric layer 8 made of BST, an upper electrode layer 9 made of Pt, and a protective layer 10 made of BST are formed in this order. The number of layers is not limited to this, and the intermediate layer 7 and the dielectric layer 8 may be omitted to reduce the number of layers. Conversely, the intermediate layer 7 and the dielectric layer 8 may be further added to form a layer. You may increase the number.

  The adhesion layer 4 is formed, for example, by spin-coating a MOD (Metal Organic Decomposition) material having a molar ratio of Ba: Sr: Ti = 7: 3: 10 on the diffusion prevention layer 3 and drying it. It is formed by performing a high temperature heating treatment at 650 ° C. for 30 minutes in an oxygen atmosphere. The thickness of the adhesion layer 4 is 50 nm, for example.

  The lower electrode layer 5 is formed, for example, by depositing Pt by sputtering. The thickness of the lower electrode layer 5 is, for example, 200 nm.

  The dielectric layer 6 is, for example, spin-coated with a MOD raw material having a molar ratio of Ba: Sr: Ti = 7: 3: 10, dried, and then heated at 650 ° C. for 10 minutes in an oxygen atmosphere at high temperature. It is formed by performing. The thickness of the dielectric layer 6 is, for example, 100 nm.

  The intermediate electrode layer 7 is formed to the same thickness by the same formation method as the lower electrode layer 5.

  The dielectric layer 8 is formed to the same thickness by the same formation method as the dielectric layer 6.

  The upper electrode layer 9 is formed to the same thickness by the same formation method as the lower electrode layer 5 and the intermediate electrode layer 7.

  For example, the protective layer 10 is spin-coated with a MOD raw material having a molar ratio of Ba: Sr: Ti = 7: 3: 10, dried, and then subjected to high temperature heating treatment at 650 ° C. for 60 minutes in an oxygen atmosphere. Form by doing. The thickness of the protective layer 10 is 100 nm, for example.

  Next, the protective layer 10 and the upper electrode layer 9 are processed using a photolithography process and an ion milling method. Subsequently, the dielectric layer 8 and the intermediate electrode layer 7 are processed using the photolithography process and the ion milling method. Subsequently, the dielectric layer 6, the lower electrode layer 5, and the adhesion layer 4 are processed using the same photolithography process and ion milling method. As a result, the capacitor portion 11 is formed on the diffusion prevention layer 3 formed on the semiconductor substrate 2.

  Subsequently, heat treatment is performed in an oxygen atmosphere at 850 ° C. for 30 minutes in order to improve the crystallinity of the dielectric layers 6 and 8 made of BST of the capacitor unit 11 and improve the dielectric constant.

Next, an inorganic insulating layer 12 made of SiO ₂ is formed on the diffusion prevention layer 3 of the semiconductor substrate 2 on which the capacitor portion 11 is formed. The inorganic insulating layer 12 functions as a protective layer and an insulating layer. The inorganic insulating layer 12 is formed by sputtering, for example, and the thickness thereof is 1000 nm.

  Subsequently, photosensitive PBO (positive benzoxazole) is applied, exposed and developed on the inorganic insulating layer 12, and cured at 320 ° C. in a nitrogen atmosphere, for example, to form a first organic insulating film having a desired pattern shape. Layer 13 is formed. The thickness of the first organic insulating layer 13 is, for example, 6000 nm.

  Next, the inorganic insulating layer 12 and the diffusion prevention layer 3 are processed using the RIE (reactive ion etching) method using the first organic insulating layer 13 formed in the above-described desired pattern shape as a mask, An opening 14a reaching the semiconductor substrate 2 is formed. Further, the inorganic insulating layer 12 and the dielectric layer 6 in the capacitor portion 11 are processed to form an opening 14 b reaching the lower electrode layer 5. Further, the inorganic insulating layer 12 and the protective layer 10 in the capacitor portion 11 are processed to form an opening 14 c reaching the upper electrode layer 9.

  Next, a first lead electrode layer 15 made of a Cu / Ti layer is formed on the inorganic insulating layer 12 and the first organic insulating layer 13. The first lead electrode layer 15 is also formed in the opening 14 b formed through the first organic insulating layer 13, the inorganic insulating layer 12, and the dielectric layer 6, and the lower electrode layer 5 of the capacitor unit 11. Connected. Another first lead electrode layer 15 is also formed in the opening 14 c formed through the first organic insulating layer 13, the inorganic insulating layer 12, and the protective layer 10. It is connected to the electrode layer 9. Specifically, the first extraction electrode layer 15 is formed in a desired pattern shape by, for example, forming a laminated structure of a 100 nm Ti layer and a 1000 nm Cu layer by a sputtering apparatus and performing a photolithography process and wet etching. . In FIG. 1, the lower Ti layer and the upper Cu layer are shown as a single layer for easy viewing.

  Next, the first wiring layer 16 made of 300 nm Au is formed on the bottom surface of the opening 14a using a lift-off method.

  Next, photosensitive PBO is applied, exposed and developed on the first lead electrode layer 15 and the first organic insulating layer 13, and the second organic insulating layer 17 (in the present invention) having a desired pattern shape is formed. Equivalent to a “resin layer”). The second organic insulating layer 17 includes an opening 18a that penetrates through the second organic insulating layer 17 and reaches the first wiring layer 16, and an opening 18b that reaches the first lead electrode layer 15. Similarly, an opening 18c reaching the first lead electrode layer 15 is formed. The thickness of the second organic insulating layer 17 is, for example, 6000 nm.

  Next, a third wiring layer 19 made of Cu is formed on the second organic resin layer 17. The third wiring layer 19 is also formed in openings 18 b and 18 c formed through the second organic insulating layer 17, and is connected to the first lead electrode layer 15. The third wiring layer 19 is also formed in the opening 18a and connected to the first wiring layer 16 via a second wiring layer 20 described later. Specifically, the third wiring layer 19 is formed in a desired pattern shape by, for example, forming a wiring electrode film 19a made of 1000 nm Cu with a sputtering apparatus and performing a photolithography process and wet etching. The connection structure of the first, second, and third wiring electrodes 16, 20, and 19, which is the wiring connection structure according to the first embodiment of the present invention, will be described in detail later, including its manufacturing method.

  Next, a resist is formed by a photolithography process, and an external electrode 21 having a two-layer structure of a lower layer Ni of 200 nm and an upper layer Au of 100 nm is formed on the wiring electrode film 19a of the third wiring layer 19 by plating. .

  Next, the third organic insulating layer 22 made of PBO is formed on the wiring electrode film 19a of the third wiring layer 19 and the second organic insulating layer 17 with the surface of the external electrode 21 exposed to the outside. Form. Specifically, a photosensitive PBO is applied onto the second organic insulating layer 17, exposed, developed, and cured at 320 ° C. in a nitrogen atmosphere, for example, and a third organic insulating layer having a desired pattern shape is formed. 22 is formed.

  Finally, the back surface electrode 23 is formed on the other main surface of the semiconductor substrate 2 to manufacture the dielectric thin film capacitor 1. The back electrode 23 is made of, for example, a 300 nm Au layer formed by vapor deposition.

(Wiring connection structure)
Next, a connection wiring structure between the first wiring layer 16 and the third wiring layer 19 shown in the region A of FIG. 1 will be described with reference to FIGS.

  In this embodiment, as described above, the first wiring layer 16 is made of Au (corresponding to the “first metal” of the present invention), and the wiring electrode film 19a of the third wiring layer 19 is made of Cu. Is formed. By the way, since Au and Cu have a high mutual diffusion coefficient, when the first wiring layer 16 and the third wiring layer 19 are directly connected, Au and Cu are mutually diffused at the connection interface between Au and Cu. An alloy is generated, and this alloy increases the electrical resistance at the connection interface or decreases the connection strength. In addition, the dielectric thin film capacitor 1 is not preferable because the formation of this alloy increases the ESR and makes it difficult to obtain a desired capacitance. Therefore, in this embodiment, with respect to the wiring connection structure between the first wiring layer 16 and the third wiring layer 19, the mutual diffusion of both the wiring layers 16 and 19 is prevented, so that the dielectric thin film capacitor 1 The ESR characteristic and the capacity characteristic can be designed with high accuracy.

  As shown in FIG. 2, this wiring connection structure is a conductive substrate-side adhesion formed by one of Ti, Cr, and Ni—Cr alloy (Ti in this embodiment) on one main surface of the semiconductor substrate 2. Layer 24, first wiring layer 16 formed on substrate-side adhesion layer 24, second wiring layer 20 formed on first wiring layer 16, and second wiring layer 20. It has an opening 18a (corresponding to the “via hole” in the present invention) in which one opening is disposed, and covers one main surface of the semiconductor substrate 2, the first wiring layer 16 and the second wiring layer 20. A second organic insulating layer 17 and a third wiring layer 19 stacked on the second organic insulating layer 17, and the first wiring layer 16 is connected to the third wiring layer 20 via the second wiring layer 20. The structure is connected to the wiring layer 19.

  Specifically, the substrate-side adhesion layer 24 formed on one main surface of the semiconductor substrate 2 functions as a layer that improves the adhesion strength between the semiconductor substrate 2 and the first wiring layer 16.

  The second wiring layer 20 formed on the first wiring layer 16 is a conductive diffusion barrier film 20a formed of any one of Ti, Cr, and Ni—Cr alloy (Ti in this embodiment). In this embodiment, the diffusion prevention film 20a does not protrude from the first wiring layer 16 and is formed within a range that fits in the first wiring layer 16 in plan view. At this time, since the diffusion preventing film 20a of the second wiring layer 20 is formed on the first wiring layer 16 to have a flat plate shape, the diffusion preventing film 103 of the conventional wiring connection structure shown in FIG. Such a bent portion 103a is not formed. The diffusion preventing film 20 a functions as a film that prevents mutual diffusion between the first wiring layer 16 and the third wiring layer 19. In addition, the wiring electrode film 19a of the third wiring layer 19 may be formed of Al or Ag (Cu, Al, Ag is equivalent to the “second metal” of the present invention). Reference numeral 20a functions as a film for preventing mutual diffusion between Au of the first wiring layer 16 and Al or Ag. Note that the diffusion prevention film 20a is not necessarily formed within a range that can be accommodated in the first wiring layer 16 in a plan view, and the semiconductor substrate is formed so as to cover the first wiring layer 16 and the substrate-side adhesion layer 24. It may be formed across two.

  Further, in the opening 18a formed in the second organic insulating layer 17 in this embodiment, the lower opening 18a1, which is one of the openings, is disposed on the diffusion preventing film 20a. That is, the lower opening 18a1 of the opening 18a is formed within a range in which the outline can be accommodated in the diffusion prevention film 20a in plan view. The upper opening 18a2, which is the other opening of the opening 18a, has a diameter larger than that of the lower opening 18a1, and the opening 18a of the second organic insulating layer 17 faces downward in the drawing. A part of the diffusion prevention film 20a is exposed through the opening 18a. The diameter of the lower opening 18a1 of the opening 18a can be changed as appropriate as long as it is within a range that can be accommodated in the diffusion prevention film 20a in a plan view.

  The wiring electrode film 19 a of the third wiring layer 19 is connected to the diffusion preventing film 20 a that looks into the opening 18 a of the second organic insulating layer 17. At this time, as shown in FIG. 2, the wiring electrode film 19a in the opening 18a is bent and formed along the inner wall of the opening 18a and the diffusion prevention film 20a exposed from the opening 18a. Then, the upper surface of the wiring electrode film 19 a is covered with the third organic insulating layer 22.

  In the wiring connection structure configured as described above, the diffusion prevention film 20a is formed in a flat plate shape having no bent portion 103a like the diffusion prevention film 103 of the conventional structure. Even if the diffusion prevention film 20a is sometimes subjected to stress from the second organic insulating layer 17, the diffusion prevention film 20a breaks (for example, breaks at the bent portion 103a of the diffusion prevention film 103 in FIG. 7). Can be prevented.

(Method for manufacturing wiring connection structure)
Next, a method for manufacturing the above-described wiring connection structure will be described with reference to FIGS. 3 and 4 are diagrams for explaining the method of manufacturing the wiring connection structure. FIGS. 3A to 3F show the respective steps, and FIGS. 4A and 4B show the respective steps. Each process following FIG.3 (f) is shown.

  First, as shown in FIG. 3A, a low-resistance semiconductor substrate 2 containing Si as a main component is prepared, and a predetermined region (the substrate-side adhesion layer 24 and the first first surface of the semiconductor substrate 2 is formed). A lift-off resist pattern 25a opened so as to expose the formation region of the wiring layer 16 is formed using a photolithography technique or the like.

  Next, as shown in FIG. 3B, a Ti electrode is formed on the upper side of the lift-off resist pattern 25a by a vacuum deposition method, and then an Au electrode is formed on the Ti electrode by the same vacuum deposition method. To do.

  Next, as shown in FIG. 3C, by removing the lift-off resist pattern 25a, the substrate-side adhesion layer 24 made of a Ti electrode and the first wiring layer 16 made of an Au electrode are formed by lift-off. .

  Next, as shown in FIG. 3 (d), a lift-off resist pattern 25b is applied by a photolithographic technique or the like so as to cover one main surface of the semiconductor substrate 2, the substrate-side adhesion layer 24, and the first wiring layer 16. Use to form. At this time, the opening 25b1 is formed in the lift-off resist pattern 25b within a range that fits on the upper surface of the first wiring layer 16 (opposite the surface facing the substrate-side adhesion layer 24) in plan view (top view). . When the second wiring layer 20 is formed beyond the upper surface range of the first wiring layer 16, the diameter of the opening 25b1 is increased so that the entire upper surface of the first wiring layer 16 is exposed. It is good to form.

  Next, as shown in FIG. 3 (e), a Ti electrode is formed by vacuum evaporation in the same manner as in FIGS. 3 (b) and 3 (c), and the second wiring made of the Ti electrode is formed by lift-off. The diffusion preventing film 20a for the layer 20 is formed. At this time, the diffusion prevention film 20a is formed to a thickness of about 80 nm.

  Next, as shown in FIG. 3F, a second organic insulating layer 17 covering the semiconductor substrate 2, the substrate-side adhesion layer 24, the first wiring layer 16, and the diffusion preventing film 20a is formed. At this time, an opening 18a in which the lower opening 18a1, which is one of the openings, is disposed on the diffusion prevention film 20a is formed in the second organic insulating layer 17 by using a photolithography technique or the like. A PBO resin is used as a material for forming the second organic insulating layer 17. Moreover, the hardening process at the time of formation of the 2nd organic insulating layer 17 is performed in 320 degreeC and the environment for 30 minutes, for example.

  The opening 18a of the second organic insulating layer 17 formed in this way is formed so that the diameter of the upper opening 18a2 that is the other opening is larger than the diameter of the lower opening 18a1, so that It is formed in a tapered shape that tapers as it goes. Then, the diffusion preventing film 20a has the upper surface (the surface opposite to the surface facing the first wiring layer 16) of the periphery covered with the second organic insulating layer 17, and the remaining portion is the second organic layer. It is exposed from the insulating layer 17.

  Next, as shown in FIG. 4A, a Cu electrode is formed over the entire upper surface (including the inside of the opening 18a) of the second organic insulating layer 17 by sputtering, and a photolithography technique is used. Then, the wiring electrode film 19a forming the third wiring layer 19 is patterned. At this time, the film thickness of the Cu electrode is formed to about 1000 nm. By forming the wiring electrode film 19a in this manner, the third wiring layer 19 (wiring electrode film 19a) looks into the opening 18a of the second organic insulating layer 17 and the second wiring layer 20 (diffusion prevention film). 20a).

  Next, as shown in FIG. 4B, the third organic insulating layer 22 covering the wiring electrode film 19a is formed by using a photolithography technique or the like, and the third organic insulating layer 22 is formed in an environment of 320 ° C. for 30 minutes. The resin of the organic insulating layer 22 is cured to obtain the wiring connection structure of this embodiment. At this time, the same PBO resin as that of the second organic insulating layer 17 is used as a material for forming the third organic insulating layer 22.

  Therefore, according to the embodiment described above, the diffusion prevention film 20a of the conductive second wiring layer 20 is formed on the first wiring layer 16, and the opening provided in the second organic insulating layer 17 One lower opening 18a1 of 18a is disposed on the diffusion preventing film 20a. That is, the diffusion preventing film 20a for preventing mutual diffusion between the first wiring layer 16 and the wiring electrode film 19a of the third wiring layer 19 is formed before the second organic insulating layer 17 is formed. By being formed on one wiring layer 16, it is formed thinly along the inner wall of the via hole (opening 102a) as in the diffusion prevention film 103 of the conventional wiring connection structure shown in FIG. The resulting bent portion 103a is not formed, and the diffusion prevention film 20a is formed in a flat plate shape. Thus, by making the diffusion preventing film 20a of the second wiring layer 20 have no bent portion, the second wiring layer 20 changes to the second organic insulating layer 17 when the temperature changes due to the difference in linear expansion coefficient. Even when the second organic insulating layer 17 expands due to moisture absorption and the second wiring layer 20 receives stress from the second organic insulating layer 17, the second wiring It is possible to prevent the layer 20 from breaking.

  In addition, the wiring electrode film 19a of the third wiring layer 19 is connected to the diffusion preventing film 20a of the second wiring layer 20 looking into the opening 18a of the second organic insulating layer 17, whereby the wiring electrode film 19a is Since it is connected to the first wiring layer 16 via the diffusion preventing film 20a, when the diffusion preventing film 20a breaks, Au of the first wiring layer 16 and wiring electrode film of the third wiring layer 19 at the broken portion. Interdiffusion with Cu in 19a may proceed to increase the electrical resistance of the connection portion, decrease the connection strength, and cause the wiring electrode layer to disappear. However, according to the wiring connection structure according to this embodiment, the diffusion prevention film 20a can be prevented from being broken by forming the diffusion prevention film 20a in a flat plate shape without a bent portion. The mutual diffusion between the first wiring layer 16 and the wiring electrode film 19a of the third wiring layer 19 can be reliably prevented.

  Further, the diffusion preventing film 20a of the second wiring layer 20 is formed of any one of Ti, Cr, and Ni—Cr alloy, and these metals or alloys all form the first wiring layer 16. The first wiring has a function of preventing mutual diffusion and alloy formation between the Au electrode to be connected and the wiring electrode film 19a of the third wiring layer 19 formed of any one of Cu, Al, and Ag. It is suitable as a material used for a diffusion preventing film for preventing mutual diffusion between the layer 16 and the wiring electrode film 19a of the third wiring layer 19.

  Further, by using the wiring connection structure according to the present embodiment for the dielectric thin film capacitor 1, the Au of the first wiring layer 16 and the Cu (or Al, Ag) of the wiring electrode film 19a of the third wiring layer 19 are used. Therefore, an increase in parasitic resistance due to mutual diffusion between the first wiring layer 16 and the third wiring layer 19 does not occur, and equivalent series resistance (ESR) can be prevented. The dielectric thin film capacitor 1 with a small can be provided.

Second Embodiment
A wiring connection structure according to a second embodiment of the present invention will be described with reference to FIG. FIG. 5 is a diagram for explaining the wiring connection structure according to this embodiment, and corresponds to FIG. 2 referred to for explaining the wiring connection structure according to the first embodiment.

  The wiring connection structure according to this embodiment is different from the wiring connection structure of the first embodiment described with reference to FIGS. 1 and 2 in that the third wiring layer 19 is formed on the second organic insulating layer 17. The lower adhesion layer 19b laminated in (including the inside of the opening 18a), the wiring electrode film 19a laminated on the lower adhesion film 19b, and the upper adhesion film 19c laminated on the wiring electrode film 19a It is the point formed with the multilayer structure which consists of. Since other configurations are the same as those of the wiring connection structure of the first embodiment, the same reference numerals are used and description thereof is omitted. Each of the upper adhesion film 19c and the lower adhesion film 19b corresponds to the “adhesion film” in the present invention.

  In this case, each of the upper and lower adhesion films 19b and 19c is formed of Ti, Cr, or Ni—Cr alloy. By the way, in 1st Embodiment, although the wiring electrode film 19a of the 3rd wiring layer 19 is formed in the state which contacted the 2nd organic insulating layer 17 and the 3rd organic insulating layer 22, wiring electrode film Cu (or Al, Ag) that forms 19a has relatively low adhesion to the PBO resin that forms the second and third organic insulating layers 17 and 22, so that the internal stress generated when the temperature changes In some cases, peeling occurs at the contact interface between the PBO resin (second and third organic insulating layers 17 and 22) and the wiring electrode film 19a. On the other hand, all of Ti, Cr, and Ni—Cr alloy have better adhesion to the PBO resin that forms the second and third organic insulating layers 17 and 22 than the metal that forms the wiring electrode film 19a. Is expensive. Therefore, the lower adhesion film 19b is disposed on the portion of the third wiring layer 19 that contacts the second organic insulating layer 17, and the upper adhesion film 19c is disposed on the portion that contacts the third organic insulating layer 22. Thus, peeling at the contact interface between the third wiring layer 19 and the second or third organic insulating layers 17 and 22 can be prevented.

<Third Embodiment>
A wiring connection structure according to a third embodiment of the present invention will be described with reference to FIG. FIG. 6 is a diagram for explaining the wiring connection structure according to this embodiment, and corresponds to FIG. 2 referred to for explaining the wiring connection structure according to the first embodiment.

  The wiring connection structure according to this embodiment differs from the wiring connection structure of the first embodiment described with reference to FIGS. 1 and 2 in that the second wiring layer 20 is diffused as shown in FIG. The anti-reflection film 20a and the anti-oxidation film 20b stacked on the anti-diffusion film 20a are formed in a multilayer structure. Since other configurations are the same as those of the wiring connection structure of the first embodiment, the same reference numerals are used and description thereof is omitted.

  In this case, the antioxidant film 20b of the second wiring layer 20 is formed of Cu. By the way, the second wiring layer 20 of the first embodiment is formed with a single layer structure of only the diffusion prevention film 20a formed of any one of Ti, Cr, and Ni—Cr alloy. Any of the Ni—Cr alloys is easily oxidized as compared with Cu. Therefore, for example, the portion exposed from the opening 18a of the second organic insulating layer 17 in the diffusion preventing film 20a may be oxidized at the temperature at which the second organic insulating layer 17 is cured. May cause a parasitic resistance component in the oxidized portion of the diffusion prevention film 20a to affect the characteristics of the dielectric thin film capacitor 1.

  Therefore, the parasitic resistance component is generated by covering the diffusion prevention film 20a with the oxidation prevention film 20b made of Cu so that the diffusion prevention film 20a is not exposed from the opening 18a of the second organic insulating layer 17. Can be prevented.

  In this embodiment, care must be taken so that the second wiring layer 20 does not protrude from the first wiring layer 16 in plan view (top view). When the second wiring layer 20 is formed in a state of protruding from the first wiring layer 16, the first wiring layer is formed by a step between the upper surface of the first wiring layer 16 and one main surface of the semiconductor substrate 2. The second wiring layer 20 in the vicinity of the periphery of 16 is discontinuous, Cu in the anti-oxidation film 20b of the second wiring layer 20 and Au in the first wiring layer 16 come into contact with each other, This is because diffusion may occur.

  The present invention is not limited to the above-described embodiments, and various modifications other than those described above can be made without departing from the spirit thereof, for example, the above-described second embodiment. The wiring connection structure according to the third embodiment may be combined with the wiring connection structure according to the third embodiment. In this way, the adhesion between the third wiring layer 19 and the second and third organic insulating layers 17 and 22 is improved, and oxidation of the diffusion prevention film 20a of the second wiring layer 20 is prevented. The wiring connection structure which can be provided can be provided.

  Further, in each of the above-described embodiments, the case where the first wiring layer 16 is formed of Au and the wiring electrode film 19a of the third wiring layer 19 is formed of any one of Cu, Al, and Ag has been described. The relationship between the metal forming the first wiring layer 16 and the metal forming the wiring electrode film 19a of the third wiring layer 19 may be reversed. That is, the first wiring layer 16 may be formed of any one of Cu, Al, and Ag, and the wiring electrode film 19a of the third wiring layer 19 may be formed of Au. Also in this case, the same effect as each embodiment is acquired.

  Further, the present invention can be applied to various wiring connection structures for connecting an Au electrode and an electrode formed of any one of Cu, Al, and Ag.

DESCRIPTION OF SYMBOLS 1 Dielectric thin film capacitor 2 Semiconductor substrate 16 1st wiring layer 17 2nd organic insulating layer (resin layer)
18a Opening (via hole)
18a1 Lower opening (one opening)
19 Third wiring layer 19a Wiring electrode film 19b Lower adhesion film (adhesion film)
19c Upper adhesion film (adhesion film)
20 Second wiring layer 20a Diffusion prevention film

Claims (4)

A first wiring layer provided on one main surface of the semiconductor substrate;
A second wiring layer having a conductive diffusion barrier film formed on the first wiring layer;
A resin layer having a via hole in which one opening is disposed on the second wiring layer, and covering one main surface of the semiconductor substrate, the first wiring layer, and the second wiring layer;
A third wiring layer having a wiring electrode film laminated on the resin layer,
The first wiring layer is formed of one of a first metal made of Au and a second metal made of any one of Cu, Al and Ag, and the wiring electrode of the third wiring layer A film is formed of the other of the first metal and the second metal;
The wiring connection structure, wherein the third wiring layer is connected to the second wiring layer viewed through the via hole.   The wiring connection structure according to claim 1, wherein the diffusion prevention film of the second wiring layer is formed of any one of Ti, Cr, and Ni—Cr alloy.   The third wiring layer is formed of a multilayer structure having the wiring electrode film and an adhesion film formed of any one of Ti, Cr, and Ni-Cr alloy. The wiring connection structure according to 2.   A dielectric thin film capacitor having the wiring connection structure according to claim 1.

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