JP5098422B2 - Thin film electronic components - Google Patents

Description

  The present invention relates to an electronic component, and more particularly to a thin film electronic component having a structure including a thin film electrode layer, an insulating layer covering the thin film electrode layer, and an extraction electrode that is electrically connected to the thin film electrode layer through the insulating layer.

  One of electronic parts widely used in electronic equipment is a capacitor. As electronic equipment is miniaturized, for example, a thin film capacitor having a configuration as shown in FIG. 12 has been proposed (see Patent Document 1). .

  The thin film capacitor 60 is obtained by providing a capacitor structure 61 on a substrate 51 such as a silicon substrate. The capacitor structure 61 is formed in order from the substrate 51 side, for example, a lower thin film electrode layer 52 such as a Pt electrode. For example, a dielectric layer 53 such as a (BaSrY) TiO 3 layer and an upper thin film electrode layer 54 such as a Pt electrode are provided.

  The upper surface of the capacitor structure 61 is protected by an insulating layer 55 formed of an insulating resin such as an epoxy resin. Further, contact holes 56 and 66 are opened in the insulating layer 55, and the contact holes 56 and 66 are filled with a conductor metal, for example, copper (Cu). Electrode pads 56a and 66a functioning as lead electrodes are disposed on the uppermost surfaces of the contact holes 56 and 66, respectively.

  By the way, when such a structure is adopted, a thin thin film capacitor can be obtained, but the lower thin film electrode layer 52, the dielectric layer 53, the upper thin film electrode layer 54, the insulating layer 55, and the electrode pads 56a and 66a. The stress generated by the difference in the coefficient of thermal expansion of each of the layers is a specific portion of the lower thin film electrode layer 52 and the upper thin film electrode layer 54, specifically, the electrode pads 56a and 66a and the lower thin film electrode layer 52 and the upper thin film electrode. It is concentrated on the outer peripheral portion of the bonding portion of the layer 54 (that is, the lower end portion of the outer periphery of the electrode pads 56a and 66a) and the boundary portion A of the insulating layer 55 and its vicinity. This stress concentration may cause damage to the lower thin film electrode layer 52, the upper thin film electrode layer 54, the dielectric layer 53 positioned between the lower thin film electrode layer 52 and the upper thin film electrode layer 54, and moisture resistance. And there is a problem that the thermal shock resistance is lowered.

  In order to increase the resistance to this stress concentration, it is effective to increase the thickness of the thin film electrode layer. For example, in the case of the thin film capacitor as described above, a high temperature oxidizing atmosphere is used when forming the thin film dielectric layer. In general, a noble metal such as Pt is used as the electrode material so that it can withstand the temperature, and therefore, there is a problem that the material cost increases when the thickness of the thin film electrode layer is increased.

It is also conceivable to increase the thickness of the lower thin film electrode layer and the upper thin film electrode layer only at the connection with the extraction electrode, but in that case, stress concentration is applied to the thickened portion, that is, the portion where the structure has changed. The problem is that it does not solve the fundamental problem.
JP 2004-281446 A

  The present invention solves the above-described problems, and can suppress the concentration of stress at the connection portion between the extraction electrode and the thin film electrode layer and the vicinity thereof, and the thin film electrode layer is less likely to be damaged and is reliable. An object of the present invention is to provide a thin film electronic component having high performance.

In order to solve the above problems, a first thin-film electronic component of the present invention includes a thin-film electrode layer and a through-hole disposed on the thin-film electrode layer and reaching the thin-film electrode layer at a predetermined position. An insulating layer, and a buffer layer made of a conductive material, disposed at an exposed portion of the thin film electrode layer that forms the bottom of the through-hole, and has a tapered shape with an inclined outer peripheral surface and an expanded hem; and the insulation An extraction electrode that reaches from the upper surface of the layer to the buffer layer through the inner peripheral surface of the through hole and is electrically connected to the thin film electrode layer through the buffer layer, and the outer peripheral surface of the buffer layer And the bottom surface has an angle of 30 ° or less, and the buffer layer has a thickness of 200 nm or less .

The second thin film electronic component of the present invention includes a lower thin film electrode layer, a thin film dielectric layer formed on the lower thin film electrode layer, an upper thin film electrode layer formed on the thin film dielectric layer, A first through-hole that is disposed so as to cover the lower thin film electrode layer and the upper thin film electrode layer, reaches the lower thin film electrode layer at a predetermined position, and a second reaches the upper thin film electrode layer An insulating layer provided with a through-hole, and a conductive material, and is provided at an exposed portion of the lower thin-film electrode layer that forms the bottom of the first through-hole. A first buffer layer having an expanding taper shape and a conductive material, disposed on the exposed portion of the upper thin-film electrode layer that forms the bottom of the second through hole, and has an inclined outer peripheral surface A second buffer layer having a taper shape spreading from the bottom and an upper surface of the insulating layer; A first extraction electrode that reaches the first buffer layer through an inner peripheral surface of the first through hole, and is electrically connected to the lower thin film electrode layer via the first buffer layer; and reach the second the second buffer layer through the inner peripheral surface of the through hole of the through the second buffer layer and a second lead electrode connected said to upper thin film electrode layer and the electrically The angle between the outer peripheral surface and the bottom surface of the buffer layer is 30 ° or less, and the thicknesses of the first and second buffer layers are 200 nm or less .

  The third thin-film electronic component of the present invention includes a thin-film electrode layer, an insulating layer provided on the thin-film electrode layer, and having a through hole reaching the thin-film electrode layer at a predetermined position; From the upper surface of the insulating layer, the buffer layer having a tapered shape that is disposed in the exposed portion of the thin-film electrode layer that becomes the bottom of the through hole and has an outer peripheral surface that is inclined and has a tapered shape. An extraction electrode that reaches the buffer layer through the inner peripheral surface of the through hole and is electrically connected to the thin film electrode layer through the buffer layer; and an angle formed between the outer peripheral surface and the bottom surface of the buffer layer is It is characterized by being 15 ° or less.

  The fourth thin film electronic component of the present invention includes a lower thin film electrode layer, a thin film dielectric layer formed on the lower thin film electrode layer, an upper thin film electrode layer formed on the thin film dielectric layer, A first through-hole that is disposed so as to cover the lower thin film electrode layer and the upper thin film electrode layer, reaches the lower thin film electrode layer at a predetermined position, and a second reaches the upper thin film electrode layer An insulating layer provided with a through-hole, and a conductive material, and is provided at an exposed portion of the lower thin-film electrode layer that forms the bottom of the first through-hole. A first buffer layer having an expanding taper shape and a conductive material, disposed on the exposed portion of the upper thin-film electrode layer that forms the bottom of the second through hole, and has an inclined outer peripheral surface A second buffer layer having a taper shape spreading toward the bottom, and an upper surface of the insulating layer. A first extraction electrode that reaches the first buffer layer through an inner peripheral surface of the first through-hole and is electrically connected to the lower thin film electrode layer through the first buffer layer; A second lead electrode that reaches the second buffer layer through the inner peripheral surface of the second through-hole and is electrically connected to the upper thin film electrode layer via the second buffer layer; The angle formed between the outer peripheral surface and the bottom surface of the buffer layer is 15 ° or less.

In the thin film electronic component of the present invention, it is desirable that the thin film electrode layer is made of a noble metal and the buffer layer is made of a base metal.

  The thin film electronic component of the present invention can be configured as a thin film capacitor.

The thin-film electronic component of the present invention includes a thin-film electrode layer, an insulating layer having a through-hole reaching the thin-film electrode layer at a predetermined position, and a thin-film electrode layer serving as a bottom of the through-hole. A buffer layer made of a conductive material, which is disposed in the exposed portion and has an outer peripheral surface that is inclined and has a flared taper shape, and reaches the buffer layer from the upper surface of the insulating layer through the inner peripheral surface of the through hole, Since the thin film extraction electrode electrically connected to the thin film electrode layer via the buffer layer is provided, the junction between the extraction electrode and the thin film electrode layer and the vicinity thereof (for example, the extraction electrode and the thin film electrode layer) In addition to preventing stress concentration on the outer periphery of the joint surface of the lead electrode and the insulating layer, etc., and preventing damage to the thin-film electrode layer and insulating layer due to stress concentration, A highly reliable thin film electronic component can be provided.

  In other words, when the buffer layer has a tapered shape, the rigidity of the buffer layer gradually decreases, so that stress is prevented from concentrating at the junction between the extraction electrode and the thin film electrode layer and in the vicinity thereof. Thus, it is possible to prevent damage to the thin film electrode layer and the insulating layer due to stress concentration, and it is possible to obtain a highly reliable thin film electronic component.

  In the thin film electronic component of the present invention, the lower thin film electrode layer and the upper thin film electrode layer are disposed so as to sandwich the thin film dielectric layer, and the leading electrode extends through a buffer layer having a tapered shape. Since it has a structure connected to the electrode layer and the upper thin film electrode layer, it is possible to suppress stress concentration at the junction between the extraction electrode and the lower thin film electrode layer and the upper thin film electrode layer and in the vicinity thereof. It is possible to connect the extraction electrode to the lower thin film electrode layer and the upper thin film electrode layer with certainty, and prevent damage to the thin film electrode layer and the insulating layer due to stress concentration, thereby providing a highly reliable thin film electronic component. Can be obtained.

Further, in the present invention, by using a thin film electrode layer made of a noble metal, it becomes possible to form a highly reliable thin film electrode layer that can withstand heat treatment in a high temperature oxidizing atmosphere, and as a buffer layer. By using a base metal, the cost can be reduced.
The reason why the base metal can be used as the buffer layer is that the buffer layer is formed after the formation of the thin film dielectric layer, so that the buffer layer is not exposed to a high-temperature oxidizing atmosphere.
In addition, it is desirable to use a material mainly composed of Cu as the buffer layer. This is because a material containing Cu as a main component is relatively inexpensive and has high conductivity.

Further, “when the angle between the outer peripheral surface and the bottom surface of the buffer layer is 30 ° or less and the thickness of the buffer layer is 200 nm or less” or “the angle between the outer peripheral surface and the bottom surface of the buffer layer is 15 ° or less. The concentration of stress on the junction between the extraction electrode and the thin film electrode layer and in the vicinity thereof (for example, the boundary between the extraction electrode and the insulating layer on the outer periphery of the junction surface between the extraction electrode and the thin film electrode layer). In addition to preventing the damage to the thin film electrode layer and the insulating layer due to the concentration of stress, it is possible to obtain a highly reliable thin film electronic component more reliably. That is, “when the angle between the outer peripheral surface and the bottom surface of the buffer layer is 30 ° or less and the thickness of the buffer layer is 200 nm or less” or “the angle between the outer peripheral surface and the bottom surface of the buffer layer is 15 ° or less. In this case, the rigidity of the buffer layer decreases more gently, and the stress concentration can be more reliably mitigated.
However, if the inclination angle of the outer peripheral surface of the buffer layer becomes small, it becomes difficult to form a buffer layer having a predetermined area only in a predetermined area in a restricted area (bottom of the through hole). Usually, the inclination angle of the outer peripheral surface of the buffer layer is preferably 7 ° or more.

In addition, the thin film electronic component having the requirements of claims 2 and 4 can be configured as a thin film capacitor, thereby providing an extremely thin capacitor capable of obtaining a large capacitance. It becomes possible.

  Hereinafter, the features of the present invention will be described in more detail with reference to examples of the present invention.

FIG. 1 is a sectional view showing a thin film capacitor according to an embodiment of the present invention.
As shown in FIG. 1, the thin film capacitor includes a lower thin film electrode layer 1a formed on the surface of the substrate 10, a thin film dielectric layer 2 formed on the lower thin film electrode layer 1a, and a thin film dielectric layer 2 The upper thin film electrode layer 1b formed on the upper thin film electrode layer, the insulating layer 4 disposed on the upper thin film electrode layer 1b, and the first thin film electrode layer 1a conducting through the buffer layer 5 (5a). An extraction electrode 6a and a second extraction electrode 6b electrically connected to the upper thin film electrode layer 1b through the buffer layer 5 (5b) are provided.

  The first extraction electrode 6a passes through the insulating layer 4, the upper thin film electrode layer 1b, and the thin film dielectric layer 2 without exposing the upper thin film electrode layer 1b to the inner peripheral surface. The second extraction electrode 6b is connected to the first buffer layer 5a via the through hole 16a reaching the layer 1a, and the second extraction electrode 6b penetrates the insulating layer 4 and reaches the upper thin film electrode layer 1b. It is connected to the second buffer layer 5b through 16b.

  The thin film capacitor having the above-described configuration is configured such that a capacitance is generated between the lower thin film electrode layer 1a and the upper thin film electrode 1b disposed so as to sandwich the thin film dielectric layer 2 therebetween. Yes.

  Here, as the substrate 10, a Si substrate is preferably used, and a substrate having a thermal oxide film on the surface is preferable.

  Moreover, as a constituent material of the lower thin film electrode layer 1a and the upper thin film electrode layer 1b, it is preferable to use a noble metal or a conductive oxide so as to withstand a high temperature oxidation atmosphere when forming the thin film dielectric layer 2. For example, it is preferable to use Pt.

  The insulating layer 4 is provided for the purpose of preventing a short circuit between the thin film electrode layer and the outside, protecting against mechanical shock from the outside, improving moisture resistance, and the like. As a preferable constituent material of the insulating layer 4, for example, a polyimide resin can be cited.

  The extraction electrodes 6a and 6b have a function of enabling electrical connection from the outside to the lower thin film electrode layer 1a and the upper thin film electrode layer 1b, and the constituent materials thereof include both noble metals and base metals. Although it can be used, it is preferable to use, for example, a base metal material containing Cu as a main component from the viewpoint of cost reduction. Note that a base metal can be used because the extraction electrode is not exposed to a high-temperature oxidizing atmosphere when the thin film dielectric layer is formed.

As the thin film dielectric layer 2, various ceramic dielectric materials such as barium titanate dielectric ceramic, strontium titanate dielectric ceramic, and complex oxides including Ba, Sr, and Ti are used. Is possible.
The thin film dielectric layer 2 can be formed by various known thin film forming methods such as sputtering, CVD (Chemical Vapor Deposition), CSD (Chemical Solution Deposition), etc. From the viewpoint, it is preferable to form a film using the CSD method.

  Next, a method for manufacturing a thin film dielectric layer capacitor according to the present invention will be described with reference to FIG.

(1) First, a substrate (Si substrate) 10 made of, for example, Si and having a surface formed with a SiO ₂ film as a surface oxide film is prepared. Then, as shown in FIG. 2A, the lower thin film electrode layer 1a, the thin film dielectric layer 2, and the upper thin film electrode layer 1b are formed on the surface of the substrate 10 in this order.
At this time, it is also possible to provide an adhesion layer for improving the adhesion with the lower thin film electrode layer 1 a on the surface of the substrate 10. For example, Ti or the like can be used as the adhesion layer.

  The lower thin film electrode layer 1a is formed by RF magnetron sputtering, for example. In Example 1, a thin film electrode layer made of Pt and having a thickness of 200 nm is formed as the lower thin film electrode layer 1a.

  The thin film dielectric layer 2 is formed as follows. First, for example, a precursor solution in which an organic compound of Ba, Sr, Ti is dissolved in an ester organic solvent is spin-coated on the lower thin film electrode layer 1a and dried on a hot plate at 350 ° C. A precursor film having a thickness of 170 nm is formed by repeating and drying a plurality of times. The precursor film is then heat-treated at 650 ° C. for 30 minutes to crystallize, thereby forming the thin film dielectric layer 2.

  Further, the upper thin film electrode layer 1b made of Pt and having a thickness of 200 nm is formed by, for example, RF magnetron sputtering.

(2) Next, as shown in FIG. 2B, the upper thin film electrode layer 1b and the thin film dielectric layer 2 are patterned by photolithography.
In Example 1, the formation of a resist mask and Ar ion milling are repeated to sequentially pattern the upper thin film electrode layer 1b, the thin film dielectric layer 2, and the lower thin film electrode layer 1a, thereby forming a structure as shown in FIG. Obtained. Then, the dielectric properties of the thin film dielectric layer 2 were improved by performing a heat treatment at 800 ° C. for 30 minutes to increase the crystallinity of the thin film dielectric layer 2.

  (3) Then, a Cu film 7 having a predetermined thickness is formed on the lower thin film electrode layer 1a, the thin film dielectric layer 2 and the upper thin film electrode layer 1b by RF magnetron sputtering as shown in FIG. Film.

(4) Next, as shown in FIGS. 2 (d) and 3, a resist pattern 8 having a trapezoidal cross-sectional shape with a taper shape in which the outer peripheral surface is inclined and spreads at the bottom is formed on the Cu film 7. .
Such a tapered resist pattern can be formed, for example, by a method such as a method of developing after exposure using a photomask whose aperture ratio gradually changes. That is, it is possible to control the inclination angle of the outer peripheral surface by using a photomask whose aperture ratio gradually changes and controlling the exposure ratio.

  (5) After forming the tapered resist pattern 8 as described above, the Cu film is patterned by dry etching, so that the outer peripheral surface is inclined and the skirt spreads as shown in FIG. A buffer layer (Cu film) 5 (5a, 5b) having a tapered shape is formed.

  At this time, even if the inclination angle of the outer peripheral surface of the resist pattern 8 is the same, the inclination angle of the outer peripheral surface of the buffer layer 5 (5a, 5b) can be changed by changing the etching rate. That is, when the etching rate of the resist pattern 8 is r1 and the etching rate of the Cu film 7 is r2, the inclination of the end face of the Cu film 7 becomes gentler as the value of r1 / r2 is larger. Therefore, the inclination of the end face of the buffer layer 5 (5a, 5b) can be set to a desired angle by appropriately adjusting the ratio r1 / r2 between the inclination angle of the outer peripheral surface of the resist pattern 8 and the etching rate.

(6) Subsequently, after forming the insulating layer 4 using a photosensitive resin or the like, exposure and development are performed to form the first through hole 16a and the second through hole 16b (see FIG. 2 (f)). .
The first through hole 16a penetrates the insulating layer 4, the upper thin film electrode layer 1b, and the thin film dielectric layer 2 without exposing the upper thin film electrode layer 1b to the inner peripheral surface, so that the lower thin film electrode It is formed so as to reach the first buffer layer 5a formed on the layer 1a.
The second through hole 16b is formed so as to penetrate the insulating layer 4 and reach the second buffer layer 5b formed on the upper thin film electrode layer 1b.

Then, after a Cu film having a film thickness of 300 nm is formed by RF magnetron sputtering, a resist mask is formed and Ar ion milling is performed to pattern the Cu film. As shown in FIG. 4, the first lead electrode 6a that reaches the buffer layer 5a through the inner peripheral surface of the first through hole 16a and is electrically connected to the lower thin film electrode layer 1a via the buffer layer 5a, and the insulating layer 4, the second lead electrode 6 b that reaches the buffer layer 5 b through the inner peripheral surface of the second through hole 16 b and is electrically connected to the upper thin film electrode layer 1 b through the buffer layer 5 b is formed.
Thereby, a thin film capacitor having a structure as shown in FIG. 1 is obtained.

[Evaluation]
In order to confirm the effect of the present invention, the following plural types of samples were prepared, and the characteristics as described below were evaluated. In the evaluation, the stress when the temperature increased by 200 ° C. was subjected to a two-dimensional thermal stress analysis in a cylindrical coordinate system using the finite element method, and the evaluation was performed based on the result.
Hereinafter, the evaluation results will be described. The stress of the diffraction result here is Mises' equivalent stress.

(Evaluation 1)
As shown in FIG. 3, a thin film capacitor having a conventional structure without a buffer layer is manufactured, and the outer peripheral portion of the junction region between the extraction electrode 6 (6a, 6b) and the thin film electrode layer 1 (1a, 1b) and the insulating layer The relationship between the position on the X-coordinate in the vicinity of the boundary A with 4 and the magnitude of the stress applied thereto was examined. In addition, the position of the boundary part A is a position of 0.01 mm on the X coordinate.
However, the thickness of the thin film electrode layer 1 (the lower thin film electrode layer 1a and the upper thin film electrode layer 1b) was changed in a range of 100 nm, 200 nm, 300 nm, 500 nm, and 700 nm. The result is shown in FIG.

As shown in FIG. 4, in the case of a thin film capacitor not including a buffer layer, a large stress is applied in the vicinity of the boundary portion A (near 0.010 mm of the X coordinate), and the stress is increased when the thickness of the thin film electrode layer is increased. Was confirmed to be small.
From this result, it can be seen that even if there is no buffer layer, the stress can be suppressed to some extent by increasing the thickness of the thin film electrode layer. However, it is not preferable to increase the thickness of the thin film electrode layer made of a noble metal material because it causes an increase in cost. This has been described as a problem of the prior art.

(Evaluation 2)
Further, the following thin film capacitors (a), (b), and (c) are manufactured, and the outer peripheral portion of the junction region between the extraction electrode 6 (6a, 6b) and the buffer layer 5 (5a, 5b) and the insulating layer 4 The relationship between the position on the X coordinate in the vicinity of the boundary portion A and the magnitude of the stress applied thereto was examined. In this case as well, the position of the boundary A is a position of 0.01 mm on the X coordinate.

(a) A thin film capacitor not provided with a buffer layer as shown in FIG.
However, the thickness of the thin film electrode layer 1 (1a, 1b) is 200 nm.
(b) A thin film capacitor having a buffer layer 5 but having an inclination angle θ of 90 ° on the outer peripheral surface of the buffer layer 5 (see FIG. 5).
However, the thickness of the buffer layer 5 is 300 nm, and the thickness of the thin film electrode layer 1 is 200 nm.
(c) A thin film capacitor including the buffer layer 5 (5a, 5b) having a taper shape with an inclination angle θ of the outer peripheral surface of the buffer layer 5 of 7 ° (see FIG. 6). However, a buffer layer 5 having a thickness of 300 nm and a thin film electrode layer 1 having a thickness of 200 nm and a buffer layer 5 having a thickness of 600 nm and a thin film electrode layer 1 having a thickness of 200 nm were prepared.

FIG. 7 shows the relationship between the position on the X coordinate measured for each of the samples (a), (b), and (c) and the magnitude of the stress applied thereto.
As shown in FIG. 7, in the case of the sample not provided with the buffer layer (a), it was confirmed that a large stress was applied in the vicinity of the boundary portion A (near 0.010 mm in the X coordinate).
Further, even if the buffer layer is provided, as shown in the above (b), in the case of the sample having the inclination angle θ of the outer peripheral surface of the buffer layer of 90 °, it corresponds to the end B of the buffer layer near the boundary A. It was confirmed that a large stress was applied to the position (around 0.011 mm of the X coordinate).
On the other hand, in the case of the sample including the buffer layer 5 having the taper shape with the inclination angle θ of 7 ° in the above (c), it is in the vicinity of the boundary portion A (near X coordinate of 0.010 to 0.015 mm). It was confirmed that the stress was greatly reduced.

(Evaluation 3)
A thin film capacitor having a buffer layer 5 (5a, 5b) with an inclination angle θ of 7 °, 15 °, 30 °, 45 °, 90 ° is manufactured, and the extraction electrode 6 (6a, 6b) and the buffer layer 5 (5a 5b), the relationship between the position on the X coordinate in the vicinity of the boundary portion A between the outer peripheral portion of the bonding region and the insulating layer 4 and the magnitude of the stress applied thereto was examined. In this case as well, the position of the boundary A is a position of 0.01 mm on the X coordinate.
The result is shown in FIG. However, the thickness of the buffer layer was constant at 300 nm, and the thickness of the thin film electrode layer was constant at 200 nm.
As shown in FIG. 8, it was confirmed that when the tilt angle was 30 ° or less, the stress could be reduced by 15% or more compared to when the tilt angle was 90 °. However, if the inclination is too gentle, space saving will be hindered if an attempt is made to secure a region having a necessary thickness.

(Evaluation 4)
A thin film capacitor having a buffer layer with a tilt angle of 7 ° and a thickness of 50 nm, 100 nm, 200 nm, and 300 nm, and a buffer layer with a tilt angle of 30 ° and a thickness of 50 nm, 100 nm, 200 nm, and 300 nm And a position on the X coordinate in the vicinity of the boundary portion A between the outer peripheral portion of the junction region of the extraction electrode 6 (6a, 6b) and the buffer layer 5 (5a, 5b) and the insulating layer 4. Then, the relationship between the magnitude of the stress applied there was investigated. In this case as well, the position of the boundary A is a position of 0.01 mm on the X coordinate.
FIG. 9 shows the evaluation results for a sample with an inclination angle of 7 °, and FIG. 10 shows the evaluation results for a sample with an inclination angle of 30 °.

  As shown in FIG. 9, even when the inclination angle of the outer peripheral surface of the buffer layer is the same 7 °, in the case of a thin film capacitor having a buffer layer having a different thickness, the vicinity of the boundary A (0.009 of the X coordinate) It was confirmed that the stress applied to about 0.011 mm was smaller when the buffer layer was thicker. However, it can be seen that there is no significant difference in the maximum stress when the thickness is 200 nm and 300 nm, whereas the difference is large between 100 nm and 50 nm. However, even when the thickness of the buffer layer is 50 nm, the stress is small compared with the case of the sample having the conventional structure shown in FIG. Recognize.

  In addition, as shown in FIG. 10, even when the inclination angle is 30 °, the stress applied to the vicinity of the boundary portion A (near 0.009 to 0.011 mm of the X coordinate) is greater when the buffer layer is thicker. Was confirmed to be small. On the other hand, it was confirmed that there was no significant difference in maximum stress between the buffer layer thickness of 100 nm and 50 nm.

9 and 10, the case where the inclination angle of the outer peripheral surface of the buffer layer is 45 ° shown in FIG. 8 in both cases where the inclination angle of the outer peripheral surface of the buffer layer is 7 ° and 30 °. It can be seen that an appropriate effect can be obtained.
Therefore, in the present invention, although depending on the inclination angle of the outer peripheral surface of the buffer layer, it is usually estimated that a certain degree of effect can be obtained if the thickness of the buffer layer is 50 nm or more.
In addition, the thickness of the upper thin film electrode layer and the lower thin film electrode layer depends on conditions such as the thickness of the buffer layer and the inclination angle of the outer peripheral surface of the buffer layer. it is conceivable that.

FIG. 11: is sectional drawing which shows the structure of the thin film electronic component concerning the other Example (Example 2) of this invention.
The thin film electronic component of the second embodiment has a substrate 20, a single thin film electrode layer 21 disposed on the substrate 20, and a through hole 26 provided at a predetermined position disposed on the thin film electrode layer 21. The insulating layer 24 and the buffer layer 25 made of a conductive material and disposed on the exposed portion of the thin film electrode layer 21 serving as the bottom of the through hole 26 and having a tapered shape with an inclined outer peripheral surface and a hem. And.

  Also in the case of the thin film electronic component of the second embodiment, the effect equivalent to the thin film capacitor of the first embodiment, that is, the concentration of stress in the vicinity of the junction between the extraction electrode and the thin film electrode layer is suppressed and prevented. The effect that the reliability of components can be improved is acquired. Note that the configuration of the second embodiment can be suitably applied to the case where the circuit wiring covered with the insulating layer is drawn out to the outside.

  The thin film electronic component of Example 2 is different from the thin film electronic component (thin film capacitor) of FIG. 1 in Example 1 in that the thin film dielectric layer 2 and the upper thin film electrode layer 1b are not provided. However, the structure of the other parts is the same as that of Example 1, and can be manufactured by a method according to the method of manufacturing the thin film capacitor of Example 1.

  The present invention is not limited by the number of thin film electrode layers to be drawn by the extraction electrode and the arrangement mode, and the thin film electrode to be drawn by the extraction electrode as in the first embodiment. The number of layers may be two, or one as in Example 2.

  The present invention can also be applied to a case where a predetermined thin film electrode layer (which may be a single layer or a plurality of layers) of a plurality of thin film electrode layers is connected to an extraction electrode. Is possible.

  The present invention is not limited to the above embodiments in other points, and various modifications and applications can be added within the scope of the present invention.

As described above, according to the present invention, it is possible to suppress concentration of stress on the connection portion between the extraction electrode and the thin film electrode layer and the vicinity thereof, and to provide a highly reliable thin film electronic component. Become.
Therefore, the present invention can be widely applied to the field of thin film electronic components including thin film capacitors.

It is sectional drawing which shows the structure of the thin film electronic component (thin film capacitor) concerning one Example of this invention. (a)-(f) is a figure which shows the manufacturing method of the thin film electronic component (thin film capacitor) concerning one Example of this invention. It is sectional drawing which shows the principal part structure of the thin film electronic component (sample) of the conventional structure which was produced for the comparison in order to confirm the effect of this invention and is not equipped with the buffer layer. It is a figure which shows the relationship of the magnitude | size of the stress concerning the position near the boundary part of the outer peripheral part of the joining area | region of an extraction electrode and a thin film electrode layer, and the insulating layer investigated about the sample for a comparison of FIG. It is sectional drawing which shows the principal part structure of the sample which the inclination angle of the outer peripheral surface of the buffer layer produced for the comparison in order to confirm the effect of this invention is 90 degrees. It is sectional drawing which shows the principal part structure of the sample which satisfy | fills the requirements for the inclination angle of the outer peripheral surface of a buffer layer concerning the Example of this invention to be 30 degrees C or less. FIG. 5 shows the structure of the buffer layer whose outer peripheral surface has an inclination angle of 90 °, a comparative sample, and a sample according to an example of the present invention. It is a figure which shows the relationship between the position near the boundary part with a layer, and the magnitude | size of the stress concerning there. FIG. 6 is a diagram showing the relationship between the position near the boundary between the outer peripheral portion of the junction region between the extraction electrode and the buffer layer and the insulating layer and the magnitude of the stress applied thereto when the inclination angle of the outer peripheral surface of the buffer layer is changed. is there. The boundary between the outer peripheral portion of the junction region between the extraction electrode and the buffer layer and the insulating layer when the thickness of the buffer layer is changed for the sample having the inclination angle of the outer peripheral surface of the buffer layer of 7 ° according to the embodiment of the present invention. It is a figure which shows the relationship between the position of a part vicinity, and the magnitude | size of the stress concerning there. The boundary between the outer peripheral portion of the junction region between the extraction electrode and the buffer layer and the insulating layer when the thickness of the buffer layer is changed for the sample having the inclination angle of the outer peripheral surface of the buffer layer of 30 ° according to the embodiment of the present invention. It is a figure which shows the relationship between the position of a part vicinity, and the magnitude | size of the stress concerning there. It is sectional drawing which shows the structure of the thin film electronic component concerning the other Example of this invention. It is sectional drawing which shows the structure of the conventional thin film capacitor.

DESCRIPTION OF SYMBOLS 1 Thin film electrode layer 1a Lower thin film electrode layer 1b Upper thin film electrode layer 2 Thin film dielectric layer 4 Insulating layer 5 Buffer layer 5a 1st buffer layer 5b 2nd buffer layer 5x The outer peripheral surface (bus line) of a buffer layer
5y Bottom of buffer layer
6 extraction electrode 6a first extraction electrode 6b second extraction electrode 7 Cu film 8 resist pattern 10 substrate 16a first through hole 16b second through hole 20 substrate 21 thin film electrode layer 24 insulating layer 25 buffer layer 26 through hole θ Angle formed by the outer peripheral surface and bottom surface of the buffer layer (tilt angle)
A A boundary between the outer peripheral portion of the junction region between the extraction electrode and the buffer layer and the insulating layer B A position corresponding to the end of the buffer layer in the vicinity of the boundary

Claims (6)

A thin film electrode layer;
An insulating layer provided on the thin film electrode layer and having a through hole reaching the thin film electrode layer at a predetermined position;
A buffer layer made of a conductive material, disposed on the exposed portion of the thin film electrode layer that becomes the bottom of the through-hole, and has a tapered shape in which the outer peripheral surface is inclined and spreads at the bottom,
An extraction electrode that reaches from the top surface of the insulating layer to the buffer layer through the inner peripheral surface of the through hole, and is electrically connected to the thin film electrode layer through the buffer layer ;
The angle formed by the outer peripheral surface and the bottom surface of the buffer layer is 30 ° or less, and
The thickness of the buffer layer is 200 nm or less . A lower thin film electrode layer;
A thin film dielectric layer formed on the lower thin film electrode layer;
An upper thin film electrode layer formed on the thin film dielectric layer;
A first through-hole that is disposed so as to cover the lower thin film electrode layer and the upper thin film electrode layer, reaches the lower thin film electrode layer at a predetermined position, and a second reaches the upper thin film electrode layer An insulating layer provided with a through hole;
A first buffer layer made of a conductive material, disposed at an exposed portion of the lower thin film electrode layer that becomes the bottom of the first through-hole, and has a tapered shape with an inclined outer peripheral surface and a hem ,
A second buffer layer made of a conductive material, disposed at an exposed portion of the upper thin film electrode layer that becomes the bottom of the second through-hole, and has a tapered shape in which the outer peripheral surface is inclined and spreads at the bottom; ,
A first layer extending from the upper surface of the insulating layer to the first buffer layer through the inner peripheral surface of the first through hole and electrically connected to the lower thin film electrode layer through the first buffer layer. A second electrode which reaches the second buffer layer via the one extraction electrode and the inner peripheral surface of the second through hole, and is electrically connected to the upper thin film electrode layer via the second buffer layer; comprising a lead electrode,
The angle formed by the outer peripheral surface and the bottom surface of the buffer layer is 30 ° or less, and
The thickness of the buffer layer is 200 nm or less .   A thin film electrode layer;
  An insulating layer provided on the thin film electrode layer and having a through hole reaching the thin film electrode layer at a predetermined position;
  A buffer layer made of a conductive material, disposed on the exposed portion of the thin film electrode layer that becomes the bottom of the through-hole, and has a tapered shape in which the outer peripheral surface is inclined and spreads at the bottom,
  An extraction electrode that reaches from the upper surface of the insulating layer to the buffer layer through the inner peripheral surface of the through-hole, and is electrically connected to the thin-film electrode layer through the buffer layer;
  Comprising
  The angle formed between the outer peripheral surface and the bottom surface of the buffer layer is 15 ° or less.
  Thin film electronic components characterized by   A lower thin film electrode layer;
  A thin film dielectric layer formed on the lower thin film electrode layer;
  An upper thin film electrode layer formed on the thin film dielectric layer;
  A first through-hole that is disposed so as to cover the lower thin film electrode layer and the upper thin film electrode layer, reaches the lower thin film electrode layer at a predetermined position, and a second reaches the upper thin film electrode layer An insulating layer provided with a through hole;
  A first buffer layer made of a conductive material, disposed at an exposed portion of the lower thin film electrode layer that becomes the bottom of the first through-hole, and has a tapered shape with an inclined outer peripheral surface and a hem ,
  A second buffer layer made of a conductive material, disposed at an exposed portion of the upper thin film electrode layer that becomes the bottom of the second through-hole, and has a tapered shape in which the outer peripheral surface is inclined and spreads at the bottom; ,
  A first layer extending from the upper surface of the insulating layer to the first buffer layer through the inner peripheral surface of the first through hole and electrically connected to the lower thin film electrode layer through the first buffer layer. A second electrode which reaches the second buffer layer via the one extraction electrode and the inner peripheral surface of the second through hole, and is electrically connected to the upper thin film electrode layer via the second buffer layer; Extraction electrode and
  Comprising
  The angle formed between the outer peripheral surface and the bottom surface of the buffer layer is 15 ° or less.
  Thin film electronic components characterized by The thin film electrode layer comprises a noble metal, thin-film electronic component according to any of claims 1-4 wherein the buffer layer is characterized by comprising a base metal. Thin film electronic component according to claim 2 or 4, wherein it is a thin film capacitor.

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