JP4986721B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

  The present invention relates to a semiconductor device having a plurality of layers of wiring and a method for manufacturing the same.

The semiconductor device includes a semiconductor substrate, a functional element formed on the surface layer portion of the semiconductor substrate, and a multilayer wiring structure formed on the semiconductor substrate. The multilayer wiring structure is a structure in which a plurality of wiring layers are stacked with an interlayer insulating film interposed therebetween, and connection between different wiring layers is achieved through a contact hole formed in the interlayer insulating film. .
Aluminum that has been conventionally used as a wiring material has a limit in reducing the resistance, and the wiring resistance becomes a problem as the cross-sectional area decreases as the semiconductor device is miniaturized. For this reason, in particular, it is desired to reduce the resistance of the ground line and the power supply line.

Therefore, for example, the inventor of the present application proposes to apply a gold layer to the uppermost wiring in the following Patent Document 1 to reduce the resistance of the wiring.
In this prior art, a barrier layer made of a titanium thin film is interposed between an aluminum wiring layer electrically connected via a contact hole and the uppermost wiring layer made of a gold layer. Prevention of migration is attempted.
JP 2002-217284 A

However, since gold is an extremely diffusive material, for example, when it is placed for a long time at a high temperature during alloy processing (for example, 400 ° C., 30 minutes to 1 hour), it easily diffuses to the aluminum wiring layer side. End up.
Therefore, the titanium thin film actually has almost no function as a barrier layer, and contributes to the adhesion between the interlayer insulating film and the gold layer and the adhesion between the aluminum wiring layer and the gold layer. It is only functioning as.

In addition to titanium, it is conceivable to use a TiW thin film as a barrier layer, but this TiW film is also similar to the titanium thin film, and has almost no function of preventing mutual diffusion between the gold layer and the aluminum wiring layer, and is bonded. It only serves as a layer.
Although the barrier layer should be composed of a conductive material that can be expected to have a barrier effect, it is difficult to form a good barrier layer with a uniform thickness regardless of which material is used. Specifically, the film thickness is reduced at the bottom (particularly the corner) of the contact hole formed in the interlayer insulating film, and coverage is likely to be poor. Therefore, there is a problem that a sufficient barrier effect is not exhibited particularly during heat treatment at a high temperature.

  Accordingly, an object of the present invention is to provide a semiconductor device capable of effectively suppressing or preventing gold diffusion while using a wiring made of a gold layer, and a method for manufacturing the same.

In order to achieve the above object, the invention according to claim 1 is the first wiring layer (14) formed on the semiconductor substrate (11) and the interlayer insulating film (16) formed on the first wiring layer. ) And a region wider than the region of the interlayer connection opening, including the region of the interlayer connection opening (H) formed in the interlayer insulation film, between the first wiring layer and the interlayer insulation film A barrier layer (30) formed on the first wiring layer, and an electrical connection to the first wiring layer through the barrier layer in the interlayer connection opening formed on the interlayer insulating film. A second wiring layer (19) as the uppermost wiring layer made of a gold layer and a conductive material of a material different from the barrier layer, and interposed between the interlayer insulating film and the second wiring layer. Further, the barrier layer and the second arrangement are disposed in the interlayer connection opening. And an adhesive layer that adheres the second wiring layer to the interlayer insulating film and the barrier layer, and the interlayer insulating film is formed on the first wiring layer. wherein the first layer formed (16U), seen including a second film made of the first layer silicon nitride film formed on the (16S), that the barrier layer has a nitride film This is a semiconductor device. The alphanumeric characters in parentheses indicate corresponding components in the embodiments described later. The same applies hereinafter.

  According to said structure, the barrier layer is formed over the area | region wider than the opening for interlayer connection on the 1st wiring layer. Since this barrier layer is not formed on the interlayer insulating film but between the first wiring layer and the interlayer insulating film, there is a problem of poor coverage in the interlayer connection opening formed in the interlayer insulating film. Can be satisfactorily formed so as to have a uniform film thickness everywhere.

Therefore, the diffusion of the material between the material of the first wiring layer and the second wiring layer made of the gold layer can be effectively suppressed or prevented by the barrier layer having such a uniform film thickness.
In addition, the second wiring layer made of the gold layer has sufficient corrosion resistance, and the second film of the interlayer insulating film is made of a silicon nitride film having a high passivation effect. It can have sufficient corrosion resistance.

In the present invention , the second wiring layer is electrically connected to the barrier layer by the action of the adhesive layer made of a conductive material different from the barrier layer, and is connected to the interlayer insulating film and the barrier layer. Will adhere well.

The barrier layer may be a single layer of a nitride film or a laminated film of a nitride film and another conductive material film. Examples of the nitride film include TiN and TaN.
In addition, a conductive material such as silicon can also be used as the barrier layer.

Examples of the first wiring layer include aluminum wiring (including those made of aluminum alone and those made of an aluminum alloy such as an Al—Si alloy and an Al—Cu alloy).
According to a second aspect of the present invention, in the semiconductor device according to the first aspect, the nitride film constituting the barrier layer is a film having properties as an antireflection film.

According to this configuration, the nitride film constituting the barrier layer can also be used as an antireflection film during exposure in the photolithography process for patterning the first wiring layer.
In general, since a semiconductor device manufacturing apparatus is equipped with equipment for forming an antireflection film, such an antireflection film deposition equipment should be used for forming a nitride film constituting a barrier layer. The semiconductor device of the present invention can be manufactured using existing production equipment.

According to a third aspect of the present invention, the barrier layer is formed in the same shape as the first wiring layer, and is formed in a planar shape (that is, flat) at least in the vicinity of the interlayer connection opening region. Preferably it is. The nitride film included in the barrier layer may be formed in such a shape.
Invention according to claim 4, the barrier layer, to no 200 Å 1000 Å (preferably, 500 Å to 1000 Å) according to any one of claims 1 to 3, characterized in that it has a thickness in the range of It is a semiconductor device.
A fifth aspect of the present invention is the semiconductor device according to any one of the first to fourth aspects, wherein the first film is formed so as to cover the barrier layer.
A sixth aspect of the present invention is the semiconductor device according to any one of the first to fifth aspects, wherein the first film is made of undoped silicate glass.
A seventh aspect of the present invention is the semiconductor device according to any one of the first to sixth aspects, wherein the barrier layer is made of TiN.
The invention according to claim 8 is the semiconductor device according to any one of claims 1 to 7 , wherein the adhesive layer is made of TiW.

The nitride film having such a film thickness range can reliably prevent diffusion from the second wiring layer made of the gold layer even in the heat treatment process, and can penetrate even during etching at the opening for interlayer connection. There is nothing to do.
In general, the nitride film constituting the antireflection film is formed with a film thickness of 300 mm or less. However, in order to prevent the diffusion of gold, it is preferable to use a nitride film having a film thickness range as described above.

The invention according to claim 9 is the step of forming the first wiring layer (14) on the semiconductor substrate (11), and the interlayer connection opening formed in the interlayer insulating film (16) on the first wiring layer. A step of forming a barrier layer (30) defined to include the region of (H) and extending over a region wider than the region of the interlayer connection opening; and a step of forming the interlayer insulating film on the barrier layer; Forming a plurality of interlayer connection openings (H) that partially expose the barrier layer at predetermined positions of the interlayer insulating film; and the barrier layer on the interlayer insulating film and in the interlayer connection openings Forming an adhesive layer (20) made of a conductive material different from that of the interlayer insulating film and the barrier layer exposed in the opening; and on the adhesive layer, for the interlayer connection Through the barrier layer in the opening Forming a second wiring layer (19) as a top wiring layer made of a gold layer so as to be electrically connected to the first wiring layer, and the step of forming the interlayer insulating film includes the step of forming the interlayer insulating film. forming a first layer (16U) on the wiring layer, seen including a step of forming a second film made of a silicon nitride film on the first film (16S), forming the first wiring layer A step of forming a metal material film (140) constituting the first wiring layer on the semiconductor substrate, and a step of forming the barrier layer on the metal material film. Forming a resist pattern film (40) having a pattern corresponding to the first wiring layer on the barrier layer; and etching the metal material film and the barrier layer using the resist pattern film as a common mask. To do Forming the first wiring layer, and patterning the barrier layer so as to cover the first wiring layer, and the resist pattern film forming step includes a resist film ( 40) on the entire surface and an exposure step of exposing the resist film to a pattern corresponding to the first wiring layer, and the step of forming the barrier layer includes the first wiring layer in the exposure step. the step of forming the barrier layer of a nitride material having an anti-reflection function of shielding the light reflected from a method of manufacturing a semiconductor device according to claim containing Mukoto.

  According to this method, the barrier layer is formed in a wide area on the first wiring layer, the interlayer insulating film is formed thereon, and the barrier layer is exposed from the interlayer connection opening formed in the interlayer insulating film. become. Therefore, the barrier layer is unrelated to the problem of coverage in the vicinity of the interlayer connection opening, can be formed with a uniform film thickness, and can exhibit a good barrier effect on the second wiring layer made of the gold layer. .

In addition, the second wiring layer made of the gold layer has sufficient corrosion resistance, and the second film of the interlayer insulating film is made of a silicon nitride film having a high passivation effect. It can have sufficient corrosion resistance .

Further , according to the method, the first wiring layer and the barrier layer are patterned by etching using the common resist pattern film as a mask, and the barrier layer covering the entire first wiring layer is formed. Such a barrier layer can have a uniform film thickness and can have a good barrier effect on the second wiring layer .

Furthermore, according to the above method, the nitride film formed so as to cover the first wiring layer can also be used as an antireflection film, whereby the resist pattern film can be formed satisfactorily.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
FIG. 1 is a cross-sectional view showing a configuration of a semiconductor device according to an embodiment of the present invention. This semiconductor device has a wiring 15 made of polysilicon on a silicon substrate 11 on which a field oxide film 12 is formed.
An interlayer insulating film 13 is formed on the entire surface so as to cover the field oxide film 12 and the polysilicon wiring 15, and an aluminum wiring layer 14 as a first wiring layer is formed on the interlayer insulating film 13. The surface of the aluminum wiring layer 14 is covered with a TiN (titanium nitride) film 30 (barrier layer) as a conductive nitride film. In this embodiment, the TiN film 30 is formed in the same pattern as the aluminum wiring layer 14 and covers the entire surface of the aluminum wiring layer 14.

The entire surface of the TiN film 30 and the interlayer insulating film 13 is covered with an interlayer insulating film 16 composed of a laminated film of a USG (undoped silicate glass) layer 16U and a silicon nitride film 16S formed so as to cover the entire surface layer portion. It has been broken. That is, the TiN film 30 is formed under the interlayer insulating film 16 and is interposed between the aluminum wiring layer 14 and the interlayer insulating film 16.
On the interlayer insulating film 16, a gold wiring layer (wiring layer composed of a gold layer) 19 is formed as a second wiring layer which is the uppermost wiring layer. The gold wiring layer 19 and the interlayer insulating film 16 are entirely covered with a polyimide resin film 18, and the surface of the polyimide resin film 18 is a flat surface.

  A contact hole H that exposes a part of the TiN film 30, which is the lower layer of the interlayer insulating film 16, is formed at a predetermined position of the interlayer insulating film 16. Interlayer electrical connection with the wiring layer 19 through the TiN film 30 is achieved. In this case, the TiN film 30 functions as a barrier layer that prevents diffusion of gold, which is a material metal of the gold wiring layer 19. The TiN film 30 includes a region of the contact hole H, and is formed flat (that is, planar) on the aluminum wiring layer 14 over a region wider than the region of the contact hole H. Since it is unrelated to the problem of coverage, it has good film thickness uniformity.

Conductive adhesion for bonding the gold wiring layer 19 to the TiN film 30 and the interlayer insulating film 16 between the gold wiring layer 19 and the TiN film 30 and between the gold wiring layer 19 and the interlayer insulating film 16. A TiW film 20 functioning as a layer is interposed.
With such a configuration, the gold constituting the gold wiring layer 19 is made of aluminum by the action of the TiN film 30 even when the device is placed in a high temperature environment during the alloy processing after the device is manufactured. Diffusion to the wiring layer 14 side can be effectively prevented. Further, the TiN film 30 which is a kind of nitride film is a film having good corrosion resistance, and can exhibit good corrosion resistance even in an environment such as during a pressure cooker test.

In order to exert a good barrier effect on the TiN film 30 and not to penetrate during the etching for forming the contact hole H, the thickness of the TiN film 30 is preferably 200 to 1000 mm, More preferably, it is 500 to 1000 cm.
FIG. 2 is a cross-sectional view showing the manufacturing steps of the semiconductor device in the order of steps. First, as shown in FIG. 2A, an element isolation film 12 is formed on the surface of the silicon substrate 11 to form an element region, and a wiring 15 made of a polysilicon film is formed in the element region.

  Next, as shown in FIG. 2B, an interlayer insulating film 13 made of a BPSG film is formed as an upper layer, and an aluminum wiring material film 140 connected to the polysilicon wiring 15 through a contact hole (not shown) is formed on the entire surface. Further, a TiN film 30 having a thickness of 500 to 1000 mm is formed on the entire surface to cover the aluminum wiring material film 140. The aluminum wiring material film 140 and the TiN film 30 can be formed by sputtering. For example, after the aluminum wiring material film 140 is formed by sputtering, the TiN film 30 may be formed by sputtering on the aluminum wiring material film 140 while the substrate is kept in a vacuum.

  Further, as shown in FIG. 2C, a resist 40 is applied on the TiN film 30, and the resist 40 is exposed with a mask 41 corresponding to the pattern of the aluminum wiring layer 14. At this time, the TiN film 30 functions as an antireflection film, shields the reflected light from the aluminum wiring material film 140, and prevents unwanted exposure of the resist 40 by the reflected light. Thereby, the resist 40 can be satisfactorily exposed and can be patterned into a desired pattern through a subsequent development step.

Then, as shown in FIG. 2D, the TiN film 30 and the aluminum wiring layer 14 are patterned by etching using the patterned resist 40 as a common mask. Thus, a TiN film 30 having the same pattern as that of the aluminum wiring layer 14 is obtained, covering the entire surface of the aluminum wiring layer 14.
Thereafter, as shown in FIG. 2 (e), USG layer 16U is formed by depositing USG (undoped silicate glass) by CVD (chemical vapor deposition) or the like, and plasma CVD is further formed thereon. A silicon nitride film 16S is formed by the method. Thereby, the interlayer insulating film 16 is formed. A contact hole H is formed in the interlayer insulating film 16 at a predetermined position by dry etching. The size of the plurality of contact holes H formed on the silicon substrate 11 is preferably set to have a diameter of 3 μm or less, for example, so that the etching rate can be made uniform in each part of the substrate 11 and the TiN film The selection ratio of the silicon nitride film 16S to 30 can be increased.

Thereafter, as shown in an enlarged view in FIG. 2 (f), the TiW film 20 is formed on the entire surface by, eg, sputtering.
Next, as shown in FIG. 2G, a gold seed layer 19S is formed on the entire surface. The formation of the seed layer 19S can also be performed by continuous sputtering performed in the processing chamber for forming the TiW film 20 by switching the target to gold.

Next, a resist 24 is formed on the entire surface so as to cover the seed layer 19S. An opening 24 a corresponding to the gold wiring layer 19 is formed in the resist 24. By performing gold electroplating in this state, the gold wiring layer 19 grows in the opening 24a.
Thereafter, the resist 24 is peeled off, and the seed layer 19S and the TiW film 20 other than the gold wiring layer 19 are removed by etching, and a passivation film made of, for example, a polyimide resin film 18 having a thickness of 2 μm is formed by a coating method. A semiconductor device having the configuration shown in FIG. 1 is obtained.

Further, for example, a predetermined position above the gold wiring layer 19 in the polyimide resin film 18 may be opened, and the gold wiring layer 19 and an external connection terminal (not shown) may be connected by a bonding wire.
FIG. 3 is a cross-sectional view for explaining the configuration of a semiconductor device according to another embodiment of the present invention. 3, portions corresponding to the respective portions shown in FIG. 1 are denoted by the same reference numerals as those in FIG.

  In this embodiment, a passivation film is formed by a silicon nitride film 25 instead of the polyimide resin film 18. That is, from the state of FIG. 2G, after removing the resist 24 and etching away the unnecessary portions of the seed layer 19S and the TiW film 20, the silicon nitride film 25 is formed on the entire surface by, eg, plasma CVD. 3 is obtained.

  In this configuration, since the silicon nitride film 25 having a high density and a high passivation effect is used, the corrosion resistance can be further improved. When the silicon nitride film 25 is formed by the plasma CVD method, the semiconductor device is placed in a high temperature environment. Even in this case, the gold from the gold wiring layer 19 to the aluminum wiring layer 14 is acted by the TiN film 30. No diffusion occurs.

  As mentioned above, although two embodiment of this invention was described, this invention can also be implemented with another form. For example, the polyimide resin film 18 is used as a passivation film in the configuration of FIG. 1, and the silicon nitride film 25 is applied as a passivation film in the configuration of FIG. 3, but none of them is provided, that is, the passivation film. It is good also as a structure without. Even in this case, the gold wiring layer 19 to be exposed on the surface has sufficient corrosion resistance, and the surface of the interlayer insulating film 16 is also made of the silicon nitride film 16S having a high passivation effect. Since the corrosion resistance of the film 30 is also good, the semiconductor device can have sufficient corrosion resistance as a whole.

In addition to BPSG, for example, PSG (phosphorus-doped silicon oxide film) or USG film can be used as the interlayer insulating film 13.
Furthermore, on the deposited USG layer 16U, an organic SOG layer 26 (FIG. 1) made of an organic insulator (organic SOG) made of a silicon compound that easily forms a thick wall is formed using an SOG (Spin On Glass) method. And the silicon nitride film 16S may be formed by a high-density plasma CVD method after filling the concave portion on the upper surface of the USG layer 16U.

  In addition, various design changes can be made within the scope of matters described in the claims.

It is sectional drawing which shows the structure of the semiconductor device which concerns on one Embodiment of this invention. It is sectional drawing which shows the manufacturing process of the said semiconductor device in order of a process. It is sectional drawing which shows the structure of the semiconductor device which concerns on other embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 11 Silicon substrate 12 Field oxide film 13 Interlayer insulating film 14 Aluminum wiring layer 15 Polysilicon wiring 16 Interlayer insulating film 16S Silicon nitride film 16U USG layer 18 Polyimide resin film 19 Gold wiring layer 19S Seed layer 20 TiW film 24 Resist 24a Opening 25 Nitride Silicon film 26 Organic SOG layer 30 TiN film H Contact hole

Claims (9)

A first wiring layer formed on the semiconductor substrate;
An interlayer insulating film formed on the first wiring layer;
The first wiring layer is interposed between the first wiring layer and the interlayer insulating film, and includes a region of an opening for interlayer connection formed in the interlayer insulating film, and extends over a region wider than the region of the opening for interlayer connection. A barrier layer formed on the wiring layer;
A second wiring layer formed on the interlayer insulating film, electrically connected to the first wiring layer through the barrier layer in the interlayer connection opening, and serving as a top wiring layer made of a gold layer;
The barrier layer is made of a conductive material different from that of the barrier layer, interposed between the interlayer insulating film and the second wiring layer, and further between the barrier layer and the second wiring layer in the interlayer connection opening. And an adhesive layer that adheres the second wiring layer to the interlayer insulating film and the barrier layer.
The interlayer insulating film, seen containing a first film formed on said first wiring layer and a second layer consisting of the first layer silicon nitride film formed on,
The semiconductor device , wherein the barrier layer includes a nitride film . 2. The semiconductor device according to claim 1 , wherein the nitride film constituting the barrier layer is a film having properties as an antireflection film. The barrier layer, the first being formed into the same shape as the wiring layer, a semiconductor according to claim 1 or 2, characterized in that it is formed in a planar shape in the vicinity of at least the interlayer connection aperture area apparatus. The barrier layer, the semiconductor device according to any one of claims 1 to 3, characterized in that to not 200Å has a thickness in the range of 1000 Å. The semiconductor device according to any one of claims 1 to 4 the first layer is characterized in that it is formed to cover the barrier layer. The semiconductor device according to any one of claims 1 to 5, characterized in that said first layer is made of undoped silicate glass. The semiconductor device according to any one of claims 1 to 6, characterized in that the barrier layer is formed by a TiN. The semiconductor device according to any one of claims 1 to 7, characterized in that the adhesive layer is formed by TiW. Forming a first wiring layer on the semiconductor substrate;
Forming a barrier layer on the first wiring layer so as to include a region of an interlayer connection opening formed in the interlayer insulating film and extending over a region wider than the region of the interlayer connection opening;
Forming the interlayer insulating film on the barrier layer;
Forming a plurality of interlayer connection openings that partially expose the barrier layer at predetermined positions of the interlayer insulating film;
An adhesive layer made of a conductive material different from the barrier layer is formed on the interlayer insulating film and in the interlayer connection opening so as to be in contact with the interlayer insulating film and the barrier layer exposed in the opening. And a process of
Forming a second wiring layer as a top wiring layer made of a gold layer on the adhesive layer so as to be electrically connected to the first wiring layer via the barrier layer in the opening for interlayer connection; Including
The step of forming the interlayer insulating film, forming a first film on said first wiring layer, seen including a step of forming a second film made of a silicon nitride film on the first film,
The step of forming the first wiring layer and the step of forming the barrier layer include
Forming a metal material film constituting the first wiring layer on the semiconductor substrate;
Forming the barrier layer on the metal material film;
Forming a resist pattern film having a pattern corresponding to the first wiring layer on the barrier layer;
Etching the metal material film and the barrier layer using the resist pattern film as a common mask to form the first wiring layer and patterning the barrier layer so as to cover the first wiring layer; Including
The resist pattern film forming step includes
Forming a resist film over the entire surface so as to cover the barrier layer;
And exposing the resist film to a pattern corresponding to the first wiring layer,
The step of forming the barrier layer, a semiconductor characterized by containing Mukoto the step of forming the barrier layer of a nitride material having an anti-reflection function of shielding the light reflected from the first wiring layer in the exposure step Device manufacturing method.

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