JP2015026722A5 - - Google Patents

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Publication number
JP2015026722A5
JP2015026722A5 JP2013155615A JP2013155615A JP2015026722A5 JP 2015026722 A5 JP2015026722 A5 JP 2015026722A5 JP 2013155615 A JP2013155615 A JP 2013155615A JP 2013155615 A JP2013155615 A JP 2013155615A JP 2015026722 A5 JP2015026722 A5 JP 2015026722A5
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JP
Japan
Prior art keywords
metal layer
solder material
resin layer
bump structure
electrode pad
Prior art date
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Application number
JP2013155615A
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English (en)
Japanese (ja)
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JP2015026722A (ja
JP6210777B2 (ja
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Publication date
Application filed filed Critical
Priority to JP2013155615A priority Critical patent/JP6210777B2/ja
Priority claimed from JP2013155615A external-priority patent/JP6210777B2/ja
Priority to US14/328,765 priority patent/US9485864B2/en
Publication of JP2015026722A publication Critical patent/JP2015026722A/ja
Publication of JP2015026722A5 publication Critical patent/JP2015026722A5/ja
Application granted granted Critical
Publication of JP6210777B2 publication Critical patent/JP6210777B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2013155615A 2013-07-26 2013-07-26 バンプ構造、配線基板及び半導体装置並びにバンプ構造の製造方法 Active JP6210777B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2013155615A JP6210777B2 (ja) 2013-07-26 2013-07-26 バンプ構造、配線基板及び半導体装置並びにバンプ構造の製造方法
US14/328,765 US9485864B2 (en) 2013-07-26 2014-07-11 Bump structure, wiring substrate, semiconductor apparatus and bump structure manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2013155615A JP6210777B2 (ja) 2013-07-26 2013-07-26 バンプ構造、配線基板及び半導体装置並びにバンプ構造の製造方法

Publications (3)

Publication Number Publication Date
JP2015026722A JP2015026722A (ja) 2015-02-05
JP2015026722A5 true JP2015026722A5 (OSRAM) 2016-07-21
JP6210777B2 JP6210777B2 (ja) 2017-10-11

Family

ID=52390371

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2013155615A Active JP6210777B2 (ja) 2013-07-26 2013-07-26 バンプ構造、配線基板及び半導体装置並びにバンプ構造の製造方法

Country Status (2)

Country Link
US (1) US9485864B2 (OSRAM)
JP (1) JP6210777B2 (OSRAM)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9412686B2 (en) * 2014-08-26 2016-08-09 United Microelectronics Corp. Interposer structure and manufacturing method thereof
JP2016076533A (ja) * 2014-10-03 2016-05-12 イビデン株式会社 バンプ付きプリント配線板およびその製造方法
JP2017041500A (ja) * 2015-08-18 2017-02-23 イビデン株式会社 プリント配線板および半導体パッケージ
US10583545B2 (en) 2016-02-25 2020-03-10 Milwaukee Electric Tool Corporation Power tool including an output position sensor
US10184189B2 (en) 2016-07-18 2019-01-22 ECSI Fibrotools, Inc. Apparatus and method of contact electroplating of isolated structures
DE112017006956B4 (de) * 2017-01-30 2022-09-08 Mitsubishi Electric Corporation Verfahren zur Herstellung einer Leistungshalbleitervorrichtung und Leistungshalbleitervorrichtung
CN111316409B (zh) * 2017-11-28 2024-08-13 索尼半导体解决方案公司 半导体装置和半导体装置的制造方法
JP7154818B2 (ja) * 2018-05-10 2022-10-18 ローム株式会社 半導体装置および半導体装置の製造方法
CN113053833A (zh) * 2019-12-26 2021-06-29 财团法人工业技术研究院 一种半导体装置及其制作方法
US11302537B2 (en) * 2020-04-01 2022-04-12 Taiwan Semiconductor Manufacturing Co., Ltd. Chip package structure with conductive adhesive layer and method for forming the same
CN112272452A (zh) * 2020-09-23 2021-01-26 惠州中京电子科技有限公司 一种减小倒装led板pad上幅间距的制备方法
KR102881358B1 (ko) * 2020-11-23 2025-11-04 삼성전기주식회사 인쇄회로기판
WO2025173385A1 (ja) * 2024-02-13 2025-08-21 パナソニックIpマネジメント株式会社 インターポーザおよびそれを備えた回路基板

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01226160A (ja) 1988-03-07 1989-09-08 Nippon Telegr & Teleph Corp <Ntt> 電子部品接続用の端子装置および端子の製造方法
US6497943B1 (en) * 2000-02-14 2002-12-24 International Business Machines Corporation Surface metal balancing to reduce chip carrier flexing
JP3735547B2 (ja) * 2001-08-29 2006-01-18 株式会社東芝 半導体装置及びその製造方法
US6992379B2 (en) * 2001-09-05 2006-01-31 International Business Machines Corporation Electronic package having a thermal stretching layer
JP4409455B2 (ja) * 2005-01-31 2010-02-03 株式会社ルネサステクノロジ 半導体装置の製造方法
JP4949279B2 (ja) * 2008-01-21 2012-06-06 新光電気工業株式会社 配線基板及びその製造方法
KR20090080623A (ko) 2008-01-22 2009-07-27 삼성전기주식회사 포스트 범프 및 그 형성방법
JP5407269B2 (ja) * 2008-10-21 2014-02-05 富士通セミコンダクター株式会社 半導体装置
JP2010157690A (ja) * 2008-12-29 2010-07-15 Ibiden Co Ltd 電子部品実装用基板及び電子部品実装用基板の製造方法

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