JP2014107390A - Wiring board and multilayer wiring board using the same - Google Patents

Wiring board and multilayer wiring board using the same Download PDF

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JP2014107390A
JP2014107390A JP2012258712A JP2012258712A JP2014107390A JP 2014107390 A JP2014107390 A JP 2014107390A JP 2012258712 A JP2012258712 A JP 2012258712A JP 2012258712 A JP2012258712 A JP 2012258712A JP 2014107390 A JP2014107390 A JP 2014107390A
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conductor
layer
thin film
wiring board
resin
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Toshihiro Hashimoto
利弘 橋本
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Kyocera Corp
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Kyocera Corp
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Abstract

PROBLEM TO BE SOLVED: To provide a wiring board having high connection reliability and a multilayer wiring board using the same.SOLUTION: A wiring board 1 of the present invention includes a laminate 2, through conductors 3, and thin-film conductor layers 4. The laminate 2 is formed by laminating a plurality of resin insulating layers 2a. The through conductors 3 are provided in the resin insulating layers 2a. The thin-film conductor layers 4 are provided on surfaces of the resin insulating layers 2a and are connected to the through conductors 3. Each of the through conductors 3 includes a through conductor body 3a and a projecting end 3b. The projecting end 3b abuts on each of the thin-film conductor layers 4 and projects from the through conductor body 3a in a layer direction of the resin insulating layers 2a.

Description

本発明は、配線基板およびそれを用いた多層配線基板に関するものである。   The present invention relates to a wiring board and a multilayer wiring board using the wiring board.

従来、電子部品搭載用等に使用される配線基板として、多層配線基板が用いられている。このような配線基板は、例えば、セラミック基板等からなる回路基板の上面に、ポリイミド樹脂等から成り、カーテンコート法またはスピンコート法等によって樹脂の前駆体を塗布し加熱硬化させることによって形成される樹脂絶縁層と、銅またはアルミニウム等の金属から成り、めっき法または気相成膜法等の薄膜形成技術およびフォトリソグラフィ技術を採用することによって形成される薄膜導体層および配線導体層とを交互に多層に積層させた構造となっており、樹脂絶縁層の一方主面側に露出した貫通導体の端面に回路基板の回路導体が電気的に接続されるとともに、樹脂絶縁層の他方主面側に露出した貫通導体の端面に半導体集積回路素子等の電子部品の電極または電子部品の電気検査を行なうためのプローブが接続される。そして、貫通導体を介して電子部品が回路基板の回路導体と電気的に接続され、信号の送受、電子部品に対する電気的な検査等が行なわれる。   Conventionally, multilayer wiring boards have been used as wiring boards used for mounting electronic components. Such a wiring board is made of, for example, a polyimide resin or the like on the upper surface of a circuit board made of a ceramic substrate or the like, and is formed by applying a resin precursor by a curtain coat method or a spin coat method and then heat-curing the resin substrate. Resin insulation layer and thin film conductor layer and wiring conductor layer made of metal such as copper or aluminum and formed by adopting thin film formation technology such as plating method or vapor deposition method and photolithography technology alternately The circuit conductor of the circuit board is electrically connected to the end surface of the through conductor exposed on one main surface side of the resin insulation layer, and the other main surface side of the resin insulation layer. An electrode of an electronic component such as a semiconductor integrated circuit element or a probe for performing an electrical inspection of the electronic component is connected to the exposed end face of the through conductor. And an electronic component is electrically connected with the circuit conductor of a circuit board through a penetration conductor, and transmission / reception of a signal, an electrical test | inspection with respect to an electronic component, etc. are performed.

特開平11-160356号公報Japanese Patent Laid-Open No. 11-160356

例えばプローブカード用として用いられる多層配線基板は、貫通導体と薄膜導体層との接続部において、電気的な検査等の使用時に外力が加わった場合に、樹脂絶縁層および薄膜導体層に加わる応力により貫通導体と薄膜導体層との電気的な接続が保てなくなったり、貫通導体と薄膜導体層とが断線してしまうことがあった。   For example, a multilayer wiring board used for a probe card is caused by stress applied to the resin insulation layer and the thin film conductor layer when an external force is applied at the connection between the through conductor and the thin film conductor layer during use such as electrical inspection. In some cases, electrical connection between the through conductor and the thin film conductor layer cannot be maintained, or the through conductor and the thin film conductor layer are disconnected.

本発明の一つの態様による配線基板は、積層体と、貫通導体と、薄膜導体層とを備えている。積層体は、複数の樹脂絶縁層が積層されてなる。貫通導体は、樹脂絶縁層に設けられている。薄膜導体層は、樹脂絶縁層の表面に設けられ、貫通導体に接続されている。貫通導体は、貫通導体本体と突出端部とを含んでいる。突出端部は、薄膜導体層に当接しており、貫通導体本体から樹脂絶縁層の層方向に突出している。   A wiring board according to an aspect of the present invention includes a laminate, a through conductor, and a thin film conductor layer. The laminate is formed by laminating a plurality of resin insulating layers. The through conductor is provided in the resin insulating layer. The thin film conductor layer is provided on the surface of the resin insulating layer and connected to the through conductor. The through conductor includes a through conductor main body and a protruding end. The protruding end is in contact with the thin film conductor layer and protrudes from the through conductor body in the layer direction of the resin insulating layer.

本発明の他の態様によれば、多層配線基板は、セラミック基板と、セラミック基板の上面に積層された上記構成の配線基板とを備えている。   According to another aspect of the present invention, a multilayer wiring board includes a ceramic substrate and the wiring substrate having the above-described configuration stacked on the upper surface of the ceramic substrate.

本発明の一つの態様による配線基板において、突出端部は、薄膜導体層に当接しており、貫通導体本体から樹脂絶縁層の層方向に突出していることによって、貫通導体と薄膜導体層との接触面積が大きくなり、貫通導体と薄膜導体層とが強固に接合されたものとなって、電気的な検査等の使用時に外力が加わった場合に、樹脂絶縁層および薄膜導体層に応力が加わっても、貫通導体と薄膜導体層とが断線してしまうことを防止することができ、貫通導体と薄膜導体層との接続信頼性に関して向上されたものとすることが可能となる。   In the wiring board according to one aspect of the present invention, the protruding end is in contact with the thin film conductor layer, and protrudes in the layer direction of the resin insulating layer from the through conductor main body, whereby the through conductor and the thin film conductor layer are formed. When the contact area is increased and the through conductor and thin film conductor layer are firmly joined, and an external force is applied during use such as electrical inspection, stress is applied to the resin insulation layer and thin film conductor layer. However, it is possible to prevent the through conductor and the thin film conductor layer from being disconnected, and the connection reliability between the through conductor and the thin film conductor layer can be improved.

本発明の他の態様によれば、多層配線基板は、セラミック基板と、セラミック基板の上面に積層された上記構成の配線基板とを備えていることによって、接続信頼性に関して向
上されている。
According to another aspect of the present invention, the multilayer wiring board includes a ceramic substrate and the wiring substrate having the above-described configuration laminated on the upper surface of the ceramic substrate, thereby improving connection reliability.

(a)は本発明の実施形態における配線基板および多層配線基板を示す断面図であり、(b)は図1(a)に示された配線基板のA部を拡大して示す断面図である。(A) is sectional drawing which shows the wiring board and multilayer wiring board in embodiment of this invention, (b) is sectional drawing which expands and shows the A section of the wiring board shown by Fig.1 (a). . は図1(a)に示された配線基板を示す平面透視図である。FIG. 2 is a plan perspective view showing the wiring board shown in FIG.

以下、本発明の例示的な実施形態について図面を参照して説明する。   Hereinafter, exemplary embodiments of the present invention will be described with reference to the drawings.

図1、図2を参照して本発明の実施形態における配線基板について説明する。本実施形態における配線基板1は、積層体2と、貫通導体3と、薄膜導体層4とを備えている。なお、図1、図2において、配線基板および多層配線基板は仮想のXYZ空間内に設けられており、以下、便宜的に「上方向」とは仮想のZ軸の正方向のことをいう。   A wiring board according to an embodiment of the present invention will be described with reference to FIGS. The wiring board 1 in this embodiment includes a multilayer body 2, a through conductor 3, and a thin film conductor layer 4. 1 and 2, the wiring board and the multilayer wiring board are provided in a virtual XYZ space, and hereinafter, the “upward direction” means the positive direction of the virtual Z axis for convenience.

積層体2は、複数の樹脂絶縁層2aが積層されてなる。樹脂絶縁層2aは、ポリイミド樹脂,ポリフェニレンサルファイド樹脂,全芳香族ポリエステル樹脂,BCB(ベンゾシクロブテン)樹脂,エポキシ樹脂,ビスマレイミドトリアジン樹脂,ポリフェニレンエーテル樹脂,ポリキノリン樹脂,フッ素樹脂等の絶縁性の樹脂から成るものである。   The laminate 2 is formed by laminating a plurality of resin insulating layers 2a. The resin insulating layer 2a is made of an insulating resin such as polyimide resin, polyphenylene sulfide resin, wholly aromatic polyester resin, BCB (benzocyclobutene) resin, epoxy resin, bismaleimide triazine resin, polyphenylene ether resin, polyquinoline resin, or fluororesin. It consists of

例えば、樹脂絶縁層2aがポリイミド樹脂から成る場合には、ワニス状のポリイミド前駆体を後述するセラミック基板11の上面にスピンコート法、ダイコート法、カーテンコート法、印刷法等の塗布法により塗布し、しかる後、400℃程度の熱で硬化させてポリイミ
ド化させることによって10μm〜50μm程度の厚みに形成する。あるいは、上記樹脂から成る10μm〜50μm程度のシートの下面に、シロキサン変性ポリアミドイミド樹脂,シロキサン変性ポリイミド樹脂,ポリイミド樹脂,ビスマレイミドトリアジン樹脂,エポキシ
樹脂等の樹脂接着剤を乾燥厚みで5μm〜20μm程度にドクターブレード法等の塗布法にて塗布して乾燥させることで接着剤層を形成し、これをセラミック基板11の上に重ねて加熱プレスすることで形成する。いずれの方法においても、樹脂絶縁層2aに貫通導体3および薄膜導体層4を形成して上記工程を必要な樹脂絶縁層2aの数だけ繰り返すことで複数の樹脂絶縁層2aが形成される。フィルムの樹脂を用いる方法は、複数のフィルムを一括してプレスすることが可能であり、1層毎に塗布および硬化を行なう必要がないので、製造工程を短くすることができる。
For example, when the resin insulating layer 2a is made of a polyimide resin, a varnish-like polyimide precursor is applied to the upper surface of the ceramic substrate 11 described later by a coating method such as a spin coating method, a die coating method, a curtain coating method, or a printing method. Thereafter, it is cured with heat of about 400 ° C. to be polyimideized to form a thickness of about 10 μm to 50 μm. Alternatively, a resin adhesive such as a siloxane-modified polyamideimide resin, a siloxane-modified polyimide resin, a polyimide resin, a bismaleimide triazine resin, or an epoxy resin is dried on the lower surface of a sheet of about 10 μm to 50 μm made of the above resin with a dry thickness of about 5 μm to 20 μm. An adhesive layer is formed by applying and drying on a coating method such as a doctor blade method, and the adhesive layer is formed on the ceramic substrate 11 by heating and pressing. In any method, the plurality of resin insulation layers 2a are formed by forming the through conductors 3 and the thin film conductor layers 4 in the resin insulation layer 2a and repeating the above steps as many times as the required number of resin insulation layers 2a. In the method using a resin for a film, a plurality of films can be pressed at once, and it is not necessary to apply and cure for each layer, so that the manufacturing process can be shortened.

積層体2において、樹脂絶縁層2aに貫通導体3が設けられている。例えば、樹脂絶縁層2aに直径20μm〜100μmの貫通孔が形成される。この貫通孔の形成方法は、まず樹
脂絶縁層2aに開口を有するレジスト膜を形成するとともにこのレジスト膜の開口に位置する樹脂絶縁層2aをエッチングすることによって、あるいはレーザを使い直接樹脂絶縁層2aの一部を除去することによって形成される。このときのレーザはエキシマレーザ,COレーザ等を用いることができるが、貫通孔の内壁の形状を垂直に近く調整でき、さらに貫通孔の内壁面を滑らかに加工できる紫外線レーザで形成しておくのが望ましい。あるいは、ワニス状の樹脂を塗布する方法の場合であれば、感光性の樹脂を用いて、例えば露光により貫通孔が形成される部分以外を硬化させて、貫通孔が形成される部分の樹脂をエッチングにより除去することにより貫通孔を形成してもよい。
In the laminated body 2, the through conductor 3 is provided in the resin insulating layer 2a. For example, a through hole having a diameter of 20 μm to 100 μm is formed in the resin insulating layer 2a. The through hole is formed by first forming a resist film having an opening in the resin insulating layer 2a and etching the resin insulating layer 2a located in the opening of the resist film or directly using a laser. It is formed by removing a part of. As the laser at this time, an excimer laser, a CO 2 laser, or the like can be used. However, the shape of the inner wall of the through hole can be adjusted almost vertically, and the inner wall surface of the through hole can be formed with an ultraviolet laser that can be processed smoothly. Is desirable. Alternatively, in the case of a method of applying a varnish-like resin, a photosensitive resin is used, for example, a portion other than a portion where a through-hole is formed by exposure is cured, and a resin in a portion where the through-hole is formed is obtained. The through hole may be formed by removing by etching.

また積層体2において、樹脂絶縁層2aの層間または最外層に薄膜導体層4が設けられ、貫通導体3に接続されている。薄膜導体層4は、例えば蒸着法またはスパッタリング法、イオンプレーティング法等の薄膜形成法により、樹脂絶縁層2aの主面の全面に、0.1
μm〜3μm程度の厚みの、例えばクロム(Cr)−Cu合金層またはチタン(Ti)−Cu合金層から成る下地導体層を形成する。次に、下地導体層の上に薄膜導体層4のパタ
ーン形状の開口を有するレジスト膜を形成して、このレジスト膜をマスクとしてめっき等で銅または金等の電気抵抗の小さい金属から成る、2μm〜10μm程度の厚みの主導体層を形成する。そして、レジスト膜を剥離除去し、下地導体層の露出した部分をエッチングにより除去することで薄膜導体層4が形成される。積層体2の上面に設けられている薄膜導体層4の表面には、腐食防止またはプローブとの接続性のために、厚さ1〜10μm程度のニッケルめっき層および厚さ0.1〜3μm程度の金めっき層を順次形成するとよい。
In the laminated body 2, the thin film conductor layer 4 is provided between the resin insulating layers 2 a or the outermost layer, and is connected to the through conductor 3. The thin film conductor layer 4 is formed on the entire main surface of the resin insulating layer 2a by a thin film forming method such as a vapor deposition method, a sputtering method, or an ion plating method.
A base conductor layer made of, for example, a chromium (Cr) -Cu alloy layer or a titanium (Ti) -Cu alloy layer having a thickness of about 3 μm to 3 μm is formed. Next, a resist film having a pattern-shaped opening of the thin film conductor layer 4 is formed on the underlying conductor layer, and the resist film is used as a mask to form a metal having a low electrical resistance such as copper or gold by plating or the like. A main conductor layer having a thickness of about 10 μm is formed. Then, the resist film is peeled and removed, and the exposed portion of the underlying conductor layer is removed by etching, whereby the thin film conductor layer 4 is formed. On the surface of the thin film conductor layer 4 provided on the upper surface of the multilayer body 2, a nickel plating layer with a thickness of about 1 to 10 μm and a gold with a thickness of about 0.1 to 3 μm are used for corrosion prevention or connectivity with a probe. The plating layer may be formed sequentially.

また積層体2において、樹脂絶縁層2aに形成された薄膜導体層4に対して機械研摩もしくはエッチングすることにより、凹状となる箇所を有するものとなっている。   Moreover, in the laminated body 2, it has a location which becomes concave by carrying out mechanical polishing or etching with respect to the thin film conductor layer 4 formed in the resin insulating layer 2a.

貫通導体本体3aは、薄膜導体層4を形成する前に、例えば、銅等の金属粉末と樹脂を主成分とする導体ペーストまたは溶融させたはんだ等を樹脂絶縁層2aの貫通孔に充填しておくことにより、図1に示す例のような、貫通孔が導体により充填されたものが形成される。なお、貫通孔に導体を良好に充填することができるように、貫通孔は絶縁樹脂層2の下面側のほうが大きくなるような形状にするのが好ましい。このような形状の貫通孔は、エッチングにより貫通孔を形成する場合はエッチング条件により、レーザにより貫通孔を形成する場合はレーザの出力等の調節により、感光性樹脂を用いる場合は露光条件またはエッチング条件により形成することができる。   Before forming the thin film conductor layer 4, the through conductor body 3 a is formed by filling the through hole of the resin insulating layer 2 a with, for example, a conductor paste mainly composed of metal powder such as copper and a resin or melted solder. As a result, a through hole filled with a conductor is formed as in the example shown in FIG. In addition, it is preferable that the through hole is shaped so that the lower surface side of the insulating resin layer 2 is larger so that the conductor can be satisfactorily filled into the through hole. The through hole having such a shape is controlled by etching conditions when the through hole is formed by etching, by adjusting the output of the laser when the through hole is formed by a laser, or by exposure condition or etching when a photosensitive resin is used. It can be formed depending on conditions.

本実施形態の配線基板1においては、複数の樹脂絶縁層2aが積層されてなる積層体2と、樹脂絶縁層2aに設けられた貫通導体3と、樹脂絶縁層2aの表面に設けられ、貫通導体3に接続された薄膜導体層4とを備えており、貫通導体3は、貫通導体本体3aと突出端部3bとを含み、突出端部3bは、薄膜導体層4に当接しており、貫通導体本体3aから樹脂絶縁層2aの層方向に突出している。   In the wiring substrate 1 of the present embodiment, a laminate 2 in which a plurality of resin insulation layers 2a are laminated, a through conductor 3 provided on the resin insulation layer 2a, and a surface provided on the surface of the resin insulation layer 2a. A thin-film conductor layer 4 connected to the conductor 3, the through-conductor 3 includes a through-conductor body 3a and a protruding end 3b, and the protruding end 3b is in contact with the thin-film conductor layer 4, It protrudes from the through conductor body 3a in the layer direction of the resin insulating layer 2a.

このように、貫通導体3が貫通導体本体3aと突出端部3bとを含み、突出端部3bが薄膜導体層4に当接しており、貫通導体本体3aから樹脂絶縁層2aの層方向に突出していることによって、貫通導体3と薄膜導体層4との接触面積が大きくなり、貫通導体3と薄膜導体層4とが強固に接合されたものとなって、電気的な検査等の使用時に外力が加わった場合に、樹脂絶縁層2aおよび薄膜導体層4に応力が加わっても、貫通導体3と薄膜導体層4とが断線してしまうことを防止することができ、貫通導体3と薄膜導体層4との接続信頼性に関して向上されたものとすることが可能となる。なお、「層方向」とは、図1、図2において、X軸およびY軸に平行な方向のことをいう。   Thus, the through conductor 3 includes the through conductor main body 3a and the protruding end portion 3b, the protruding end portion 3b is in contact with the thin film conductor layer 4, and protrudes from the through conductor main body 3a in the layer direction of the resin insulating layer 2a. As a result, the contact area between the penetrating conductor 3 and the thin film conductor layer 4 is increased, and the penetrating conductor 3 and the thin film conductor layer 4 are firmly joined. Can be prevented even if stress is applied to the resin insulating layer 2a and the thin film conductor layer 4, the through conductor 3 and the thin film conductor layer 4 can be prevented from being disconnected. The connection reliability with the layer 4 can be improved. The “layer direction” refers to a direction parallel to the X axis and the Y axis in FIGS.

貫通導体3は、樹脂絶縁層2aに形成された薄膜導体層4に、機械研摩もしくはエッチングすることにより凹状となる箇所を形成しておき、貫通導体本体3aが形成された樹脂絶縁層2aと、薄膜導体層4が形成された樹脂絶縁層2aとを、貫通導体本体3aと薄膜導体層4とが接続されるように積層することによって、貫通導体本体3aに充填されている導体ペーストまたは溶融させたはんだ等の導体が薄膜導体層4の凹状となる箇所に充填されて突出端部3bが形成される。このようにして形成された貫通導体3は、薄膜導体層4と接続された接続面を有しており、接続面が凸面状すなわち縦断面視で凸状であるものとなっており、電気的な検査等の使用時に外力が加わった場合に、樹脂絶縁層2aおよび薄膜導体層4に応力が加わっても、剥がれ等が起きやすい貫通導体3と薄膜導体層4との接続面が曲面状すなわち縦断面視で曲線状となって、貫通導体3と薄膜導体層4との接触面積が大きくなり、貫通導体3と薄膜導体層4とが強固に接合されたものとなって、貫通導体と薄膜導体層とが断線してしまうことを防止することができるものとなる。なお、最外層に形成される薄膜導体層4においては、予め表面が平滑で板状の支持体を準備し、支持体上に薄膜導体層4を形成した後、支持体上に形成された薄膜導体層4に機械研摩もしくはエッチングすることにより凹状となる箇所を形成しておき、貫通導体本体3aが形成された樹脂絶縁層2aと、薄膜導体層4が形成された支持体とを、貫通導体本体3aと薄
膜導体層4とが接続されるように積層することによって、貫通導体本体3aに充填されている導体ペーストまたは溶融させたはんだ等の導体が薄膜導体層4の凹状となる箇所に充填されて突出端部3bが形成される。
The through conductor 3 has a concave portion formed by mechanical polishing or etching in the thin film conductor layer 4 formed in the resin insulation layer 2a, and the resin insulation layer 2a in which the through conductor body 3a is formed; By laminating the resin insulating layer 2a on which the thin film conductor layer 4 is formed so that the through conductor body 3a and the thin film conductor layer 4 are connected to each other, the conductor paste filled in the through conductor body 3a or melted. A protruding conductor 3b is formed by filling a concave portion of the thin film conductor layer 4 with a conductor such as solder. The through conductor 3 formed in this way has a connection surface connected to the thin film conductor layer 4, and the connection surface is convex, that is, convex in a longitudinal sectional view. When an external force is applied during use such as inspecting, even if stress is applied to the resin insulating layer 2a and the thin-film conductor layer 4, the connection surface between the through conductor 3 and the thin-film conductor layer 4 that is liable to peel off is curved. When viewed in a longitudinal cross section, the shape is curved, the contact area between the through conductor 3 and the thin film conductor layer 4 is increased, and the through conductor 3 and the thin film conductor layer 4 are firmly joined. It is possible to prevent the conductor layer from being disconnected. In addition, in the thin film conductor layer 4 formed in the outermost layer, after preparing a plate-like support body with a smooth surface in advance and forming the thin film conductor layer 4 on the support body, the thin film formed on the support body A concave portion is formed in the conductor layer 4 by mechanical polishing or etching, and the resin insulating layer 2a on which the through conductor body 3a is formed and the support on which the thin film conductor layer 4 is formed are connected to the through conductor. By laminating the main body 3a and the thin film conductor layer 4 so as to be connected, the conductor paste filled in the through conductor main body 3a or a conductor such as molten solder is filled in the concave portion of the thin film conductor layer 4 Thus, the protruding end 3b is formed.

また、図1、図2に示されているように、薄膜導体層4は、突出端部3bを覆うように形成されている。このような構成にすることによって、電気的な検査等の使用時に外力が加わった場合に、樹脂絶縁層2aおよび薄膜導体層4に応力が加わっても、応力が集中しやすい樹脂絶縁層2aと、貫通導体3と薄膜導体層4との接続面とが異なる箇所に配置されるものとなって、貫通導体と薄膜導体層とが断線してしまうことを防止することができるものとなる。   As shown in FIGS. 1 and 2, the thin film conductor layer 4 is formed so as to cover the protruding end 3b. With such a configuration, when an external force is applied during use such as electrical inspection, the resin insulating layer 2a and the thin film conductor layer 4 can be easily concentrated even if stress is applied to the resin insulating layer 2a and the thin film conductor layer 4. Thus, the connection surface between the through conductor 3 and the thin film conductor layer 4 is disposed at a different location, and the through conductor and the thin film conductor layer can be prevented from being disconnected.

上面に配線基板1が積層されるセラミック基板11は、セラミック絶縁層11aを含んでいる。セラミック絶縁層11aは、酸化アルミニウム(アルミナ:Al)質焼結体,窒化アルミニウム(AlN)質焼結体,炭化珪素(SiC)質焼結体,ムライト質焼結体,ガラスセラミックス等のセラミックスからなるものである。プローブカードに用いる場合は、熱膨張係数がウエハを形成するシリコン(Si)に近い、酸化アルミニウム(Al)質焼結体またはガラスセラミックスが好ましい。セラミック絶縁層8がこのようなセラミックスからなるものであると、配線基板1上にプローブを接合する場合に、プローブまたはプローブの接合部に加わる、プローブとともに接合されるウエハと配線基板1との熱膨張差による熱応力が比較的小さなものとなるので好ましい。また、プローブカードとして用いた場合に、半導体素子の電気特性の測定時における熱負荷に対する熱変形を有効に防止でき、さらに、高い熱伝達性により内部に熱を滞留させることがない。 The ceramic substrate 11 on which the wiring substrate 1 is laminated on the upper surface includes a ceramic insulating layer 11a. The ceramic insulating layer 11a includes an aluminum oxide (alumina: Al 2 O 3 ) sintered body, an aluminum nitride (AlN) sintered body, a silicon carbide (SiC) sintered body, a mullite sintered body, a glass ceramic, and the like. It is made of ceramics. When used for a probe card, an aluminum oxide (Al 2 O 3 ) sintered material or glass ceramics having a thermal expansion coefficient close to that of silicon (Si) forming a wafer is preferable. When the ceramic insulating layer 8 is made of such ceramics, when the probe is bonded onto the wiring substrate 1, the heat of the wiring substrate 1 and the wafer bonded together with the probe, which is added to the probe or the bonded portion of the probe. This is preferable because the thermal stress due to the expansion difference is relatively small. Further, when used as a probe card, it is possible to effectively prevent thermal deformation with respect to a thermal load during measurement of electrical characteristics of a semiconductor element, and furthermore, heat is not retained inside due to high heat transferability.

セラミック基板11の内部配線12および外部配線13は、セラミック絶縁層11aと同時焼成により形成される、タングステン(W),モリブデン(Mo),モリブデン−マンガン(Mo−Mn)合金,銀(Ag),銅(Cu),金(Au),銀−パラジウム(Pd)合金等の金属を主成分とするメタライズからなるものである。   The internal wiring 12 and the external wiring 13 of the ceramic substrate 11 are formed by simultaneous firing with the ceramic insulating layer 11a, tungsten (W), molybdenum (Mo), molybdenum-manganese (Mo-Mn) alloy, silver (Ag), It is made of metallization mainly composed of metal such as copper (Cu), gold (Au), silver-palladium (Pd) alloy.

このようなセラミック基板11は、以下の方法により製作される。例えば、セラミック絶縁層11aが酸化アルミニウム質焼結体で形成される場合には、まず、酸化アルミニウム,酸化珪素,酸化マグネシウムおよび酸化カルシウムの原材料粉末に適当な有機バインダおよび溶媒を添加混合して泥漿状となすとともに、これをドクターブレード法等によってシート状に成形し、セラミック絶縁層11aとなる複数のセラミックグリーンシートを作製する。   Such a ceramic substrate 11 is manufactured by the following method. For example, when the ceramic insulating layer 11a is formed of an aluminum oxide sintered body, first, an appropriate organic binder and solvent are added to and mixed with raw material powders of aluminum oxide, silicon oxide, magnesium oxide and calcium oxide, and the slurry is mixed. This is formed into a sheet shape by a doctor blade method or the like to produce a plurality of ceramic green sheets to be the ceramic insulating layer 11a.

次に、セラミックグリーンシートの内部貫通導体が形成される所定位置に適当な打ち抜き加工により貫通孔を形成するとともに、貫通孔に導体ペーストを充填する。また、スクリーン印刷法等によってセラミックグリーンシートの所定位置に内部配線層となる導体ペースト層を10〜20μmの厚みに形成する。導体ペーストは、タングステン(W),モリブデン(Mo),モリブデン−マンガン(Mo−Mn)合金等の融点の高い金属粉末と適当な樹脂バインダおよび溶剤とを混練することにより作製される。   Next, a through hole is formed by a suitable punching process at a predetermined position where the internal through conductor of the ceramic green sheet is formed, and the through hole is filled with a conductive paste. Further, a conductor paste layer serving as an internal wiring layer is formed to a thickness of 10 to 20 μm at a predetermined position of the ceramic green sheet by a screen printing method or the like. The conductive paste is produced by kneading a metal powder having a high melting point such as tungsten (W), molybdenum (Mo), molybdenum-manganese (Mo-Mn) alloy, an appropriate resin binder, and a solvent.

最後に、これらセラミックグリーンシートを重ね合わせて圧着して積層体を作製し、この積層体を1500℃〜1600℃程度の高温で焼成することによりセラミック基板11が作製される。セラミック基板11の外部配線13の表面には、腐食防止または外部回路との接続性のために、厚さ1〜10μm程度のニッケルめっき層および厚さ0.1〜3μm程度の金めっき層
を順次形成するとよい。内部配線12(内部貫通導体)のセラミック基板11の表面に露出する部分にも同様のめっき層を形成してもよい。
Finally, these ceramic green sheets are superposed and pressure-bonded to produce a laminate, and this laminate is fired at a high temperature of about 1500 ° C. to 1600 ° C. to produce the ceramic substrate 11. When a nickel plating layer having a thickness of about 1 to 10 μm and a gold plating layer having a thickness of about 0.1 to 3 μm are sequentially formed on the surface of the external wiring 13 of the ceramic substrate 11 in order to prevent corrosion or to connect to an external circuit. Good. A similar plating layer may be formed on a portion of the internal wiring 12 (internal through conductor) exposed on the surface of the ceramic substrate 11.

多層配線基板は、セラミック基板11と、セラミック基板11の上面に積層された、上記構
成の配線基板1とを含んでいる。また、プローブカードは、上記構成の多層配線基板と、配線基板1の上面の薄膜導体層4に接続されたプローブとを含んでいる。
The multilayer wiring board includes a ceramic substrate 11 and the wiring substrate 1 having the above-described structure, which is laminated on the upper surface of the ceramic substrate 11. Further, the probe card includes the multilayer wiring board configured as described above and a probe connected to the thin film conductor layer 4 on the upper surface of the wiring board 1.

プローブは、例えば、以下のように本実施形態の配線基板1に接続される。まず、シリコンウエハの1面にエッチングにより複数のプローブの雌型を形成する。ついで、雌型を形成した面にめっき法によりニッケルから成る金属を被着させるとともに雌型をニッケルで埋め込み、埋め込まれた部分以外のウエハ上のニッケルをエッチング等の加工を施すことにより除去して、ニッケル製のプローブが埋設されたシリコンウエハを作製する。このシリコンウエハに埋設されたニッケル製プローブを配線基板1の上面の薄膜導体層4にはんだ等の接合材で接合する。そして、シリコンウエハを水酸化カリウム水溶液で除去することによって、セラミック基板11の上面に積層された配線基板1の上面の薄膜導体層4にプローブが接続されたプローブカードが得られる。   For example, the probe is connected to the wiring board 1 of the present embodiment as follows. First, a female die of a plurality of probes is formed on one surface of a silicon wafer by etching. Next, a metal made of nickel is applied to the surface on which the female mold is formed by plating, and the female mold is embedded with nickel, and nickel on the wafer other than the embedded portion is removed by processing such as etching. Then, a silicon wafer having a nickel probe embedded therein is produced. The nickel probe embedded in the silicon wafer is bonded to the thin film conductor layer 4 on the upper surface of the wiring substrate 1 with a bonding material such as solder. Then, by removing the silicon wafer with an aqueous potassium hydroxide solution, a probe card in which the probe is connected to the thin film conductor layer 4 on the upper surface of the wiring substrate 1 laminated on the upper surface of the ceramic substrate 11 is obtained.

本実施形態の配線基板1において、貫通導体3が貫通導体本体3aと突出端部3bとを含み、突出端部3bが薄膜導体層4に当接しており、貫通導体本体3aから樹脂絶縁層2aの層方向に突出していることによって、貫通導体3と薄膜導体層4との接触面積が大きくなり、貫通導体3と薄膜導体層4とが強固に接合されたものとなって、電気的な検査等の使用時に外力が加わった場合に、樹脂絶縁層2aおよび薄膜導体層4に応力が加わっても、貫通導体3と薄膜導体層4とが断線してしまうことを防止することができ、貫通導体3と薄膜導体層4との接続信頼性に関して向上されたものとすることが可能となる。   In the wiring board 1 of the present embodiment, the through conductor 3 includes a through conductor main body 3a and a protruding end 3b, the protruding end 3b is in contact with the thin film conductor layer 4, and the resin insulating layer 2a from the through conductor main body 3a. Projecting in the layer direction, the contact area between the through conductor 3 and the thin film conductor layer 4 is increased, and the through conductor 3 and the thin film conductor layer 4 are firmly bonded to each other for electrical inspection. When an external force is applied during use, it is possible to prevent the through conductor 3 and the thin film conductor layer 4 from being disconnected even if stress is applied to the resin insulating layer 2a and the thin film conductor layer 4. The connection reliability between the conductor 3 and the thin film conductor layer 4 can be improved.

本実施形態の多層配線基板は、セラミック基板11と、セラミック基板11の上面に積層された上記構成の配線基板1とを備えていることによって、接続信頼性に関して向上されている。   The multilayer wiring board of the present embodiment is improved in connection reliability by including the ceramic substrate 11 and the wiring substrate 1 having the above-described configuration laminated on the upper surface of the ceramic substrate 11.

1・・・・・配線基板
2・・・・・積層体
2a・・・・樹脂絶縁層
3・・・・・貫通導体
3a・・・・貫通導体本体
3b・・・・突出端部
4・・・・・薄膜導体層
11・・・・・セラミック基板
DESCRIPTION OF SYMBOLS 1 ... Wiring board 2 ... Laminated body 2a ... Resin insulation layer 3 ... Penetration conductor 3a ... Penetration conductor main body 3b ... Projection end part 4. .... Thin film conductor layers
11 ... Ceramic substrate

Claims (4)

複数の樹脂絶縁層が積層されてなる積層体と、
前記樹脂絶縁層に設けられた貫通導体と、
前記樹脂絶縁層の表面に設けられ、前記貫通導体に接続された薄膜導体層とを備えており、
前記貫通導体は、貫通導体本体と突出端部とを含み、
該突出端部は、前記薄膜導体層に当接しており、前記貫通導体本体から前記樹脂絶縁層の層方向に突出していることを特徴とする配線基板。
A laminate in which a plurality of resin insulation layers are laminated;
A through conductor provided in the resin insulation layer;
A thin film conductor layer provided on the surface of the resin insulation layer and connected to the through conductor;
The through conductor includes a through conductor body and a protruding end,
The protruding end portion is in contact with the thin film conductor layer and protrudes from the through conductor body in the layer direction of the resin insulating layer.
前記貫通導体は、前記薄膜導体層と接続された接続面を有しており、
該接続面が縦断面視で凸状であることを特徴とする請求項1記載の配線基板。
The through conductor has a connection surface connected to the thin film conductor layer,
The wiring board according to claim 1, wherein the connection surface is convex in a longitudinal sectional view.
前記薄膜導体層は、前記突出端部を覆うように形成されていることを特徴とする請求項1記載の配線基板。   The wiring board according to claim 1, wherein the thin film conductor layer is formed so as to cover the protruding end portion. セラミック基板と、
該セラミック基板の上面に積層された、請求項1記載の配線基板とを備えることを特徴とする多層配線基板。
A ceramic substrate;
A multilayer wiring board comprising: the wiring board according to claim 1, wherein the multilayer wiring board is laminated on an upper surface of the ceramic substrate.
JP2012258712A 2012-11-27 2012-11-27 Wiring board and multilayer wiring board using the same Pending JP2014107390A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017200168A (en) * 2016-02-08 2017-11-02 ザ・ボーイング・カンパニーThe Boeing Company Scalable planar mounting architecture for active scanning phased array antenna system

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003008225A (en) * 2001-06-26 2003-01-10 Kyocera Corp Multilayer wiring substrate and method of manufacturing the same
JP2007299943A (en) * 2006-04-28 2007-11-15 Fujikura Ltd Multilayer printed circuit board, and manufacturing method thereof
JP2010192784A (en) * 2009-02-20 2010-09-02 Kyocera Corp Wiring substrate, probe card, and electronic device
JP2010283300A (en) * 2009-06-08 2010-12-16 Panasonic Corp Wiring board with bump electrode, and method of manufacturing the same

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003008225A (en) * 2001-06-26 2003-01-10 Kyocera Corp Multilayer wiring substrate and method of manufacturing the same
JP2007299943A (en) * 2006-04-28 2007-11-15 Fujikura Ltd Multilayer printed circuit board, and manufacturing method thereof
JP2010192784A (en) * 2009-02-20 2010-09-02 Kyocera Corp Wiring substrate, probe card, and electronic device
JP2010283300A (en) * 2009-06-08 2010-12-16 Panasonic Corp Wiring board with bump electrode, and method of manufacturing the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017200168A (en) * 2016-02-08 2017-11-02 ザ・ボーイング・カンパニーThe Boeing Company Scalable planar mounting architecture for active scanning phased array antenna system

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