JP2003069233A - Multilayer interconnection board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To eliminate a release of a through conductor from a wiring conductor layer, occurring in a heating step when a chip component or the like is mounted or an environmental resistance test such as a temperature cycle test or the like in a multiplayer interconnection board having an insulating layer formed of an insulating film layer on a substrate. SOLUTION: The multiplayer interconnection board comprises a plurality of insulating film layers 4 made of an organic resin and a wiring conductor layer 3 laminated in multiplayer via an insulating adhesive layer 5 between the film layers 4 on a substrate 1, a through conductor 7 disposed in a through hole 6 provided through the layers 4 and the layer 5 between the layers 3 disposed at upper and lower positions. Thus, since a bottom of the conductor 7 is embedded on an upper surface of the layer 3 brought into contact with the bottom of the conductor 7, a stress is dispersed in a side face direction of the conductor 7 embedded on the layer 3, and a release of conductor 7 from the layer 3 does not occur.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer wiring board, and more particularly to a multilayer wiring board used for a hybrid integrated circuit device and a semiconductor element housing package for housing semiconductor elements.

[0002]

2. Description of the Related Art Conventionally, as a multilayer wiring board used for a hybrid integrated circuit device, a package for accommodating semiconductor elements, etc.
For the purpose of forming the wiring conductors at a high density, a multilayer wiring board in which a multilayer wiring portion including a thin insulating layer and a wiring conductor layer is formed on the substrate has been adopted.

Such a multilayer wiring board comprises a thin film insulating layer made of a polyimide resin or the like formed by a spin coating method or the like on the upper surface of a substrate made of an aluminum oxide sintered body or the like, and a metal such as copper or aluminum. It has a structure in which a wiring conductor layer formed by adopting a thin film forming technique such as a plating method or a vapor deposition method and a photolithography technique are alternately laminated in multiple layers.

However, when an insulating layer made of a polyimide resin is formed by a spin coating method, it is necessary to apply the polyimide resin precursor in a number of times in order to form the insulating layer with a desired thickness. In addition, there is a problem that the manufacturing process becomes long because a curing process for polyimidizing the precursor of the polyimide resin is required.

Therefore, a multilayer wiring board using an insulating layer formed by laminating a plurality of insulating film layers made of polyimide resin or the like with an insulating adhesive layer made of bismaleimide triazine resin or the like interposed therebetween has been adopted. .

In order to form an insulating layer in such a multilayer wiring board, first, an insulating film is coated with an insulating adhesive by a doctor blade method or the like and dried to prepare an insulating film layer, which is used to insulate a substrate or a lower layer. It is carried out by stacking the insulating adhesive layer on the upper surface of the film layer so as to be disposed between them, and heating and pressurizing this by using a heating press device to bond them.

For electrical connection between the wiring conductor layers located above and below, through holes are formed in the insulating film layer and the insulating adhesive layer by a method such as laser or dry etching,
After that, a through conductor is formed on the inner wall of the through hole by a vacuum film forming method or a plating method.

The wiring conductor layer and the through conductor have the following (1)
It is formed by a manufacturing method including steps (5) to (5). (1) The inside of the through hole opened by the laser is roughened with a roughening liquid such as a potassium permanganate solution. (2) Pd or the like is applied as a plating catalyst to the roughened surface, and then a base conductor film is formed by electroless plating. (3) Next, a photoresist is applied on the underlying conductor film, and the photoresist is exposed and developed to form a window portion having a predetermined shape in a portion of the underlying conductor layer where the upper main conductor layer is formed. To do. (4) Next, an electrolytic plating film having a thickness of 3 to 10 μm is formed using the underlying conductor layer exposed in the window portion of the photoresist as an electrode. As a result, a plating film is formed on the exposed underlying conductor layer corresponding to the portion of the upper main conductor layer, and the plating film is not formed on the other portions because it is covered with photoresist. The main conductor layer is formed only on the portion corresponding to the through conductor. (5) After the main conductor layer having a predetermined thickness is formed in this manner, the photoresist is peeled and removed, and then the main conductor layer is used as an etching resist for the base conductor layer previously used as the electrode for electrolytic plating. By etching a part, the upper wiring conductor layer and the through conductor are formed.

[0009]

However, in a multilayer wiring board in which the insulating film layers as described above are heated and pressed through an insulating adhesive layer to bond them, a through conductor,
Since there is a large difference in the thermal expansion coefficient between the insulating film layer and the insulating adhesive layer, especially between the through conductor and the insulating adhesive layer, the heating process and temperature when mounting chip parts, etc. on the multilayer wiring board Stress is generated by the heat of the environment resistance test such as the cycle test. The stress is concentrated on the portion where the upper surface of the wiring conductor layer and the through hole are in contact with each other. When the interface between the upper surface of the wiring conductor layer in contact with the upper surface of the wiring conductor layer and the bottom surface of the through conductor is aligned, and the adhesive force at the interface is low However, there is a problem in that a crack is generated in the interface direction and the wiring conductor layer and the through conductor are separated.

The present invention has been made in view of the above-mentioned problems in the prior art, and an object thereof is a wiring conductor layer which is generated in an environment resistance test such as a heating process or a temperature cycle test when mounting a chip component or the like. Another object of the present invention is to provide a multilayer wiring board which is excellent in electrical connection reliability and which suppresses peeling from the through conductor.

[0011]

A multilayer wiring board according to the present invention has a structure in which a plurality of insulating film layers made of an organic resin and a wiring conductor layer are formed on the board in a multilayer structure with an insulating adhesive layer interposed between the insulating film layers. A multilayer wiring board which is laminated and adhered, and the wiring conductor layers located above and below are electrically connected by arranging through conductors in through holes provided in the insulating film layer and the insulating adhesive layer therebetween. The bottom surface of the through conductor is embedded in the top surface of the wiring conductor layer that is in contact with the bottom surface of the through conductor.

Further, in the multilayer wiring board of the present invention having the above-mentioned structure, the area of the embedded portion of the bottom surface of the through conductor is 50% or more of the area of the bottom surface, and the depth is 0.1 μm.
The above is a feature.

According to the multilayer wiring board of the present invention, since the bottom surface of the through conductor is embedded in the upper surface of the wiring conductor layer which is in contact with the bottom surface of the through conductor, the upper surface of the wiring conductor layer where stress concentrates serves as a through hole. The contact portion and the upper surface of the wiring conductor layer that is in contact with the bottom surface of the through conductor are not aligned. As a result, in an environmental resistance test such as a heating process or a temperature cycle test when mounting a chip component, etc., a through conductor embedded with stress concentrated in a portion where the upper surface of the wiring conductor layer is in contact with the through hole is embedded in the wiring conductor layer. It becomes possible to disperse in the lateral direction. As a result, the progress of cracks that occur in the interface direction between the top surface of the wiring conductor layer and the bottom surface of the through conductor in the environmental resistance test such as the heating process or the temperature cycle test when mounting chip components or the like on the multilayer wiring board It is suppressed and peeling between the wiring conductor layer and the through conductor is eliminated.

As a result, the occurrence of a conduction failure between the upper and lower wiring conductor layers is eliminated, and the multilayer wiring board has excellent electrical connection reliability.

Further, according to the multilayer wiring board of the present invention,
When the area of the embedded portion of the bottom surface of the through conductor is 50% or more of the area of the bottom surface and the depth is 0.1 μm or more, the adhesive strength at the interface where the top surface of the wiring conductor layer and the through conductor are in contact with each other The stress is obtained as desired, and the stress is better dispersed in the side surface direction of the through conductor embedded in the wiring conductor layer.
Due to this, cracks that occur in the interface direction between the top surface of the wiring conductor layer and the bottom surface of the through conductor, which occur in the environmental resistance test such as the heating process or the temperature cycle test when mounting the chip component or the like on the multilayer wiring board The progress is better suppressed, and the peeling between the wiring conductor layer and the through conductor can be more effectively eliminated.

As a result, the occurrence of defective conduction between the upper and lower wiring conductor layers is eliminated, and a multilayer wiring board with further excellent electrical connection reliability is obtained.

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION The present invention will be described in detail below with reference to the drawings.

FIG. 1 is a sectional view showing an example of an embodiment of the multilayer wiring board of the present invention, and FIG. 2 is an enlarged sectional view of an essential part showing a state around a through conductor in the multilayer wiring board shown in FIG. is there. In these figures, 1 is a substrate, 2 is a multilayer wiring part, 3 is a wiring conductor layer, 4 is an insulating film layer, 5 is an insulating adhesive layer, 6 is a through hole, and 7 is a through conductor.

The substrate 1 is provided with a multilayer wiring portion 2 in which a plurality of insulating film layers 4 are laminated on an upper surface of the substrate 1 with an insulating adhesive layer 5 interposed therebetween and a wiring conductor layer 3 are laminated in multiple layers. And functions as a support member that supports the multilayer wiring section 2.

The substrate 1 is made of an oxide-based ceramic such as an aluminum oxide-based sintered body or a mullite-based sintered body, or an aluminum nitride-based sintered body or a silicon carbide-based sintered body having an oxide film on its surface. It is made of oxide-based ceramics, or an electrically insulating material such as glass epoxy resin in which a glass fiber substrate is impregnated with epoxy resin or a glass fiber substrate in which a bismaleimide triazine resin is impregnated. .

For example, when it is formed of an aluminum oxide sintered body, an appropriate organic solvent or solvent is added to and mixed with a raw material powder such as alumina, silica, calcia, magnesia, etc. to form a sludge. A ceramic green sheet (ceramic green sheet) is formed by adopting the conventionally well-known doctor blade method or calendar roll method, and then this ceramic green sheet is subjected to appropriate punching processing to form a predetermined shape and high temperature (about The raw material powder is prepared by firing at 1600 ° C) or by adding and mixing an appropriate organic solvent or solvent to the raw material powder such as alumina, and the raw material powder is molded into a predetermined shape by a press molding machine. It is manufactured by firing a compact at a high temperature (about 1600 ° C). In the case of glass epoxy resin, for example, a base material made of glass fiber is impregnated with a precursor of epoxy resin,
It is manufactured by thermally curing the epoxy resin precursor at a predetermined temperature.

In addition, a multilayer wiring section 2 in which a plurality of insulating film layers 4 are laminated on the upper surface of the substrate 1 via an insulating adhesive layer 5 and a wiring conductor layer 3 are laminated in multiple layers.
Is provided. The insulating film layer 4 forming the multilayer wiring portion 2 electrically insulates the wiring conductor layers 3 located above and below, and the wiring conductor layer 3 functions as a transmission path for transmitting an electric signal.

The insulating layer of the multilayer wiring part 2 is an insulating film layer 4
And an insulating adhesive layer 5, and an insulating film layer 4
Is polyimide resin, polyphenylene sulfide resin,
Consists of wholly aromatic polyester resin, fluororesin, etc. The insulating adhesive layer 5 is made of polyamide-imide resin, polyimide-siloxane resin, bismaleimide-triazine resin,
It is made of epoxy resin.

The insulating layer is prepared by first coating an insulating film having a thickness of about 12.5 to 50 μm with an insulating adhesive to a dry thickness of about 5 to 20 μm by using a doctor blade method or the like, and drying the insulating film. It is formed by stacking the insulating adhesive on the upper surfaces of the substrate 1 and the lower insulating layer so that the insulating adhesive is disposed between them, and heating and pressurizing the insulating adhesive using a heating press device to bond them.

Among them, in the combination in which the through conductor 7 is formed of copper or copper alloy, the insulating film layer 4 is made of polyimide resin, and the insulating adhesive layer 5 is made of polyimide siloxane resin or siloxane modified polyamide imide resin, polyimide siloxane is used. The resin or the siloxane-modified polyamide-imide resin has good adhesiveness with the insulating film layer 4, has high heat resistance, and has a thermal expansion coefficient relatively close to that of copper, so that the thermal expansion difference between the through conductor 7 and the insulating layer is also high. It is suitable for the present invention because it is small.

A through hole 6 penetrating the insulating film layer 4 and the insulating adhesive layer 5 is formed at a predetermined position in the insulating layer, and a through conductor 7 is adhered and formed in the through hole 6. Thus, a connection path for electrically connecting each of the wiring conductor layers 3 located above and below the insulating film layer 4 is formed.

The through holes 6 are formed by removing a part of the insulating film layer 4 and the insulating adhesive layer 5 by using, for example, a laser. In particular, when the opening diameter of the through hole 6 is small, it is desirable to form the inner wall surface of the through hole 6 by an ultraviolet laser that can easily control the angle of the inner wall surface of the through hole 6 and can be processed smoothly.

A wiring conductor layer 3 provided on the upper surface of each insulating film layer 4 and a through conductor 7 provided in the through hole 6.
Can be formed by adopting a thin film forming technique such as a sputtering method, a vapor deposition method, or a plating method using a metal material such as copper, gold, aluminum, nickel, chromium, molybdenum, titanium and alloys thereof.

The through conductor 7 may be formed separately from the wiring conductor layer 3, but if they are formed at the same time, the number of steps can be reduced and the electrical connection reliability between the two is also good. When the wiring conductor layer 3 and the penetrating conductor 7 are integrally formed, they are formed mainly by electrolytic plating so that a plating film having a desired thickness can be adjusted and formed. Is good.

Further, it is preferable to provide a recess 3a on the upper surface of the wiring conductor layer 3 which is in contact with the bottom surface of the through conductor 7 so that the bottom surface of the through conductor 7 is embedded therein. When the area of the embedded portion of the bottom surface of the through conductor 7 is less than 50% of the area of the bottom surface, the area of the interface between the wiring conductor layer 3 and the through conductor 7 becomes small, and the adhesive strength tends to be weak. . Also, if the depth is less than 0.1 μm, the stress is not sufficiently dispersed,
Cracks are likely to occur at the interface between the upper surface of the wiring conductor layer 3 and the bottom surface of the through conductor 7. Therefore, the through conductor 7
The area of the embedded portion of the bottom surface of the is preferably 50% or more of the area of the bottom surface, and the depth is preferably 0.1 μm or more.

A method of forming the wiring conductor layer 3 and the through conductor 7 is, for example, that a copper layer is mainly used in a large area, and chromium, molybdenum, or a diffusion barrier layer (barrier layer) is formed on at least one main surface of the copper layer. Titanium or the like is deposited to form a base conductor layer. Next, a photoresist is formed in a desired pattern on this, and the main conductor layer portion is formed by plating to a desired thickness using this photoresist as a mask. After that, the photoresist is peeled off, and the underlying conductor layer is removed by etching, whereby a desired pattern can be formed. Further, the concave portion 3a on the upper surface of the wiring conductor layer 3 is formed with a photoresist having an opening at a predetermined position corresponding to the through hole 6 formed on the upper surface of the wiring conductor layer 3 after the wiring conductor layer 3 is formed. The wiring conductor layer 3 can be formed on the wiring conductor layer 3 by appropriately removing a part of the wiring conductor layer 3 by etching using the mask as a mask.

It should be noted that the uppermost main conductor layer of the insulating film layer 4 has the following characteristics from the viewpoint of mountability of chip components and environment resistance.
When the main conductor layer is a copper layer, a nickel layer or a gold layer may be formed thereon.

Thus, according to the multilayer wiring board of the present invention, electronic components such as a semiconductor element, a capacitive element, and a resistor are mounted and mounted on the multilayer wiring section 2 attached to the upper surface of the substrate 1,
By electrically connecting each electrode of the electronic component to the wiring conductor layer 3, a semiconductor device, a hybrid integrated circuit device, or the like is obtained.

The present invention is not limited to the above example, and various modifications can be made without departing from the scope of the present invention. For example, in the above example, the multilayer wiring part 2 including the insulating layer and the wiring conductor layer 3 is provided only on the upper surface of the substrate 1. It may be provided on both sides.

In the above example, the recess 3a on the upper surface of the wiring conductor layer 3 was processed after the wiring conductor layer 3 was formed. However, an insulating layer having a through hole 6 was formed on the upper surface of the wiring conductor layer 3. After that, it can also be formed by appropriately removing a part of the wiring conductor layer 3 by etching using the through hole 6 as a mask.

[0036]

As described above, according to the multilayer wiring board of the present invention, since the bottom surface of the through conductor is embedded in the upper surface of the wiring conductor layer in contact with the bottom surface of the through conductor, the wiring conductor in which stress is concentrated The portion where the top surface of the layer contacts the through hole and the top surface of the wiring conductor layer that contacts the bottom surface of the through conductor are not aligned. As a result, in the environment resistance test such as the heating process or the temperature cycle test when mounting chip parts, etc., the stress concentrated in the portion where the upper surface of the wiring conductor layer and the through hole are in contact with the through conductor embedded in the wiring conductor layer It becomes possible to disperse in the lateral direction. As a result, the progress of cracks that occur in the interface direction between the top surface of the wiring conductor layer and the bottom surface of the through conductor in the environmental resistance test such as the heating process or the temperature cycle test when mounting chip components or the like on the multilayer wiring board Suppressed,
Peeling between the wiring conductor layer and the through conductor is eliminated.

As a result, a conductive failure between the upper and lower wiring conductor layers does not occur, and the multilayer wiring board has excellent electrical connection reliability.

Further, according to the multilayer wiring board of the present invention,
When the area of the embedded portion of the bottom surface of the through conductor is 50% or more of the area of the bottom surface and the depth is 0.1 μm or more, the adhesive strength at the interface where the top surface of the wiring conductor layer and the through conductor are in contact with each other The stress is obtained as desired, and the stress is better dispersed in the side surface direction of the through conductor embedded in the wiring conductor layer.
Due to this, cracks generated in the interface direction between the top surface of the wiring conductor layer and the bottom surface of the through conductor, which occur in the environmental resistance test such as the heating process or the temperature cycle test when mounting the chip component or the like on the multilayer wiring board The progress is better suppressed, and the peeling between the wiring conductor layer and the through conductor can be more effectively eliminated.

As a result, the occurrence of a conduction failure between the wiring conductor layers located above and below is eliminated, and the multilayer wiring board has a further excellent electrical connection reliability.

[Brief description of drawings]

FIG. 1 is a sectional view showing an example of an embodiment of a multilayer wiring board of the present invention.

FIG. 2 is an enlarged cross-sectional view of an essential part showing a state around a through conductor in the multilayer wiring board shown in FIG.

[Explanation of symbols]

1 ... substrate 2 ... Multi-layer wiring part 3 ... Wiring conductor layer 4 ... Insulating film layer 5 ... Insulating adhesive layer 6 ... through holes 7 ... Through conductor

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Atotaro Kawamura             Kyocera Co., Ltd. 1-1 Yamashita-cho, Kokubun City, Kagoshima Prefecture             Inside the Kagoshima Kokubu Factory F-term (reference) 5E346 AA02 AA05 AA12 AA15 AA22                       AA32 AA35 AA43 AA51 BB13                       BB16 CC02 CC08 CC10 CC16                       CC32 CC41 DD02 DD15 DD22                       EE06 EE07 EE09 EE12 EE18                       FF01 FF04 FF07 GG15 GG17                       GG28 HH11

Claims (2)

[Claims] 1. A plurality of insulating film layers made of an organic resin and a wiring conductor layer are laminated and adhered on the substrate in multiple layers between the insulating film layers via an insulating adhesive layer, and the wiring conductors positioned above and below are laminated. A multi-layer wiring board in which layers are electrically connected to each other by arranging through conductors in through holes provided in the insulating film layer and the insulating adhesive layer between the layers, and the multilayer wiring board is in contact with a bottom surface of the through conductor. A multilayer wiring board, wherein a bottom surface of the through conductor is embedded in an upper surface of a wiring conductor layer. 2. The area of the embedded portion of the bottom surface of the through conductor is 50% or more of the area of the bottom surface, and the depth is 0.1 μm or more. Multilayer wiring board.