JP4578254B2 - Multilayer wiring board - Google Patents

Multilayer wiring board Download PDF

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JP4578254B2
JP4578254B2 JP2005017864A JP2005017864A JP4578254B2 JP 4578254 B2 JP4578254 B2 JP 4578254B2 JP 2005017864 A JP2005017864 A JP 2005017864A JP 2005017864 A JP2005017864 A JP 2005017864A JP 4578254 B2 JP4578254 B2 JP 4578254B2
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layer
conductor
resin
wiring board
insulating
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JP2006210473A (en
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毅 小山田
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Kyocera Corp
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Description

本発明は多層配線基板に関し、より詳細には半導体集積回路素子を収容する半導体素子収納用パッケージや、半導体集積回路等の電気的な検査をするためのプローブカード等に使用される多層配線基板に関するものである。   The present invention relates to a multilayer wiring board, and more particularly, to a multilayer wiring board used for a semiconductor element housing package for housing a semiconductor integrated circuit element, a probe card for electrically inspecting a semiconductor integrated circuit, and the like. Is.

近年、半導体集積回路は半導体素子の高集積化および処理信号数の増加によって、半導体基板上に形成される端子数が増加するとともに端子の狭ピッチ化が進んでいる。これにより、半導体集積回路素子を収容する半導体素子収納用パッケージの接続端子や、半導体集積回路の電気的な検査を行なうプローブカードのプローブも狭ピッチ化が要求されている。   2. Description of the Related Art In recent years, in semiconductor integrated circuits, the number of terminals formed on a semiconductor substrate has increased and the pitch of terminals has been reduced due to higher integration of semiconductor elements and an increase in the number of processing signals. As a result, the pitch of the connection terminals of the package for housing the semiconductor element that houses the semiconductor integrated circuit element and the probe of the probe card that performs electrical inspection of the semiconductor integrated circuit is also required.

この狭ピッチ化の要求に対して、半導体素子収納用パッケージにおいては半導体素子の実装形態がワイヤボンディング接続からフリップチップ接続へ、またプローブカードは、カンチレバー方式のものからニードル状のプローブを細密に格子状に配置したものへと移り変わってきている。   In response to this demand for narrow pitches, in the package for housing semiconductor devices, the mounting form of the semiconductor devices is changed from wire bonding connection to flip chip connection, and the probe card is a cantilever type, and needle-like probes are finely latticed. It has changed to something arranged in a shape.

また、それら半導体素子収納用パッケージやプローブカードに使われる配線基板の構成は、ガラス繊維から成る基材に有機樹脂を含浸硬化させた絶縁層に銅箔をパターン加工した配線導体層を形成して成るプリント配線板から、配線導体層の狭ピッチ化に優れるとともに、配線導体層を細密な格子状に配置することが可能な、基板の上面に樹脂絶縁層と薄膜の配線導体層とから成る多層配線部を形成したビルドアップ方式の多層配線基板へと移り変わってきている。   In addition, the structure of the wiring board used in the semiconductor element storage package and the probe card is formed by forming a wiring conductor layer obtained by patterning a copper foil on an insulating layer obtained by impregnating and curing an organic resin on a substrate made of glass fiber. Multilayer consisting of a resin insulating layer and a thin wiring conductor layer on the upper surface of the substrate, which is excellent in narrowing the pitch of the wiring conductor layer and capable of arranging the wiring conductor layer in a fine lattice pattern It is changing to a build-up type multilayer wiring board in which a wiring part is formed.

かかるビルドアップ方式の多層配線基板は、図4に示すように、配線基板11の上面に、エポキシ樹脂やポリイミド樹脂等から成り、カーテンコート法やスピンコート法等によって樹脂の前駆体を塗布し加熱硬化させることによって形成される樹脂絶縁層14と、銅やアルミニウム等の金属から成り、めっき法や気相成膜法等の薄膜形成技術およびフォトリソグラフィ技術を採用することによって形成される配線導体層15とを積層させた構造となっている。
特開平11−163520号公報 特開平11−38044号公報
As shown in FIG. 4, such a build-up type multilayer wiring board is made of an epoxy resin, a polyimide resin, or the like on the upper surface of the wiring board 11, and a resin precursor is applied by a curtain coating method or a spin coating method and heated. A resin insulating layer 14 formed by curing, and a wiring conductor layer made of a metal such as copper or aluminum, and formed by adopting a thin film forming technique such as a plating method or a vapor phase film forming technique and a photolithography technique 15 is laminated.
JP 11-163520 A Japanese Patent Laid-Open No. 11-38044

しかしながら、従来のビルドアップ方式の多層配線基板は、ガラスクロスに樹脂を含浸させた絶縁基体12の主面に銅箔を積層し、この銅箔を配線パターン状にエッチングして導体層13を形成することにより、またはセラミックスから成る絶縁基体12の主面にメタライズ層から成る導体層13を形成することにより、配線基板11を構成していたため、配線基板11の表面は導体層13が突出した状態となって凹凸形状になっていた。このような配線基板11の上面に樹脂絶縁層14を積層すると、配線基板11の表面の凹凸形状に応じて樹脂絶縁層14の上面も凹凸形状になっていた。さらに樹脂絶縁層14の積層数を増加させると、最上層の樹脂絶縁層14の表面の凹凸形状がより大きくなり、その表面に形成される配線導体層15の表面の高さにばらつきが生じてプローブカードや半導体素子収納用パッケージとしては、配線導体層15と半導体素子との電気的な接続を行なうための接続部材の長さが変わり電気抵抗などの電気的な特性が悪くなるとともに、接続部材の長さの違いにより接続部材の接続部分に応力が偏って集中しやすくなり接続部が破断するなどの電気的導通不良が生じるという問題点があった。   However, the conventional build-up type multilayer wiring board is formed by laminating a copper foil on the main surface of an insulating base 12 in which a glass cloth is impregnated with a resin, and etching the copper foil into a wiring pattern to form a conductor layer 13. Since the wiring substrate 11 is formed by forming the conductive layer 13 made of the metallized layer on the main surface of the insulating base 12 made of ceramics, the surface of the wiring substrate 11 protrudes from the conductive layer 13. It became an uneven shape. When the resin insulating layer 14 is laminated on the upper surface of the wiring substrate 11, the upper surface of the resin insulating layer 14 is also uneven according to the uneven shape of the surface of the wiring substrate 11. When the number of the resin insulation layers 14 is further increased, the uneven shape on the surface of the uppermost resin insulation layer 14 becomes larger, resulting in variations in the height of the surface of the wiring conductor layer 15 formed on the surface. As a probe card or a package for housing a semiconductor element, the length of the connection member for electrical connection between the wiring conductor layer 15 and the semiconductor element changes, and the electrical characteristics such as electrical resistance deteriorate, and the connection member Due to the difference in length, there is a problem in that stress is biased and concentrated on the connection portion of the connection member, resulting in poor electrical conduction such as breakage of the connection portion.

本発明は上記のような背景技術における問題点に鑑みてなされたものであり、その目的は、表面の平坦性が良好であるとともに、電気特性および導通信頼性に優れた多層配線基板を提供することにある。   The present invention has been made in view of the problems in the background art as described above, and an object of the present invention is to provide a multilayer wiring board having good surface flatness and excellent electrical characteristics and conduction reliability. There is.

本発明の多層配線基板は、上面に導体層を有する配線基板上に、樹脂絶縁層と配線導体層とを交互に積層するとともに、上下に位置する前記配線導体層と前記導体層とをそれらの間の前記樹脂絶縁層に形成した貫通導体を介して電気的に接続して成る多層配線基板において、前記配線基板を、絶縁基体と、その上面に直接密着された貫通孔を有する樹脂被覆層と、前記貫通孔を埋めるように設けられた前記導体層とで構成しており、前記導体層を、主導体部と、その側面および底面の全面を連続して覆う前記主導体部よりも熱膨張係数の小さい下地導体部とで構成し、該下地導体部は、その下面が前記絶縁基体の上面よりも内部に埋入しており、前記樹脂絶縁層と前記絶縁基体との界面、および前記下地導体部と前記絶縁基体との界面を同一平面上からずらしたことを特徴とするものである。
In the multilayer wiring board of the present invention, a resin insulating layer and a wiring conductor layer are alternately laminated on a wiring board having a conductor layer on the upper surface, and the wiring conductor layer and the conductor layer positioned above and below are laminated on them. In a multilayer wiring board formed by electrically connecting through through conductors formed in the resin insulation layer, the wiring board comprises an insulating base and a resin coating layer having a through hole directly adhered to the upper surface thereof And the conductor layer provided so as to fill the through-hole, and the conductor layer is thermally expanded more than the main conductor portion covering the main conductor portion and the entire side surface and bottom surface continuously. A base conductor portion having a small coefficient, and the bottom conductor portion has a lower surface embedded inside the upper surface of the insulating base, an interface between the resin insulating layer and the insulating base, and the base Same interface between conductor and insulating substrate It is characterized in that the offset from the surface.

また、本発明の多層配線基板は、上記構成において、前記下地導体部は、前記導体層の下面側の部位が前記導体層の側面側の部位よりも厚いことを特徴とするものである。   The multilayer wiring board of the present invention is characterized in that, in the above configuration, the base conductor portion is thicker at a lower surface side of the conductor layer than at a side surface of the conductor layer.

本発明の多層配線基板によれば、配線基板を、絶縁基体と、その上面に直接密着された貫通孔を有する樹脂被覆層と、貫通孔を埋めるように設けられた導体層とで構成しており、導体層を、主導体部と、その側面および底面の全面を連続して覆う主導体部よりも熱膨張係数の小さい下地導体部とで構成したことから、樹脂絶縁層と絶縁基体との間に導体層がないため、導体層の厚みによる樹脂絶縁層の表面に生じる凹凸がなくなり、多層配線基板の表面の平坦性を非常に高めることができる。
According to the multilayer wiring board of the present invention, the wiring board is composed of an insulating base, a resin coating layer having a through hole that is in direct contact with the upper surface thereof, and a conductor layer provided so as to fill the through hole. Since the conductor layer is composed of the main conductor portion and the base conductor portion having a smaller coefficient of thermal expansion than the main conductor portion that continuously covers the entire side surface and bottom surface, the resin insulating layer and the insulating base Since there is no conductor layer between them, unevenness generated on the surface of the resin insulating layer due to the thickness of the conductor layer is eliminated, and the flatness of the surface of the multilayer wiring board can be greatly enhanced.

また、導体層を、主導体部と、その側面および底面の全面を連続して覆う主導体部よりも熱膨張係数の小さい下地導体部とで構成することによって、主導体部の熱膨張を下地導体部で拘束して導体層全体の熱膨張を抑制することができる。よって、熱膨張係数の異なる絶縁基体、導体層および樹脂絶縁層の3種の材料の接点が存在したとしても、その接点で生じる応力を有効に抑制することができ、導体層と貫通導体との導通信頼性をきわめて高くすることができる。
In addition, the conductor layer is composed of a main conductor portion and a base conductor portion having a lower coefficient of thermal expansion than the main conductor portion that continuously covers the entire side surface and bottom surface of the main conductor portion. Restraining by the conductor portion can suppress the thermal expansion of the entire conductor layer. Therefore, even if there are contacts of three kinds of materials, that is, an insulating base, a conductor layer, and a resin insulating layer having different thermal expansion coefficients, stress generated at the contacts can be effectively suppressed. The conduction reliability can be made extremely high.

また、本発明の多層配線基板によれば、下地導体部は、導体層の下面側の部位が導体層の側面側の部位よりも厚いことから、樹脂絶縁層を多層に積層するとともに各樹脂絶縁層に形成された貫通導体を導体層の直上に重ねた構造、いわゆるスタック構造とした場合でも、導体層と絶縁基体との界面に生じる応力をより有効に抑制できる。つまり、スタック構造とした場合、導体層は、上下方向に重なりあった貫通導体全体の熱膨張による応力が加わるだけでなく、熱膨張係数の異なる絶縁基体にも接しているため、導体層と絶縁基体との界面において特に応力が集中するが、この応力に対して下地導体部を厚くすることにより、応力をより有効に抑制できる。   Further, according to the multilayer wiring board of the present invention, since the lower conductor side portion of the conductor layer is thicker than the side portion of the conductor layer, the resin insulating layer is laminated in multiple layers and each resin insulation Even in the case of a so-called stack structure in which the through conductors formed in the layer are stacked directly on the conductor layer, the stress generated at the interface between the conductor layer and the insulating substrate can be more effectively suppressed. In other words, in the case of a stack structure, the conductor layer is not only subjected to stress due to the thermal expansion of the entire through conductor that overlapped in the vertical direction, but also in contact with the insulating substrate having a different thermal expansion coefficient. Although stress is particularly concentrated at the interface with the base, the stress can be more effectively suppressed by increasing the thickness of the underlying conductor portion against this stress.

また、本発明の多層配線基板によれば、下地導体部は、その下面が絶縁基体の上面よりも内部に埋入していることから、樹脂絶縁層と絶縁基体との界面、および下地導体部と絶縁基体との界面を同一平面上からずらすことができ、熱膨張によってそれらの界面に生じる応力が合わさって大きな応力になるのを有効に防止し、貫通導体と導体層との接続信頼性をより向上させることができるようになる。   Further, according to the multilayer wiring board of the present invention, since the lower surface of the base conductor is embedded inside the upper surface of the insulating base, the interface between the resin insulating layer and the insulating base, and the base conductor And the insulation substrate can be shifted from the same plane, effectively preventing the stresses generated at those interfaces from being combined due to thermal expansion to become a large stress and improving the connection reliability between the through conductor and the conductor layer. It can be improved further.

以下、図面に基づいて本発明の多層配線基板を詳細に説明する。   Hereinafter, a multilayer wiring board of the present invention will be described in detail with reference to the drawings.

図1は本発明の多層配線基板の実施の形態の一例を示す断面図であり、図2は図1に示す多層配線基板における導体層3の周辺の状態を示す要部拡大断面図である。また、図3は本発明の多層配線基板の実施の形態の他の例における導体層3の周辺の状態を示す要部拡大断面図である。これらの図において、1は配線基板、2は絶縁基体、3は導体層、4は樹脂絶縁層、5は配線導体層、6は貫通導体、7は主導体部、8は下地導体部、9は貫通孔、10は樹脂被覆層である。   FIG. 1 is a cross-sectional view showing an example of an embodiment of a multilayer wiring board of the present invention, and FIG. 2 is an enlarged cross-sectional view of a main part showing a state around a conductor layer 3 in the multilayer wiring board shown in FIG. FIG. 3 is an enlarged cross-sectional view of the main part showing the state of the periphery of the conductor layer 3 in another example of the embodiment of the multilayer wiring board of the present invention. In these drawings, 1 is a wiring board, 2 is an insulating substrate, 3 is a conductor layer, 4 is a resin insulating layer, 5 is a wiring conductor layer, 6 is a through conductor, 7 is a main conductor portion, 8 is a base conductor portion, 9 Are through-holes and 10 is a resin coating layer.

配線基板1は、絶縁基体2の上面に貫通孔9を有する樹脂被覆層10を直接密着させるとともに、貫通孔9を埋めるように導体層3を設けることにより構成されている。そして、この配線基板1の上面に、樹脂絶縁層4と配線導体層5とを積層した薄膜配線部が配設されており、この薄膜配線部を支持する支持部材として機能する。   The wiring substrate 1 is configured by directly attaching a resin coating layer 10 having a through hole 9 to the upper surface of the insulating base 2 and providing the conductor layer 3 so as to fill the through hole 9. A thin film wiring portion in which the resin insulating layer 4 and the wiring conductor layer 5 are laminated is disposed on the upper surface of the wiring substrate 1 and functions as a support member that supports the thin film wiring portion.

絶縁基体2は、酸化アルミニウム質焼結体,ムライト質焼結体等の酸化物系セラミックス、あるいは表面に酸化物膜を有する窒化アルミニウム質焼結体,炭化珪素質焼結体等の非酸化物系セラミックス、ガラスクロスなどで補強されたエポキシ樹脂等の電気絶縁材料で形成されている。   The insulating substrate 2 is made of an oxide ceramic such as an aluminum oxide sintered body or a mullite sintered body, or a non-oxide such as an aluminum nitride sintered body or silicon carbide sintered body having an oxide film on the surface. It is made of an electrically insulating material such as epoxy resin reinforced with ceramics or glass cloth.

例えば、酸化アルミニウム質焼結体で形成されている場合には、アルミナ,シリカ,カルシア,マグネシア等の原料粉末に適当な有機溶剤,溶媒を添加混合して泥漿状となすとともにこれをドクターブレード法やカレンダーロール法を採用することによってセラミックグリーンシート(セラミック生シート)を形成し、しかる後、このセラミックグリーンシートに適当な打ち抜き加工を施し、所定形状となすとともに高温(約1600℃)で焼成することによって製作される。あるいは、アルミナ等の原料粉末に適当な有機溶剤,溶媒を添加混合して原料粉末を調製するとともにこの原料粉末をプレス成形機によって所定形状に成形し、最後にこの成形体を高温(約1600℃)で焼成することによって製作される。   For example, when it is formed of an aluminum oxide sintered body, a suitable organic solvent and solvent are added to and mixed with raw material powders such as alumina, silica, calcia, and magnesia to form a slurry, which is then treated by the doctor blade method. A ceramic green sheet (ceramic green sheet) is formed by adopting a calender roll method, and then, the ceramic green sheet is appropriately punched to obtain a predetermined shape and fired at a high temperature (about 1600 ° C.). It is manufactured by. Alternatively, a raw material powder is prepared by adding and mixing an appropriate organic solvent and solvent to a raw material powder such as alumina, and the raw material powder is formed into a predetermined shape by a press molding machine. Finally, the compact is heated to a high temperature (about 1600 ° C. ).

樹脂被覆層10は絶縁性を有する種々の樹脂が用いられ、例えば、ポリイミド樹脂,ポリフェニレンサルファイド樹脂,全芳香族ポリエステル樹脂,フッ素樹脂等から成る絶縁フィルム10aの主面に、シロキサン変性ポリアミドイミド樹脂,シロキサン変性ポリイミド樹脂,ポリイミド樹脂,ビスマレイミドトリアジン樹脂等から成る絶縁性接着剤層10bを形成したものが用いられる。   The resin coating layer 10 is made of various insulating resins. For example, a siloxane-modified polyamideimide resin, a main surface of an insulating film 10a made of polyimide resin, polyphenylene sulfide resin, wholly aromatic polyester resin, fluorine resin, or the like, What formed the insulating adhesive bond layer 10b which consists of a siloxane modified polyimide resin, a polyimide resin, a bismaleimide triazine resin etc. is used.

また、樹脂絶縁層4は樹脂被覆層10と異なる材料でもよく、同じ材料でもよい。好ましくは、熱膨張係数差を小さくするために、樹脂被覆層10と同じ材料であるのがよい。このような樹脂絶縁層4は、例えば、ポリイミド樹脂,ポリフェニレンサルファイド樹脂,全芳香族ポリエステル樹脂,フッ素樹脂等から成る絶縁フィルム4aの主面に、シロキサン変性ポリアミドイミド樹脂,シロキサン変性ポリイミド樹脂,ポリイミド樹脂,ビスマレイミドトリアジン樹脂等から成る絶縁性接着剤層4bを形成したものが用いられる。   The resin insulating layer 4 may be made of a material different from that of the resin coating layer 10 or the same material. Preferably, the material is the same as that of the resin coating layer 10 in order to reduce the difference in thermal expansion coefficient. Such a resin insulating layer 4 is formed on the main surface of an insulating film 4a made of, for example, polyimide resin, polyphenylene sulfide resin, wholly aromatic polyester resin, fluororesin, or the like. In this case, an insulating adhesive layer 4b made of bismaleimide triazine resin or the like is used.

樹脂被覆層10や樹脂絶縁層4は、例えば、まず5〜20μm程度の絶縁フィルムに絶縁性接着剤をドクターブレード法等を用いて乾燥厚みで5〜10μm程度に塗布し乾燥させたものを準備し、これを絶縁基体2上や樹脂被覆層10上に加熱プレス装置を用いて加熱加圧し接着することによって形成される。   The resin coating layer 10 and the resin insulating layer 4 are prepared, for example, by first applying an insulating adhesive to an insulating film of about 5 to 20 μm to a dry thickness of about 5 to 10 μm using a doctor blade method or the like. Then, this is formed by heating and pressing the insulating substrate 2 or the resin coating layer 10 on the insulating substrate 2 or the resin coating layer 10 using a heating press.

これらに使われる絶縁フィルム層と絶縁性接着剤層との組み合わせとしては、例えば、絶縁フィルム層をポリイミド樹脂とし、絶縁性接着剤層をシロキサン変性ポリアミドイミド樹脂とする組み合わせがある。この組み合わせによれば、シロキサン変性ポリアミドイミド樹脂とポリイミド樹脂との接着性も良好であり、かつ耐熱性が高いものであるため、これらにより形成した多層配線基板をプリント基板等に実装する際の耐半田耐熱性等が良好なものとなる。   As a combination of the insulating film layer and the insulating adhesive layer used for these, for example, there is a combination in which the insulating film layer is a polyimide resin and the insulating adhesive layer is a siloxane-modified polyamideimide resin. According to this combination, the adhesion between the siloxane-modified polyamideimide resin and the polyimide resin is good and the heat resistance is high, so that the multi-layer wiring board formed by these is resistant to being mounted on a printed board or the like. Good solder heat resistance and the like.

また、絶縁フィルム層をポリイミド樹脂とし、絶縁性接着剤層をシロキサン変性ポリイミド樹脂としておくと、耐熱性が高いものになるとともに、絶縁基体2をセラミックスで構成したとしても、この組み合わせで形成された樹脂被覆層10、樹脂絶縁層4、絶縁基体2の各熱膨張係数差を小さくできるため熱膨張係数の差による応力を低くすることができる。よって、多層配線基板の全体の反りを低減することができるようになることにより、その表面に実装される半導体集積回路素子の端子の狭ピッチ化にもよりよく対応することができるような多層配線基板にすることができる。   Moreover, when the insulating film layer is made of polyimide resin and the insulating adhesive layer is made of siloxane-modified polyimide resin, the heat resistance is high, and even if the insulating substrate 2 is made of ceramic, it is formed by this combination. Since the difference in thermal expansion coefficient among the resin coating layer 10, the resin insulating layer 4, and the insulating substrate 2 can be reduced, the stress due to the difference in thermal expansion coefficient can be reduced. Therefore, it becomes possible to reduce the overall warpage of the multilayer wiring board, so that the multilayer wiring that can better cope with the narrow pitch of the terminals of the semiconductor integrated circuit element mounted on the surface thereof. It can be a substrate.

また、樹脂被覆層10の貫通孔9は導体層3で埋められている。導体層3は、主導体部7と、その側面および底面を連続して覆う主導体部7よりも熱膨張係数の小さい下地導体部8とから成る。   Further, the through hole 9 of the resin coating layer 10 is filled with the conductor layer 3. The conductor layer 3 includes a main conductor portion 7 and a base conductor portion 8 having a smaller coefficient of thermal expansion than the main conductor portion 7 that continuously covers the side and bottom surfaces of the main conductor portion 7.

主導体部7は、銅,金,アルミニウム等の低電気抵抗金属からなる。また、下地導体部8は、主導体部7よりも熱膨張係数の小さい金属から成り、例えば、ニッケル,クロム,モリブデン,タングステン,タンタル,ルテニウム,チタンおよびそれらの合金等の金属材料からなる。このような金属材料を用いることにより、下地導体部8は、主導体部7に対する拡散防止層(バリア層)および接着層としての機能をも有する。   The main conductor portion 7 is made of a low electrical resistance metal such as copper, gold, or aluminum. The base conductor portion 8 is made of a metal having a smaller thermal expansion coefficient than the main conductor portion 7, and is made of a metal material such as nickel, chromium, molybdenum, tungsten, tantalum, ruthenium, titanium, and alloys thereof. By using such a metal material, the underlying conductor portion 8 also has a function as a diffusion prevention layer (barrier layer) and an adhesive layer for the main conductor portion 7.

好ましくは、下地導体部8の熱膨張係数は主導体部7の熱膨張係数の0.2〜0.9倍であるのがよい。0.9倍を超える場合、主導体部7の熱膨張を下地導体部8で拘束して導体層3全体の熱膨張を抑制する効果が小さくなりやすい。また、0.2倍未満の場合、主導体部7と下地導体部8との熱膨張係数差が大きくなり、これらの界面に応力が生じて導体層3の導通信頼性が低下しやすくなる。   Preferably, the thermal expansion coefficient of the base conductor portion 8 is 0.2 to 0.9 times the thermal expansion coefficient of the main conductor portion 7. When it exceeds 0.9 times, the effect of restraining the thermal expansion of the entire conductor layer 3 by restraining the thermal expansion of the main conductor portion 7 with the base conductor portion 8 tends to be small. On the other hand, when the ratio is less than 0.2 times, the difference in thermal expansion coefficient between the main conductor portion 7 and the underlying conductor portion 8 becomes large, and stress is generated at these interfaces, and the conduction reliability of the conductor layer 3 is likely to be lowered.

導体層3は、先ず、絶縁基体2に樹脂被覆層10を積層し、この樹脂絶縁層4に導体層3のパターン形状の貫通孔9を形成する。このような貫通孔9は、例えば金属膜をマスクとして樹脂絶縁層4の上面側を酸素プラズマ処理すること、もしくはレーザを使うことによって樹脂絶縁層4の上面側の一部を貫通除去することにより形成される。   In the conductor layer 3, first, the resin coating layer 10 is laminated on the insulating base 2, and the pattern-shaped through-hole 9 of the conductor layer 3 is formed in the resin insulating layer 4. Such a through-hole 9 is formed by, for example, performing oxygen plasma treatment on the upper surface side of the resin insulating layer 4 using a metal film as a mask, or by partially removing the upper surface side of the resin insulating layer 4 by using a laser. It is formed.

次に、樹脂絶縁層4の上面の全面、貫通孔9の内面、および貫通孔9内に露出した絶縁基体2表面にスパッタリング法,蒸着法,めっき法等の薄膜形成技術を採用することによって、下地導体部8を被着させる。その後、次に、その下地導体部8上面の全面に主導体部7を、電解めっき法などで貫通孔9が埋め込まれるまで形成する。その後、不必要な厚みにまで形成した電解めっき膜を研磨法やケミカルエッチング法等にて所定厚みまで除去することにより、所望のパターン形状の導体層3に加工することができる。   Next, by adopting a thin film forming technique such as sputtering, vapor deposition or plating on the entire upper surface of the resin insulating layer 4, the inner surface of the through hole 9, and the surface of the insulating base 2 exposed in the through hole 9, The base conductor portion 8 is deposited. After that, next, the main conductor portion 7 is formed on the entire upper surface of the underlying conductor portion 8 until the through hole 9 is filled by electrolytic plating or the like. Thereafter, the electroplated film formed to an unnecessary thickness is removed to a predetermined thickness by a polishing method, a chemical etching method, or the like, whereby the conductor layer 3 having a desired pattern shape can be processed.

好ましくは、下地導体部8は、導体層3の下面側の部位が導体層3の側面側の部位よりも厚くなっているのがよい。これにより、樹脂絶縁層4を多層に積層するとともに各樹脂絶縁層4に形成された貫通導体6を導体層3の直上に重ねた構造、いわゆるスタック構造とした場合でも、導体層3と絶縁基体2との界面に生じる応力をより有効に抑制できる。つまり、スタック構造とした場合、導体層3は、上下方向に重なりあった貫通導体6全体の熱膨張による応力が加わるだけでなく、熱膨張係数の異なる絶縁基体2にも接しているため、導体層3と絶縁基体2との界面において特に応力が集中するが、この応力に対して下地導体部8を厚くすることにより、応力をより有効に抑制できる。   Preferably, the base conductor portion 8 has a portion on the lower surface side of the conductor layer 3 that is thicker than a portion on the side surface side of the conductor layer 3. As a result, even when the resin insulating layer 4 is laminated in multiple layers and the through conductor 6 formed in each resin insulating layer 4 is stacked directly on the conductor layer 3, a so-called stack structure is formed. 2 can be more effectively suppressed. That is, in the case of the stack structure, the conductor layer 3 is not only subjected to stress due to the thermal expansion of the entire through conductor 6 overlapped in the vertical direction, but is also in contact with the insulating base 2 having different thermal expansion coefficients. Although stress is particularly concentrated at the interface between the layer 3 and the insulating substrate 2, the stress can be more effectively suppressed by increasing the thickness of the underlying conductor portion 8 against this stress.

特に導体層3の側面側に形成される下地導体部8は金属膜の内部応力による樹脂絶縁層4への影響をなくすため、その厚みを0.01μm以上0.3μm以下とし、導体層3の下面側に形成される下地導体部8は、絶縁基体2との熱膨張差を十分に緩和できるように、その厚みを0.5μm以上3μm以下しておくのがよい。   In particular, the base conductor portion 8 formed on the side surface side of the conductor layer 3 has a thickness of 0.01 μm or more and 0.3 μm or less in order to eliminate the influence of the internal stress of the metal film on the resin insulating layer 4. The base conductor portion 8 formed on the lower surface side is preferably 0.5 μm or more and 3 μm or less in thickness so that the thermal expansion difference with the insulating base 2 can be sufficiently relaxed.

また、地導体部8は、図3に示すように、その下面が絶縁基体2の上面よりも内部に埋入している。これにより、樹脂絶縁層4と絶縁基体2との界面、および下地導体部8と絶縁基体2との界面を同一平面上からずらすことができ、熱膨張によってそれらの界面に生じる応力が合わさって大きな応力になるのを有効に防止し、貫通導体6と導体層3との接続信頼性をより向上させることができるようになる。 The lower ground conductor portion 8, as shown in FIG. 3, a lower surface that are embedded in the inside than the upper surface of the insulating substrate 2. As a result, the interface between the resin insulating layer 4 and the insulating base 2 and the interface between the base conductor 8 and the insulating base 2 can be shifted from the same plane, and the stress generated at those interfaces due to thermal expansion is combined and large. It is possible to effectively prevent stress and to further improve the connection reliability between the through conductor 6 and the conductor layer 3.

また、配線基板1の上面には、樹脂絶縁層4と配線導体層5とが交互に積層されているとともに、上下に位置する配線導体層5と導体層3とがそれらの間の樹脂絶縁層4に形成した貫通導体6を介して電気的に接続されている。配線導体層5や貫通導体6は、銅,金,アルミニウム等の低電気抵抗金属からなり、スパッタリング法,蒸着法,めっき法等の薄膜形成技術等により形成することができる。   In addition, the resin insulating layers 4 and the wiring conductor layers 5 are alternately laminated on the upper surface of the wiring board 1, and the wiring conductor layers 5 and the conductor layers 3 positioned above and below are disposed between them. They are electrically connected through a through conductor 6 formed in the line 4. The wiring conductor layer 5 and the through conductor 6 are made of a low electrical resistance metal such as copper, gold, or aluminum, and can be formed by a thin film forming technique such as sputtering, vapor deposition, or plating.

なお、多層配線基板の最上層となる樹脂絶縁層4の表面に形成される配線導体層5は、接続信頼性および耐環境信頼性の観点から、その露出した表面にニッケル層や金層を形成するとよい。   The wiring conductor layer 5 formed on the surface of the resin insulating layer 4 which is the uppermost layer of the multilayer wiring board is formed with a nickel layer or a gold layer on the exposed surface from the viewpoint of connection reliability and environmental reliability. Good.

かくして、本発明の多層配線基板の最上層に位置する樹脂絶縁層4の表面に形成された配線導体層5に半導体集積回路を実装するとともに、多層配線基板を外部電気回路に電気的に接続することによって半導体装置となる。   Thus, the semiconductor integrated circuit is mounted on the wiring conductor layer 5 formed on the surface of the resin insulating layer 4 positioned at the uppermost layer of the multilayer wiring board of the present invention, and the multilayer wiring board is electrically connected to the external electric circuit. As a result, a semiconductor device is obtained.

また、本発明の多層配線基板の最上層に位置する樹脂絶縁層4の表面に形成された配線導体層5と接触させてプローブを配置、固定するとともに、多層配線基板を外部電気回路に電気的および機械的に接続することによって、半導体集積回路等の電気的な検査をするためのプローブカードとなる。   In addition, the probe is placed and fixed in contact with the wiring conductor layer 5 formed on the surface of the resin insulating layer 4 positioned at the uppermost layer of the multilayer wiring board of the present invention, and the multilayer wiring board is electrically connected to an external electric circuit. And by connecting mechanically, it becomes a probe card for carrying out the electrical test | inspection of a semiconductor integrated circuit etc.

なお、本発明は以上の実施の形態の例に限定されるものではなく、本発明の要旨を逸脱しない範囲であれば種々の変更は可能である。例えば、上述の例においては、樹脂絶縁層4は絶縁フィルム層と絶縁性接着剤層との2層構造のものを積層したが、例えば絶縁フィルム層を中心に上下に絶縁性接着剤層を形成したものを積層したものや液状の樹脂をコーティングして加熱し架橋させたものを用いてもよい。また、樹脂絶縁層4と配線導体層5を複数層形成してもよい。   It should be noted that the present invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the present invention. For example, in the above-described example, the resin insulating layer 4 has a two-layer structure of an insulating film layer and an insulating adhesive layer, but for example, an insulating adhesive layer is formed vertically around the insulating film layer. A laminate obtained by laminating or a liquid resin coated and heated and cross-linked may be used. Further, a plurality of resin insulating layers 4 and wiring conductor layers 5 may be formed.

本発明の多層配線基板の実施の形態の一例を示す断面図である。It is sectional drawing which shows an example of embodiment of the multilayer wiring board of this invention. 図1の多層配線基板における導体層の周辺の状態を示す要部拡大断面図である。FIG. 2 is an enlarged cross-sectional view of a main part showing a state around a conductor layer in the multilayer wiring board of FIG. 1. 本発明の多層配線基板の実施の形態の他の例における導体層の周辺の状態を示す要部拡大断面図である。It is a principal part expanded sectional view which shows the state of the periphery of the conductor layer in the other example of embodiment of the multilayer wiring board of this invention. 従来の多層配線基板の断面図である。It is sectional drawing of the conventional multilayer wiring board.

符号の説明Explanation of symbols

1・・・・配線基板
2・・・・絶縁基体
3・・・・導体層
4・・・・樹脂絶縁層
5・・・・配線導体層
6・・・・貫通導体
7・・・・主導体部
8・・・・下地導体部
9・・・・貫通孔
10・・・樹脂被覆層
DESCRIPTION OF SYMBOLS 1 ... Wiring board 2 ... Insulating base 3 ... Conductor layer 4 ... Resin insulating layer 5 ... Wiring conductor layer 6 ... Penetration conductor 7 ... Lead Body part 8 ... Underly conductor part 9 ... Through hole 10 ... Resin coating layer

Claims (2)

上面に導体層を有する配線基板上に、樹脂絶縁層と配線導体層とを交互に積層するとともに、上下に位置する前記配線導体層と前記導体層とをそれらの間の前記樹脂絶縁層に形成した貫通導体を介して電気的に接続して成る多層配線基板において、前記配線基板を、絶縁基体と、その上面に直接密着された貫通孔を有する樹脂被覆層と、前記貫通孔を埋めるように設けられた前記導体層とで構成しており、前記導体層を、主導体部と、その側面および底面の全面を連続して覆う前記主導体部よりも熱膨張係数の小さい下地導体部とで構成し、該下地導体部は、その下面が前記絶縁基体の上面よりも内部に埋入しており、前記樹脂絶縁層と前記絶縁基体との界面、および前記下地導体部と前記絶縁基体との界面を同一平面上からずらしたことを特徴とする多層配線基板。 A resin insulating layer and a wiring conductor layer are alternately laminated on a wiring board having a conductor layer on the upper surface, and the wiring conductor layer and the conductor layer positioned above and below are formed in the resin insulating layer therebetween. In the multilayer wiring board formed by electrical connection through the penetrating conductor, the wiring board is filled with the insulating base, a resin coating layer having a through hole in close contact with the upper surface thereof, and the through hole filled. The conductor layer is provided, and the conductor layer is composed of a main conductor portion and a base conductor portion having a smaller coefficient of thermal expansion than the main conductor portion that continuously covers the entire side surface and bottom surface of the main conductor portion. And the lower surface of the base conductor portion is embedded inside the upper surface of the insulating base, the interface between the resin insulating layer and the insulating base, and the base conductor and the insulating base. that shifted from an interface on the same plane Multilayer wiring substrate having a butterfly. 前記下地導体部は、前記導体層の下面側の部位が前記導体層の側面側の部位よりも厚いことを特徴とする請求項1記載の多層配線基板。   2. The multilayer wiring board according to claim 1, wherein the base conductor portion is thicker at a lower surface side of the conductor layer than at a side surface of the conductor layer.
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JPH06505833A (en) * 1991-02-11 1994-06-30 ザ、ボーイング、カンパニー Integrated circuit board with multichip module and planarized patterned surface
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JPH0383398A (en) * 1989-08-26 1991-04-09 Shinko Electric Ind Co Ltd Circuit board and manufacture thereof
JPH03297191A (en) * 1990-02-27 1991-12-27 Sumitomo Electric Ind Ltd Wiring board and manufacture thereof
JPH06505833A (en) * 1991-02-11 1994-06-30 ザ、ボーイング、カンパニー Integrated circuit board with multichip module and planarized patterned surface
JPH0653332A (en) * 1992-07-28 1994-02-25 Sony Corp Forming method for metallic plug
JPH06112630A (en) * 1992-09-25 1994-04-22 Nippon Mektron Ltd Method of forming circuit wiring pattern
JP2002246744A (en) * 2001-02-20 2002-08-30 Nec Corp Conductor-forming method, and multilayer wiring board manufacturing method using the same
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