JP2011222928A - Wiring board and probe card - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high-reliability wiring board which permits surface wirings and surface via conductors to be connected surely even for surface wirings in reduced size and is capable of element inspection at higher speed and of high-speed inspection owing to reduced stray capacitance.SOLUTION: The wiring board comprises an insulating base 1 composed of a plurality of ceramic insulation layers 1a which are laminated on top of another, external electrodes 2 formed on underside of the insulating base 1, and internal wirings 3 including via conductors connected to the external electrodes 2 and led out to the top face of the insulating base 1. In the wiring board, surface via conductors 3a whose top faces are exposed to the top face of the insulating base 1 penetrating through an uppermost insulating layer 1a of the internal wirings 3 are disposed in radial directions from the center of a wiring substrate 4 as viewed from above. Should the surface via conductors 3a be displaced, because there exist portions extending in a direction opposite the displacement direction, sure connections with the surface via conductors 3a can be expected even for a surface wiring 5 in reduced size, and a stray capacitance of the surface wiring 5 can be reduced.

Description

  The present invention relates to a wiring board used for a probe card and a probe card using the wiring board.

  In recent years, along with miniaturization and higher density of electronic devices, not only semiconductor elements used in electronic devices but also packages, wiring boards on which the semiconductor elements are mounted, or electrical inspection of semiconductor elements The probe card is also required to have finer wiring and higher density. In addition, it is required that a high-frequency signal can be transmitted with an increase in the speed of the semiconductor element, and the probe card is also required to have excellent flatness.

  In order to meet such demands, there is a wiring board in which a thin film conductor is formed on a ceramic substrate flattened by polishing as a substrate that can be finely patterned and is excellent in flatness and high-frequency characteristics. A probe card is formed by forming probe pins on the thin film conductor. When the insulating resin layer and the thin film wiring layer are further laminated on the surface wiring on the wiring board to form a resin wiring layer, a finer wiring can be formed to reduce the distance between the probe pins. is there. FIG. 12 (a) is a top view showing an example of a wiring board on which a conventional thin film conductor is formed, and FIG. 12 (b) is a cross-sectional view taken along the line AA. In the conventional wiring board 14, the surface wiring 15 is formed as a thin film on the exposed portion of the surface via conductor 13a on the upper surface of the wiring board 14 made of a plurality of insulating layers 11a made of ceramic, the internal wiring 13 and the external electrode 12. It was made by forming.

At this time, since the wiring substrate 14 undergoes dimensional variations due to sintering shrinkage variations during firing, which is the manufacturing process thereof, the position of the surface via conductor 13a exposed on the wiring substrate 14 flattened by polishing is also the same. There was variation. Therefore, when forming the surface wiring 15 connected to the surface via conductor 13a of the wiring board 14, it is necessary to increase the size in consideration of the shrinkage variation of the wiring board 14. For example, if there is no dimensional variation, if the diameter of the exposed portion of the surface via conductor 13a of the wiring board 14 is 100 μm, the misalignment when forming the surface wiring 15 is ± 50 μm. Then, the diameter of the surface wiring 15 is 200μm
By doing so, all the exposed portions of the surface via conductor 13a are connected to the surface wiring 15. On the other hand, when the dimensional variation of the wiring board 14 occurs about ± 0.2%, the surface via conductors 3a are arranged vertically and horizontally at the center of the wiring board 14, and the surface via conductors 13a located at the outermost periphery are arranged. If the center is a square of 200 mm square, the surface via conductor 13a located at the corner farthest from the center of the wiring board 14 has a positional deviation of about ± 280 μm with respect to the center of the wiring board 14 May occur. Considering ± 50 μm, which is a misalignment when forming the surface wiring 15, when the diameter of the exposed portion of the surface via conductor 13 a is also 100 μm, the diameter of the surface wiring 15 is about 760 μm. It is necessary to enlarge it.

  In addition, the surface wiring is formed by a connection pad connected to the surface via conductor, a portion to which the conductor bump serving as a probe pin is connected, and a lead wire between them, and the connection pad is gradually stepped away from the center of the wiring board. There is a wiring board in which the size of the connection pad is further increased, or the shape of the connection pad is an ellipse having a major axis in the direction of radiation from the center of the wiring board (see, for example, Patent Documents 1 to 3). The direction of radiation from the center of the ceramic wiring board is the direction of displacement of the surface via conductor, and an elliptical connection pad having a major axis in this direction, that is, the connection pad is enlarged in the direction of displacement It is.

JP 2002-289657 A JP 2002-350466 A JP 2002-373924 A

  However, when the surface wiring 15 on the surface of the wiring board 14 becomes large, stray capacitance tends to occur between the surface wiring 15 and the internal wiring 13 of the wiring board 14 and the thin film wiring inside the resin wiring layer. If the stray capacitance is large, the rise of the signal flowing through the wiring board is deteriorated, so that the signal cannot be transmitted at high speed, and the speeding up of the inspection is hindered. In addition, it may not be possible to inspect elements that operate with high-speed signals. And the size of the semiconductor wafer tends to become larger, and if the probe card is made larger in accordance with the size of the wafer and the wiring board for the probe card is made larger, the influence due to the shrinkage variation of the wiring board 14 becomes larger. Therefore, the above problem becomes more prominent.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to reduce the size of the wiring substrate and the surface wiring that can reliably connect the surface wiring and the surface via conductor even if the surface wiring is reduced. Accordingly, an object of the present invention is to provide a probe card wiring board for a small stray capacitance and a probe card capable of inspecting a higher-speed element and inspecting at a higher speed.

  The wiring board of the present invention is led out to the upper surface of the insulating substrate connected to the external electrode, an insulating substrate in which a plurality of insulating layers made of ceramics are laminated, an external electrode formed on the lower surface of the insulating substrate, The surface via conductor having an internal wiring including a via conductor, the upper surface of the internal wiring penetrating through the uppermost insulating layer and exposed at the upper surface of the insulating base, is viewed from above. The shape is along the direction of radiation from the center of the wiring board.

  The wiring board of the present invention is characterized in that, in the above configuration, a surface wiring made of a thin film is connected to the surface via conductor on the upper surface of the insulating base.

  In the wiring board according to the present invention, in the above configuration, the surface via conductors are alternately arranged along the radiation so as to sandwich the radiation, and the surface wiring has a protruding portion protruding on the radiation. It has the part which is.

  The probe card of the present invention comprises the wiring board of the present invention configured as described above and probe pins connected to the surface wiring on the upper surface of the wiring board.

  According to the wiring board of the present invention, since the surface via conductor has a shape along the direction of radiation from the center of the wiring board in a top view, the shape of the surface via conductor is compared with a normal circular surface via conductor. When the surface via conductor is displaced to the outside of the wiring board, there is a portion extending in the inner direction, and when the surface via conductor is displaced to the inside of the wiring board, the portion extends to the outer side. Since the portion has a shape, the wiring substrate can be reliably connected to the surface wiring and the surface via conductor even if the size of the surface wiring is reduced, and the floating capacitance of the surface wiring can be reduced.

  According to the wiring board of the present invention, in the above configuration, the surface wiring made of a thin film is connected to the surface via conductor on the upper surface of the insulating base. The wiring board has a small stray capacitance and can transmit signals at high speed.

  According to the wiring board of the present invention, in the above configuration, the surface via conductors are alternately arranged along the radiation so as to sandwich the radiation, and the surface wiring has a shape having a protruding portion protruding on the radiation. Since the distance between the surface wirings can be reduced, the wiring substrate having a high surface wiring density can be obtained.

  In addition, since the probe card of the present invention includes the wiring board of the present invention having the above-described configuration and the probe pin connected to the surface wiring on the upper surface of the wiring board, the floating capacitance of the surface wiring is small. The probe card can be inspected or can inspect an element that operates with a higher-speed signal.

(A) is a top view which shows an example of embodiment of the wiring board of this invention, (b) is sectional drawing in the AA of (a). (A)-(e) is a top view which shows an example of the surface via conductor of the wiring board of this invention, respectively. (A) is a top view which shows the other example of embodiment of the wiring board of this invention, (b) is sectional drawing in the AA of (a). (A) is a top view which shows the other example of embodiment of the wiring board of this invention, (b) is sectional drawing in the AA of (a). (A) is a top view which shows the other example of embodiment of the wiring board of this invention, (b) is sectional drawing in the AA of (a). (A) is a top view which shows the other example of embodiment of the wiring board of this invention, (b) is sectional drawing in the AA of (a). (A) is a top view which shows another example of embodiment of the probe card | curd of this invention, (b) is sectional drawing in the AA of (a). (A) is a top view which shows the other example of embodiment of the wiring board of this invention, (b) is sectional drawing in the AA of (a). (A) is a top view which expands and shows the principal part of the conventional wiring board, (b) is a top view which expands and shows the principal part of the other example of embodiment of the wiring board of this invention. . (A) is a top view which shows the other example of embodiment of the wiring board of this invention, (b) is sectional drawing in the AA of (a). (A) is the principal part of the other example of embodiment of the wiring board of this invention, (b) is a top view which expands and shows the B section of Fig.10 (a), respectively. (A) is a top view which shows another example of the conventional wiring board, (b) is sectional drawing in the AA of (a).

  A wiring board of the present invention and a probe card using the wiring board will be described in detail with reference to the accompanying drawings. 1 to 11, 1 is an insulating substrate, 1 a is an insulating layer, 2 is an external electrode, 3 is an internal wiring, 3 a is a surface via conductor, 4 is a wiring board, 5 is a surface wiring, and 5 a is a protrusion of the surface wiring 5. , 6 is a resin insulating layer, 7 is a fine wiring, and 8 is a probe pin.

  In the example shown in FIG. 1, seven surface via conductors 3 a exposed on the upper surface of the wiring board 4 are arranged vertically and horizontally, and the insulating layer 1 a of the wiring board 4 is simplified to three layers. 4 shows an example in which the surface wiring 5 is formed of a thin film so as to be connected to the surface via conductor 3a on the upper surface of the wiring substrate 4 shown in FIG. Depending on the number of semiconductor elements on the wafer to be inspected by the probe card and the number of terminals of the semiconductor elements and their arrangement, the surface wiring 5, the internal wiring 3 including the surface via conductor 3a, the external electrode 2 and the insulating layer 1a Size and arrangement are set.

  1 and 3, the wiring board of the present invention includes an insulating substrate 1 in which a plurality of insulating layers 1a made of ceramics are laminated, an external electrode 2 formed on the lower surface of the insulating substrate 1, A wiring board having an internal wiring 3 including a via conductor, which is connected to the external electrode 2 and led out to the upper surface of the insulating base 1, and penetrates through the uppermost insulating layer 1 a of the internal wiring 3 and has an upper end surface Is characterized in that the surface via conductor 3a exposed on the upper surface of the insulating substrate 1 has a shape along the direction of radiation from the center of the wiring board 4 in a top view. Due to such a configuration, the shape of the surface via conductor 3a extends inward when the surface via conductor 3a is displaced to the outside of the wiring board 4 as compared with a normal circular surface via conductor. If the surface via conductor 3a is displaced to the inside of the wiring board 4, the surface extending portion is present in the outer direction. The wiring 5 and the surface via conductor 3a can be reliably connected to each other, and the wiring substrate capable of reducing the stray capacitance of the surface wiring 5 is obtained.

  Further, as in the examples shown in FIGS. 4 to 6, the wiring board of the present invention has the above configuration in which the surface wiring 5 made of a thin film is connected to the surface via conductor 3 a on the upper surface of the insulating base 1. By using the small surface wiring 5, the stray capacitance of the surface wiring 5 is small, and a wiring board capable of transmitting signals at high speed is obtained.

  The wiring substrate 4 has an insulating substrate 1 and an internal wiring 3 including an external electrode 2 formed on the surface thereof and a surface via conductor 3a formed therein. As shown in the example shown in FIG. 1, the insulating base 1 is composed of a plurality of ceramic insulating layers 1 a and the internal wiring 3 is developed, whereby the interval between the external electrodes 2 on the lower surface of the wiring board 4 can be increased. .

  The external electrode 2 on the lower surface of the wiring board 4 is for connecting the wiring board 4 to an external circuit. The internal wiring 3 is for electrically connecting the external electrode 2 on the lower surface of the wiring board 4 and the surface wiring 5 on the upper surface, and the internal wiring layer between the insulating layers 1a and 1a and the insulating layer 1a are connected to each other. There are via conductors such as an internal via layer that penetrates and connects the internal wiring layer and between the internal wiring layer and the external electrode 2 and a surface via conductor 3 a that connects the internal wiring layer and the surface wiring 5.

The insulating layer 1a of the insulating substrate 1 includes an aluminum oxide (alumina: Al ₂ O ₃ ) sintered body, an aluminum nitride (AlN) sintered body, a silicon carbide (SiC) sintered body, a mullite sintered body, It consists of ceramics such as glass ceramics. When used for a probe card, an aluminum oxide (Al ₂ O ₃ ) sintered body, a mullite (3Al ₂ O ₃ .2SiO ₂ ) sintered body having a thermal expansion coefficient close to that of silicon (Si) forming a wafer, or Glass ceramics are preferred. When the insulating layer 1a is made of such ceramics, when the probe pins are formed on the wiring board 4, the wafer and the wiring board 4 joined together with the probe pins, which are added to the probe pins and the joints of the probe pins. This is preferable because the thermal stress due to the difference in thermal expansion from the (insulating base 1) becomes relatively small. Further, when used as a probe card, it is possible to effectively prevent thermal deformation with respect to a thermal load when measuring electrical characteristics of the semiconductor element.

  The internal wiring 3 and the external electrode 2 including the surface via conductor 3a of the wiring substrate 4 are formed by simultaneous firing with the insulating layer 1a, tungsten (W), molybdenum (Mo), molybdenum-manganese (Mo-Mn) alloy, It is made of metallization mainly composed of metal such as silver (Ag), copper (Cu), gold (Au), silver-palladium (Pd) alloy.

  For example, when the insulating layer 1a is formed of an aluminum oxide sintered body, the wiring substrate 4 is manufactured by the following method. First, an appropriate organic binder and solvent are added to and mixed with raw material powders of aluminum oxide, silicon oxide, magnesium oxide and calcium oxide to form a slurry, which is formed into a sheet by a doctor blade method or the like, and the insulating layer 1a A plurality of ceramic green sheets are produced.

  Next, through holes are formed by punching or laser processing using a mold or the like at predetermined positions where via conductors of the ceramic green sheet are formed, and the through holes are filled with a conductive paste. Further, a conductive paste layer to be the internal wiring layer or the external electrode 2 is formed to a thickness of 10 to 20 μm at a predetermined position of the ceramic green sheet by a screen printing method or the like. The conductor paste is produced by kneading a metal powder having a high melting point such as tungsten, molybdenum, molybdenum-manganese alloy, an appropriate resin binder, and a solvent. When the through hole is formed by laser processing, it is not necessary to have a shape considering durability unlike the processing by a mold, and it is preferable because an optimal shape can be determined according to the application.

  Finally, these ceramic green sheets are superposed and pressure-bonded to produce a laminate, and the laminate is fired at a high temperature of about 1500 ° C. to 1600 ° C., thereby producing the wiring board 4.

  If the insulating layer 1a is made of glass ceramics, the ceramic green sheet does not shrink at the temperature at which the ceramic green sheet is sintered. Sintering shrinkage in the direction of the laminated surface of the ceramic green sheets is suppressed by the green sheet, and the wiring board 4 with small shrinkage variation is obtained. This reduces the positional variation of the surface via conductor 3a, which is preferable because the surface wiring 5 can be further downsized and formed with high density.

  It is important that the surface via conductor 3a has a shape along the direction of radiation from the center of the wiring board 4 in a top view. The shape along the direction of radiation is a shape in which the length in the direction of radiation is larger than the length (width) in the direction perpendicular to the direction of radiation, for example, FIG. As shown in (e). A two-dot chain line in each of FIGS. 2A to 2E indicates radiation from the center of the wiring board 4. In the example shown in FIG. 2A, the shape of the surface via conductor 3a is an ellipse whose major axis direction is along the direction of radiation from the center of the wiring board 4, and in the example shown in FIG. In the example shown in FIG. 2 (c), two semicircles are connected by a square having a width of a semicircle diameter (rectangular in FIG. 2 (c)). In the example shown in FIG. 2D, the shape is a rectangle with rounded corners (R is formed at the corner), and in the example shown in FIG. 2E, the shape is a rectangle. If the surface via conductor 3a has the same width, the shape shown in FIGS. 2B to 2E has a larger cross-sectional area of the surface via conductor 3a than the ellipse shown in FIG. In addition, when the surface wiring 5 is connected to the end portion of the surface via conductor 3a, the connection area is large and the electrical resistance of the connection portion is reduced. In the case of the rectangle shown in FIG. 2 (e), the cross-sectional area is the largest and the electric resistance is the smallest. However, when the through hole is formed in the ceramic green sheet, a crack may start from the corner portion. Since there is no portion, the filling property of the conductor paste into the through-hole is good, and a shape with rounded corners as shown in FIGS. 2 (c) and 2 (d) is preferable. Since the surface via conductor 3a of the wiring board of the present invention is larger than the normal surface via conductor, the amount of the conductive paste filled in the through hole of the ceramic green sheet is large, and the weight may drop out of the through hole. However, in the case of the shape as in the example shown in FIG. 2B, the area where the conductive paste and the ceramic green sheet are in contact with each other is larger than in the examples shown in FIGS. 2C to 2E. It is preferable because the conductor paste can be prevented from falling off.

  Since the positional deviation of the surface via conductor 13a increases in proportion to the distance from the center of the wiring board 4, the length along the radiation direction of the surface via conductor 3a is, as in the example shown in FIG. By increasing the distance in proportion to the distance from the center of the wiring board 4 in a top view, the surface via conductor 13a on the side closer to the center of the wiring board 4 can be made smaller, so the surface via conductor 13a and the surface wiring 5 Can be formed at a higher density.

The surface wiring 5 on the upper surface of the wiring substrate 4 is made of a thin film such as a vapor deposition method, a sputtering method, or an ion plating method after the wiring substrate 4 is produced as described above and flattened by polishing the upper surface. It is formed by a forming method. Similarly, the external electrode 2 on the lower surface may be formed by a thin film forming method. Specifically, a base conductor layer made of, for example, a chromium (Cr) -Cu alloy layer or a titanium (Ti) -Cu alloy layer having a thickness of about 0.1 μm to 3 μm is formed on the entire upper surface of the wiring board 4. A resist film having a pattern-shaped opening of the connection wiring 6 is formed thereon, and a main conductor layer having a thickness of about 2 μm to 10 μm made of a metal such as copper or gold is formed by plating using the resist film as a mask. To do. Then, the resist film is peeled and removed, and the exposed portion of the underlying conductor layer is removed by etching, whereby the surface wiring 5 is formed. A nickel or gold plating layer may be further formed on the surface by plating.

  Since the positional deviation of the surface via conductor 3a occurs in a direction along the radiation from the center of the wiring substrate 4, the surface wiring 5 may be enlarged only in this direction in order to absorb the positional deviation. The surface wiring 5 is not made circular as in the example shown in FIG. 4, but the surface wiring 5 is exposed to radiation from the center of the wiring board in the top view like the surface via conductor 3a as in the example shown in FIG. The shape along the direction is preferable because the area of the surface wiring 5 can be made smaller and the stray capacitance can be made smaller than when the surface wiring 5 is formed in a circle. In this case, the width of the surface wiring 5 is preferably set larger than the width of the surface via conductor 3a in consideration of a positional shift that occurs when the surface wiring 5 is formed.

  Further, since the positional deviation of the surface via conductor 3a increases in proportion to the distance from the center of the wiring substrate 4, it follows the radiation direction of the surface via conductor 3a and the surface wiring 5 as in the example shown in FIG. The length may be increased in proportion to the distance from the center of the wiring board 4 in a top view. In this case, as in the example shown in FIG. 5, the pitch of the surface wiring 5 (as compared to the case where the lengths of all the surface via conductors 3a and the surface wiring 5 are made equal to the maximum length) ( Since the distance between the centers can be reduced, the surface wiring 5 can be formed at a higher density, which is preferable.

  In the example shown in FIG. 8, a resin wiring layer comprising a resin insulating layer 6 and fine wiring 7 is further formed on the upper surface of the wiring board 4 as described above. For example, a conventional build is formed on the wiring board 4. This is an example in which the resin insulating layer 6 and the fine wiring 7 are formed by the up method. By forming such a resin wiring layer, the wiring interval can be further reduced, and by connecting the probe pin 8 to the fine wiring 7 on the uppermost surface of the resin wiring layer, the interval between the probe pins 8 is reduced. A probe card capable of inspecting finer semiconductor elements can be obtained.

  As in the example shown in FIG. 8, the resin wiring layer on the wiring substrate 4 is formed by alternately laminating the resin insulating layers 6 and the fine wiring layers of the fine wiring 7, and the upper and lower fine wiring layers and between the fine wiring layers and the wiring. The surface wiring 5 on the upper surface of the substrate 4 is connected by a fine via conductor that penetrates the resin insulating layer 6. In the example shown in FIG. 8, the insulating resin layer 6 has two layers, but is set according to the number of semiconductor elements on the wafer to be inspected by the probe card, the number of terminals of the semiconductor elements, and their arrangement.

  The resin insulation layer 6 of the resin wiring layer is made of polyimide resin, polyphenylene sulfide resin, wholly aromatic polyester resin, BCB (benzocyclobutene) resin, epoxy resin, bismaleimide triazine resin, polyphenylene ether resin, polyquinoline resin, fluorine resin, etc. It is made of an insulating resin.

When the resin insulating layer 6 of the resin wiring layer is made of, for example, a polyimide resin, a varnish-like polyimide precursor is applied to the upper surface of the wiring substrate 4 by a spin coating method, a die coating method, a curtain coating method, a printing method or the like. Then, it is hardened with heat of about 400 ° C. to be converted into a polyimide, thereby forming a thickness of about 10 μm to 50 μm. Alternatively, a resin adhesive such as a siloxane-modified polyamideimide resin, a siloxane-modified polyimide resin, a polyimide resin, a bismaleimide triazine resin, or an epoxy resin is dried on the lower surface of a film of about 10 μm to 50 μm made of the above resin with a dry thickness of about 5 μm to 20 μm. An adhesive layer is formed by applying and drying by a doctor blade method or the like, and this is formed by stacking the adhesive layer on the wiring substrate 4 and performing heat press.

The fine wiring layer of the fine wiring 7 is formed by first forming a thin film forming method such as a vapor deposition method, a sputtering method, or an ion plating method on the entire main surface of the resin insulating layer 6 to 0.1 μm to 3 μm.
A base conductor layer made of, for example, a chromium (Cr) -Cu alloy layer or a titanium (Ti) -Cu alloy layer is formed. Next, a resist film having an opening in a pattern shape of a fine wiring layer is formed on the underlying conductor layer, and the resist film is used as a mask and made of a metal having a low electrical resistance such as copper or gold by plating or the like. A main conductor layer having a thickness of about 10 μm is formed. Then, the resist film is peeled and removed, and the exposed portion of the underlying conductor layer is removed by etching, whereby a fine wiring layer is formed. Alternatively, the fine wiring layer is embedded in the resin insulating layer 6 by filling the concave portion in the shape of the fine wiring layer formed using RIE (Reactive Ion Etching) or the like. It may be shaped. Since the probe pin 8 is connected to the fine wiring layer on the uppermost resin insulating layer 6, a nickel or gold plating layer may be formed by a plating method.

  Next, the resin insulating layer 6 is further formed on the resin insulating layer 6 on which the fine wiring layer is formed. As a method of forming the resin insulating layer 6, either the above-described method of applying a varnish-like resin or the method of forming an adhesive layer on a resin film and performing heat pressing may be used. In any method, a plurality of resin insulation layers 6 are formed by forming a resin wiring layer 7 including a via conductor in the resin insulation layer 6 and repeating the above steps as many times as necessary. In the method using a resin for a film, a plurality of films can be pressed at once, and it is not necessary to apply and cure for each layer, so that the manufacturing process can be shortened.

Since a fine via conductor that penetrates through the resin insulation layer 6 is formed in the resin insulation layer 6, for example, a through hole having a diameter of 20 μm to 100 μm is formed in this portion. This through hole is formed by forming a resist film having an opening in the resin insulating layer 6 and etching the resin insulating layer 6 located in the opening of the resist film, or directly using a laser. It is formed by removing a part of. An excimer laser, a CO ₂ laser, or the like can be used as the laser at this time. It is desirable to leave. Alternatively, if the method of forming the resin insulating layer 6 is a method of applying a varnish-like resin, the photosensitive resin is used to cure other than the portion where the through hole is formed by exposure, for example, The resin insulating layer 6 having a through hole may be formed by removing the portion of the resin where the is formed by etching.

  The fine via conductor is shown in FIG. 8 by filling the through hole of the resin insulating layer 6 with a conductive paste mainly composed of metal powder such as copper and resin before forming the fine wiring layer, for example. As in the example, a through hole filled with a conductor is formed. Or when forming a fine wiring layer, you may form simultaneously with a fine wiring layer by forming a base conductor layer and a main conductor layer also in the inner surface of a through-hole. In this case, the fine via conductor is formed by being attached to the inner surface of the through hole of the resin insulating layer 6, and the through hole is not filled with the conductor. When the plating thickness at the time of forming the main conductor layer is increased, the through hole can be filled with the conductor as in the example shown in FIG. When the fine via conductor is formed at the same time as the fine wiring layer, the through hole is larger on the upper surface side of the resin insulating layer 6 so that the base conductor layer can be satisfactorily formed by the thin film on the inner surface of the through hole. Such a shape is preferable. The through hole having such a shape is controlled by etching conditions when the through hole is formed by etching, by adjusting the output of the laser when the through hole is formed by a laser, or by exposure condition or etching when using a photosensitive resin. It can be formed depending on conditions.

  The resin wiring layer is formed on the wiring substrate 4 by repeating the formation of the resin insulating layer 6 and the fine wiring 7 (the fine via conductor and the fine wiring layer) as many times as necessary.

  FIGS. 9 (a) and 9 (b) are enlarged top views showing main portions of the conventional wiring board and the wiring board of the present invention, respectively, but the overlapping of the surface wiring 5 and the surface via conductor 3a. As can be seen, the surface wiring is shown through.

In the case of a wiring board in which the surface via conductors 3a are arranged vertically and horizontally in the center and the center of the surface via conductor 3a located at the outermost periphery is connected to form a 200 mm square, the example shown in FIG. In the conventional wiring substrate 14, when the firing shrinkage variation of 0.2% occurs, the surface via conductor 13 a (exposed on the upper surface) is exposed at the corner where the distance from the center of the wiring substrate 14 is large and the positional displacement due to the shrinkage variation is the largest. The position variation (U shown in FIG. 9A) with respect to the center of the wiring board 14 occurs about ± 280 μm. If the diameter of the surface via conductor 13a (Dv shown in FIG. 9 (a)) is 100 μm, the surface wiring 15 can be formed as a circle having a diameter of 660 μm (circle indicated by a broken line in FIG. 9 (a)). It is possible to connect the surface via conductor 13a at a shifted position as shown by a two-dot chain line in (a) and the entire upper end surface of the surface via conductor 13a. Normally, the surface wiring 15 on the surface of the wiring board 14 is also misaligned in the formation process. Therefore, if the positional misalignment of the surface wiring 15 (S shown in FIG. 9A) is ± 50 μm, If the outer diameter (Dp = (U + S) × 2 + Dv) of the surface wiring 15 is 760 μm, the surface via conductor 13a is within the diameter of the surface wiring 15 and is connected to the entire upper end surface of the surface via conductor 13a. become. At this time, the area of the surface wiring 15 is about 0.454 mm ² .

On the other hand, in the wiring board 4 of the present invention as in the example shown in FIG. 4, the shape of the surface via conductor 3a is a shape along the direction of radiation from the center of the wiring board 4 in a top view, for example, FIG. The length in the direction of the radiation from the center of the wiring board 4 (Lv shown in FIG. 9B) is an elliptical shape in which two semicircles as in the example shown in FIG. 430μm, width (Figure 9 (b)
(Wv shown in FIG. 9) is 100 μm (when two semicircles having a radius of 50 μm are connected by a rectangle having a width of 100 μm and a length of 330 μm), the surface wiring 5 is circular with a diameter of 330 μm (FIG. 9B). ) Is a circle indicated by a broken line), the surface via conductor 3a at a shifted position as shown by a two-dot chain line in FIG. 9B overlaps the surface wiring 5 by 100 μm from the end of the surface via conductor 3a. The connection can be made in the same area as the conventional wiring substrate shown in FIG. Similarly, if the displacement of the surface wiring 5 (S shown in FIG. 9B) is ± 50 μm, the outer diameter of the surface wiring 5 (Dp shown in FIG. 9B) may be set to 430 μm. At this time, the area of the surface wiring 5 is about 0.145 mm ^2, which is about 32% of the area of the surface wiring 15 of the conventional wiring board described above.

Furthermore, when the shape of the surface wiring 5 is a shape along the direction of the radiation from the center of the wiring board 4 in a top view like the surface via conductor 3a as in the example shown in FIG. Major axis 430
In the case of an ellipse with a diameter of 300 μm and a short diameter of 300 μm (an ellipse with two semicircles with a radius of 150 μm and a rectangle with a width of 300 μm and a length of 130 μm), the area of the surface wiring 5 is about 0.110 mm ² Thus, the area can be further reduced.

If the shape and dimensions of the surface wiring 5 are the same as those of the conventional wiring board described above, the spacing between the adjacent surface wirings 15 and 15 is secured in order to ensure insulation between the adjacent surface wirings 15 and 15. Is 100 μm, the pitch of the surface wiring 15 (distance between the centers of the surface wiring 15) is Dp + 100 μm = 860 μm. In the case of the wiring board of the present invention having the surface via conductor 3 and the surface wiring 5 having the shape and dimensions as described above, the surface via conductor 3a protrudes from the surface wiring 5 in a plan view when there is a positional deviation. Therefore, the interval between the surface wiring 5 and the surface via conductor 3 connected to the surface wiring 5 adjacent in the radiation direction is set to 100 μm as described above. Further, the length that the surface via conductor 3a protrudes from the surface wiring 5 (Lv ′ shown in FIG. 9B) is the length that overlaps the surface wiring 5 from the length Lv of the surface via conductor 3a (the surface via conductor described above). This is the length obtained by subtracting 100 μm + S) from the end of 3a. The pitch of the surface wirings 5 (distance between the centers of the surface wirings 5) is Dp + Lv ′ + 100 μm = 810 μm, which can be 50 μm smaller than that of the prior art, and the wiring substrate 4 having a high wiring density can be obtained.

  The surface wiring 5 is arranged according to the arrangement of the semiconductor elements on the wafer to be inspected by the probe card and the terminals of the semiconductor elements mounted on the wiring board, and may be arranged at equal intervals vertically and horizontally. In many cases, as in the examples shown in FIGS. 4 to 6, when the outermost peripheral wirings of the arrayed surface wirings 5 are connected, a rectangular shape is often obtained. The plan view of the wiring board 4 (insulating base 1) is slightly larger than this square. If the surface via conductors 3a arranged in the square have a shape along the direction of radiation from the center of the wiring board 4 in a top view, the center of the wiring board 4 and the side of the square (wiring board) The distance between the surface via conductors 3a arranged along the line connecting the center of the outer periphery 4 and the distance between the surface wirings 5 connected thereto is the smallest.

  In the example shown in FIG. 10 and FIG. 11B, the wiring board 4 has the surface via conductor 3a sandwiching the radiation R along the radiation from the center of the wiring board 4 (dashed line R shown in FIG. 11B). The surface wiring 5 has a portion having a shape having a protruding portion 5a protruding on the radiation R. That is, a part of the surface via conductor 3a extends from the center of the wiring board 4 to the outside along the line R connecting the center of the wiring board 4 and the center of the rectangular side of the radiation from the center of the wiring board 4. They are arranged alternately with the radiation R in between. The surface wiring 5 has a protruding portion protruding on the radiation R. In this way, the distance between the surface wirings 5 can be reduced, so that the wiring substrate 4 having a high wiring density of the surface wirings 5 is obtained.

  FIG. 11B is an enlarged top view showing a portion B of FIG. FIG. 11A is an enlarged top view showing a portion B of FIG. 1, and shows a state in which the surface wiring 5 as in the example shown in FIG. 5 is formed. As shown in the example shown in FIG. 11A, the surface via conductors 3 (and the surface wiring 5) are arranged on the radiation R from the center of the wiring board 4 in the portion B of FIG. On the other hand, in the part B of FIG. 10, the surface via conductor 3 and the surface wiring 5 are arranged along the radiation R from the center of the wiring substrate 4 as in the example shown in FIG. 4 are arranged alternately with the radiation R sandwiched from the center to the outside. The pitch P of the surface wiring 5 in the case of the example shown in FIG. 11A is P = Lp + Lv ′ + G as described above. G is a distance between the surface wiring 5 and the surface via conductor 3a connected to the surface wiring 5 adjacent in the radiation R direction. On the other hand, in the example shown in FIG. 10 and FIG. 11B, the surface via conductor 3a adjacent in the direction of the radiation R is not arranged on the same straight line. Since the protruding portion and the adjacent surface wiring 5 do not contact each other, the surface via conductor 3a and the surface wiring 5 are overlapped in the radiation R direction (the overlapping length is Lo shown in FIG. 11B). And the pitch P of the surface wiring 5 can be reduced.

  In the case of this example, the center part of the surface wiring 5 which does not have the protrusion part 5a and the protrusion part 5a of the surface wiring 5 which has the protrusion part 5a are arranged at equal intervals vertically and horizontally. When the probe pin 8 is connected to the surface wiring 5 of the wiring board 4 to produce a probe card, the center of the surface wiring 5 that does not have the protruding portion 5a and the protrusion of the surface wiring 5 that has the protruding portion 5a. The probe pin 8 is connected to the part 5a.

Further, the shape of the surface wiring 5 in this example is a convex shape (T-shape) in which two pieces having different lengths in the radiation R direction are connected as in the examples shown in FIGS. 10 and 11B. ). In other words, the protrusion 5a having a shorter length in the radiation R direction is connected to the portion connected to the surface via conductor 3a. The portion connected to the surface via conductor 3a has the same shape as that of the surface via conductor 3a, and is slightly larger than the surface via conductor 3a in consideration of the positional deviation that occurs when the surface wiring 5 is formed. is there. For example, the position accuracy of the surface wiring 5 is ± 100μ
If m, it is 200 μm larger than the width of the surface via conductor 3a.

What is necessary is just to set the magnitude | size of the protrusion part 5a according to the magnitude | size of the probe pin 8 connected to the protrusion part 5a, for example. The width of the protruding portion 5a (the length of the protruding portion 5a in the direction parallel to the radiation R) may be, for example, about 40 to 80 μm if a probe pin is connected. In addition, if the length of the protruding portion 5a (the length of the protruding portion 5a in the direction perpendicular to the radiation R) is smaller than 50 μm, the distance between the surface wirings 5 is reduced when the protruding portion 5a is disposed on the radiation R. Since the insulation between the surface terminals 5 may be too low, the length of the protruding portion 5a is preferably 50 μm or more. If the length of the protruding portion 5a is too long, the distance between the adjacent surface wirings 5 in the length direction of the protruding portion 5a is reduced and the insulation therebetween decreases, so that depending on the pitch of the surface wiring 5 Can be set. For example, in the example shown in FIG. 11A, when the pitch of the surface wiring 5 is 810 μm as described above, the surface wiring 5 having the protruding portion 5a is shown in FIGS. 10 and 11B. If the pitch when arranged in this way is 600 μm, which is smaller than this, the following is obtained. The pitch in the horizontal direction (direction perpendicular to the radiation R in FIG. 11B) in FIGS. 10 and 11B is also 600 μm, and the spacing between adjacent surface wirings 5 and 5 is also in this horizontal direction. Assuming 100 μm, the lateral width of the region where the surface wiring 5 is arranged (
It is preferable that W) shown in FIG. 11 (b) is 500 μm (600 μm-100 μm) or less. Therefore, the width of the portion connected to the above-described surface via conductor 3a is set to 300 μm as in the above-described example.
Then, the length of the protruding portion 5a is preferably 200 μm (500 μm-300 μm) or less.

The shape of the protruding portion 5a is a semicircular shape in the example shown in FIGS. 10 and 11, but may be other shapes such as a square, and is connected to the protruding portion 5a, for example, in the shape of the probe pin 8 The shape may be set as appropriate according to or easily.
Further, in FIG. 11B, the protruding portion 5a is formed so as to protrude from the central portion of the connecting portion with the surface via conductor 3a of the surface wiring 5, but the connection with the surface via conductor 3a of the surface wiring 5 is provided. For example, it may be formed so as to protrude from the end of the connecting portion. That is, if the position and shape of the protruding portion 5a are appropriately designed according to the location where the surface wiring 5 is formed so that the probe pins 8 formed on the wiring substrate 4 for use as a probe card can be formed with high density. Good.

  As described above, the surface wiring 5 is formed by thin film formation after the upper surface of the wiring substrate 4 on which the surface wiring 5 is not formed is flattened by polishing or the like. This polishing may cause a minute step due to the difference in material between the insulating substrate 1 and the surface via conductor 3a. When the probe pin 8 is connected to the wiring board 4, the probe pin 8 is inclined and connected by this step. May be. On the other hand, when the surface wiring 5 has a shape having the protruding portion 5a and the probe pin 8 is connected to the protruding portion 5a, the probe pin 8 is not inclined without the surface via conductor 3a. Will be connected. For this reason, it is preferable to form the protrusions 5a on all the surface wirings 5 because the tip positions of the probe pins 8 become more accurate.

  As shown in the example shown in FIG. 7, the probe card of the present invention includes the wiring board of the present invention having the above configuration and probe pins 8 connected to the surface wiring 5 on the upper surface of the wiring board 4. With such a configuration, the probe card is capable of performing high-speed inspection because the surface wiring 5 has a smaller stray capacitance, or capable of inspecting an element operating with a higher-speed signal.

For example, the probe pin 8 is manufactured as follows and connected to the wiring board 4 of the present invention. First, a female die of a plurality of probe pins 8 is formed on one surface of a silicon wafer by etching. Next, a metal made of nickel is applied to the surface on which the female mold is formed by plating, and the female mold is embedded with nickel, and nickel on the wafer other than the embedded portion is removed by processing such as etching. Then, a silicon wafer in which nickel probe pins 8 are embedded is manufactured. Nickel probe pins 8 embedded in the silicon wafer are bonded to the surface wiring 5 on the upper surface of the wiring substrate 4 with a bonding material such as solder. Then, the probe card of the present invention in which the probe pins 8 are connected to the surface wiring 5 on the upper surface of the wiring substrate 4 is obtained by removing the silicon wafer with an aqueous potassium hydroxide solution.

1: Insulating substrate 1a: Insulating layer 2: External electrode 3: Internal wiring 3a: Surface via conductor 4: Wiring substrate 5: Surface wiring 5a: Projection 6: Resin insulating layer 7: Fine wiring 8: Probe pin

Claims (4)

Insulating substrate including a plurality of insulating layers made of ceramics, an external electrode formed on a lower surface of the insulating substrate, and an internal including a via conductor connected to the external electrode and led to the upper surface of the insulating substrate A surface via conductor having an upper end exposed on the upper surface of the insulating base through the insulating layer of the uppermost layer of the internal wiring from the center of the wiring substrate. A wiring board having a shape along the direction of radiation. 2. The wiring board according to claim 1, wherein a surface wiring made of a thin film is connected to the surface via conductor on the upper surface of the insulating base. 3. The surface via conductors are alternately arranged along the radiation so as to sandwich the radiation, and the surface wiring has a portion having a shape having a protruding portion protruding on the radiation. Wiring board as described in. A probe card comprising: the wiring board according to claim 2; and a probe pin connected to the surface wiring on an upper surface of the wiring board.

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