JP2011043493A - Probe card and probe device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a probe card and a probe device, for sure connection of a probe pin to an electrode of a semiconductor element with less mismatching in impedance. <P>SOLUTION: The probe card includes a ceramic wiring substrate 1 where a plurality of insulating resin layers 2 and a plurality of wiring layers 3 are alternately stacked on the upper surface of the substrate, with the wiring layers 3 positioned above and below the insulating layers 2 being connected together by a through conductor 4, and a probe pin 5 connected to the wiring layer 3 on the upper surface of the insulating resin layer 2 which is the top layer. A non formation region 6 of the insulating resin layer 2 which corresponds to a projected of a connection region to the wiring layer 3 of the probe pin 5, in top view, in at least one layer of the insulating resin layer 2, being the second or subsequent layers directly under the top layer. Thus, the electrode of the semiconductor element and the probe pin 5 are brought in sure contact with each other, being allowed to be matched with a requested impedance characteristic as much as possible, for better transmission of high frequency signals. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a probe card used for electrical testing of semiconductor elements and a probe card apparatus using the probe card.

  In recent years, along with miniaturization and higher density of electronic devices, not only semiconductor elements used in electronic devices but also packages, wiring boards on which the semiconductor elements are mounted, or electrical inspection of semiconductor elements The probe card is also required to have finer wiring and higher density. In addition, it is required that high-frequency signals can be transmitted as the speed of the semiconductor element increases, and it is also required that the probe card be reliably contacted with the electrodes of the semiconductor element.

  In order to meet such demands, fine patterning is possible, and as a substrate excellent in flatness and high frequency characteristics, a thin film conductor and a thin insulating layer are formed on a ceramic substrate flattened by polishing. There is a so-called build-up type wiring board in which the formed multilayer wiring portion is formed (see, for example, Patent Document 1). 14 and 15 are sectional views showing an example of a conventional probe card. In a conventional probe card, a wiring layer 13 is formed as a thin film on the upper surface of a ceramic wiring substrate 11 composed of a plurality of ceramic insulating layers 11d, internal wirings 11a, external wirings 11c and via conductors 11b, and an insulating resin layer is further formed thereon. 12 and wiring layers 13 were alternately laminated. The wiring layers 13 positioned above and below the insulating resin layer 12 are connected by the through conductors 14, and the probe pins 15 are joined to the uppermost wiring layer 13.

Japanese Patent Laid-Open No. 2004-214586

  Since the ceramic wiring board 11 used in the conventional probe card undergoes firing shrinkage during the manufacturing process of the ceramic wiring board 11, the board itself may be warped, and it is difficult to produce the board flat. It was. In order to solve this problem, the so-called build-up method, in which the multilayered wiring part in which multiple layers of thin-film conductors and thin-film insulating layers are formed on the main surface that has been flattened by surface grinding of the fired ceramic wiring board 11 By manufacturing this wiring board, a probe card with fine wiring and high density has been realized.

  However, a large number of semiconductor elements to be subjected to electrical tests are formed on a silicon wafer. In recent years, the demand for manufacturing a large number of semiconductor elements in a single process by increasing the size of the silicon wafer has increased. It is getting bigger with a diameter of 15 inches.

  For this reason, the ceramic wiring board 11 used in the probe card is also required to increase in size in proportion to the increase in the size of the silicon wafer. Even if the enlarged ceramic wiring board 11 is subjected to surface grinding after firing, the ceramic wiring board 11 It has become difficult to make the entire substrate 11 sufficiently flat.

Therefore, when the probe pin 15 connected to the pad portion for the probe pin 15 is pressed against the electrode of the semiconductor element of the silicon wafer on which a large number of semiconductor elements are formed, the ceramic wiring substrate 11 is warped. In addition to the probe pins 15 that are reliably in contact, the probe pins 15 that are unreliably in contact have occurred. To eliminate the probe pin 15 with uncertain contact,
Although it is necessary to push the probe card into the silicon wafer side with a larger force, if the probe card is pushed with such a large force, the probe pin 15 with uncertain initial contact is surely contacted, but from the beginning The probe pin 15 that was reliably in contact was strongly pushed into the electrode of the semiconductor element, causing a problem that the electrode of the semiconductor element was chipped or destroyed.

  In order to solve this problem, the probe pin 15 is made elastic so that even if the probe card is pushed in with a large force, a large force is prevented from being applied to the electrode of the semiconductor element by the elastic force of the probe pin 15. Thus, it is considered to effectively prevent the chip of the semiconductor element from being chipped or broken. Therefore, as a method for imparting elasticity to the probe pin 15, as shown in the example of FIG. 10, in general, a folded portion is formed on the probe pin 15, and the folded portion has a so-called spring effect on the probe pin 15. The shape has been devised.

  In this way, in order to form the folded portion on the probe pin 15, it is necessary to increase the length of the probe pin 15, so that impedance matching required for high-frequency transmission is designed in the ceramic wiring board 11 portion. Although this is done, impedance matching cannot be achieved in the probe pin 15 having a long length, which makes it difficult to transmit a high-frequency signal.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a probe card and a probe device that can reliably connect the probe pins to the electrodes of the semiconductor elements and have a small impedance mismatch. There is to do.

  The probe card of the present invention is a wiring in which a plurality of insulating resin layers and a plurality of wiring layers are alternately laminated on the upper surface of a ceramic wiring board, and the wiring layers positioned above and below the insulating resin layer are connected by through conductors. A substrate and a probe pin connected to the wiring layer located on the upper surface of the uppermost insulating resin layer, and at least one of the second and subsequent insulating resin layers immediately below the uppermost layer is planar A region where the insulating resin layer is not formed corresponding to a region where a connection region of the probe pin with the wiring layer is projected is provided.

  Moreover, the probe card of the present invention is characterized in that, in the above configuration, the non-formation region is the same region as the region where the connection region is projected in plan view.

  In the probe card of the present invention, in the above configuration, a plurality of the non-formation regions are provided, and the non-formation regions adjacent in a plan view of the insulation resin layer are formed on the different insulation resin layers. It is characterized by being.

  The probe card according to the present invention is characterized in that, in the above configuration, the non-formation region has a gradually increasing diameter from bottom to top.

  In the probe card of the present invention, the vertical cross-sectional shape of the corner between the upper surface of the insulating resin layer provided with the non-forming region and the side surface of the non-forming region of the insulating resin layer in the above configuration It is characterized by an arc shape.

  In the probe card of the present invention, the corner portion between the upper surface of the insulating resin layer provided with the non-forming region and the side surface of the non-forming region of the insulating resin layer is chamfered in the above configuration. It is characterized by this.

The probe device of the present invention is characterized by using the probe card of the present invention having the above-described configuration.

  According to the probe card of the present invention, a connection region (hereinafter referred to as a probe pin connection region) with the wiring layer of the probe pin is projected on at least one of the second and subsequent insulating resin layers immediately below the uppermost layer in plan view. Since the non-formation region of the insulating resin layer corresponding to the region is provided, the length of the probe pin used for the probe card is shortened to match the required impedance characteristics as much as possible to transmit high-frequency signals. When the probe pin is pushed into the electrode of the semiconductor element, the deformation of the uppermost insulating resin layer caused by the force opposite to the pushing force that the probe pin receives from the electrode of the semiconductor element is Since it is possible to absorb, a large force is not applied to the electrode of the semiconductor element, and the occurrence of chipping or destruction of the electrode of the semiconductor element is reduced. It becomes possible. As a result, it is possible to ensure the contact between the electrode of the semiconductor element and the probe pin, match as much as possible with the required impedance characteristics, and improve the transmission of the high-frequency signal.

  According to the probe card of the present invention, in the above configuration, when the non-formation region is the same region as the region where the connection region is projected in plan view, the probe pin is pushed into the electrode of the semiconductor element. The deformation of the uppermost insulating resin layer caused by the force opposite to the pushing force that the pin receives from the electrode of the semiconductor element is ensured by the non-formation region that is the same region as the region where the probe pin connection region is projected at least in plan view Since absorption is possible, a large force is not applied to the electrode of the semiconductor element, and it is possible to further reduce the occurrence of chipping or breakage in the electrode of the semiconductor element. As a result, the contact between the electrode of the semiconductor element and the probe pin can be made more reliable, the impedance characteristics can be matched as much as possible, and the transmission of high-frequency signals can be made better. .

  Further, according to the probe card of the present invention, in the above configuration, when a plurality of non-formation regions are provided and adjacent non-formation regions in plan view of the insulation resin layer are formed in different insulation resin layers. Since the circuit formation of the wiring layer is not limited by the non-formation region, and the degree of freedom in circuit design of the wiring layer can be greatly improved, the electric signal transmission by the optimum circuit design can be performed well. Is possible.

  Further, according to the probe card of the present invention, in the above configuration, when the shape of the non-formed region is gradually increased from the bottom to the top, the upper surface of the insulating resin layer provided with the non-formed region Since the angle θ between the corners of the insulating resin layer and the side surface of the non-formed region becomes an obtuse angle, the force to shear the insulating resin layer immediately above the non-formed region with the corner as a fulcrum is reduced. In addition, since the corner is not an acute angle and is difficult to deform in the vicinity of the corner, the insulating resin layer directly above the non-formation region is cracked due to the occurrence of cracks due to the shearing force starting from the fulcrum or the repeated deformation of the corners. Can be effectively prevented. As a result, damage to the probe card can be effectively prevented, and long-term reliability of the probe card can be ensured.

  According to the probe card of the present invention, in the above configuration, the vertical cross-sectional shape of the corner between the upper surface of the insulating resin layer provided with the non-forming region and the side surface of the non-forming region of the insulating resin layer is an arc shape. When this is the case, the force to shear the insulating resin layer immediately above the non-formed region is dispersed, and the force to shear the insulating resin layer directly above the non-formed region is reduced, so that cracks originating from the fulcrum Occurrence can be prevented more effectively. As a result, damage to the probe card can be prevented more effectively, and long-term reliability of the probe card can be ensured.

According to the probe card of the present invention, in the above configuration, when the corner between the upper surface of the insulating resin layer provided with the non-forming region and the side surface of the non-forming region of the insulating resin layer is chamfered, The force to shear the insulating resin layer directly above the non-formed area is dispersed and the force to shear the insulating resin layer directly above the non-formed area is reduced, making the generation of cracks starting from the above fulcrum more effective. Can be prevented. As a result, damage to the probe card can be prevented more effectively, and long-term reliability of the probe card can be ensured.

  Further, according to the probe device of the present invention, since the probe card of the present invention having the above-described configuration is used, it is possible to reduce the occurrence of chipping or destruction in the electrodes of the semiconductor element on the silicon wafer. It is possible to ensure contact between the electrode and the probe pin. Further, it can be matched to the required impedance characteristics as much as possible, and an electrical test of a semiconductor element that transmits a high-frequency signal becomes possible.

It is sectional drawing which shows an example of embodiment of the probe card of this invention. It is a principal part expanded sectional view which shows an example of the A section of FIG. It is sectional drawing which shows the other example of embodiment of the probe card of this invention. It is a principal part expanded sectional view which shows an example of the A section of FIG. It is sectional drawing which shows the other example of embodiment of the probe card of this invention. It is sectional drawing which shows the other example of embodiment of the probe card of this invention. It is sectional drawing which shows the other example of embodiment of the probe card of this invention. It is sectional drawing which expands and shows the principal part of the other example of embodiment of the probe card | curd of this invention. It is sectional drawing which shows the other example of embodiment of the probe card of this invention. It is a principal part expanded sectional view which shows an example of the B section of FIG. (A)-(d) is a principal part expanded sectional view which shows the other example of the B section of FIG. 9, respectively. It is sectional drawing which expands and shows the principal part of the other example of embodiment of the probe card | curd of this invention. It is sectional drawing which expands and shows the principal part of the other example of embodiment of the probe card | curd of this invention. It is sectional drawing which shows an example of the conventional probe card. It is sectional drawing which shows the other example of the conventional probe card.

  The probe card and the probe device of the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 is a sectional view showing an example of an embodiment of a probe card of the present invention. FIG. 2 is an enlarged cross-sectional view showing a portion A of FIG. FIG. 3 is a cross-sectional view showing another example of the embodiment of the probe card of the present invention. FIG. 4 is an enlarged cross-sectional view of a portion A in FIG. 5, 6 and 7 are sectional views showing other examples of the embodiment of the probe card of the present invention. FIG. 8 is an enlarged sectional view showing another example of the embodiment of the probe card of the present invention. FIG. 9 is a sectional view showing another example of the embodiment of the probe card of the present invention. FIG. 10 is an enlarged cross-sectional view of a main part showing an example of a B part in FIG. FIGS. 11A to 11D are enlarged cross-sectional views of main parts showing other examples of the B part of FIG. FIGS. 12 and 13 are enlarged cross-sectional views showing a main part of another example of the embodiment of the probe card of the present invention.

1 to 13, 1 is a ceramic wiring board, 1 a is an internal wiring of the ceramic wiring board 1, 1 b is a via conductor of the ceramic wiring board 1, 1 c is an external wiring of the ceramic wiring board 1, and 1 d is a ceramic wiring board 1. Ceramic insulating layer, 2 is an insulating resin layer, 2a is an upper surface of the insulating resin layer 2 provided with the non-forming region 6, 3 is a wiring layer formed on the insulating resin layer 2, and 4 penetrates the insulating resin layer 2 Through-conductors formed in this manner, 5 is a probe pin, 6 is a non-formation region of the insulating resin layer 2, and 6 a is a side surface of the non-formation region 6 of the insulating resin layer 2. In the example shown in FIG. 1, six wiring layers 3 on the outermost surface of the wiring board are arranged in the horizontal direction, the insulating resin layer 2 is three layers, and the ceramic insulating layer 1b of the ceramic wiring board 1 is also three and four layers. A simplified example is shown. Depending on the number of semiconductor elements on the wafer to be inspected with the probe card, the number of terminals of the semiconductor elements, and their arrangement, the insulating resin layer 2, the wiring layer 3, the through conductor 4, the probe pin 5, the internal wiring 1a, and the via The size and arrangement of the conductor 1b and the external wiring 1c are set.

  In the probe card of the present invention, a plurality of insulating resin layers 2 and a plurality of wiring layers 3 are alternately laminated on the upper surface of a ceramic wiring substrate 1 as shown in the examples shown in FIGS. A wiring board in which wiring layers 3 positioned above and below the layer 2 are connected by through conductors 4 and probe pins 5 connected to the wiring layer 3 positioned on the upper surface of the uppermost insulating resin layer 2; In plan view, at least one of the second and subsequent insulating resin layers 2 immediately below the uppermost layer (the second layer in the example shown in FIGS. 1 and 2 and the second and third layers in the example shown in FIG. 8) The non-formation region 6 of the insulating resin layer 2 corresponding to the region where the probe pin connection region is projected is provided. Due to such a configuration, the non-forming region 6 of the insulating resin layer 2 corresponding to the region in which the probe pin connection region is projected in plan view on at least one of the second and subsequent insulating resin layers 2 immediately below the uppermost layer. Is provided, the length of the probe pin 5 used in the probe card is shortened to match the required impedance characteristics as much as possible to improve the transmission of the high-frequency signal. When pushed into the electrode, the deformation of the uppermost insulating resin layer 2 caused by the force opposite to the pushing force received by the probe pin 5 from the electrode of the semiconductor element can be absorbed by the non-forming region 6. Therefore, a large force is not applied to the electrode of the semiconductor element, and it is possible to reduce the occurrence of chipping or destruction in the electrode of the semiconductor element. As a result, the contact between the electrode of the semiconductor element and the probe pin 5 can be ensured, and the required impedance characteristic can be matched as much as possible, and the transmission of the high-frequency signal can be improved. .

  In the probe card of the present invention, in the above configuration, as in the example shown in FIGS. 3 and 4, the non-formation region 6 is preferably the same region as the region where the probe pin connection region is projected in plan view. . In such a configuration, when the probe pin 5 is pushed into the electrode of the semiconductor element, the insulating resin layer 2 as the uppermost layer is generated by a force opposite to the pushing force that the probe pin 5 receives from the electrode of the semiconductor element. The deformation can be reliably absorbed by the non-formation region 6 which is the same region as the region where the probe pin connection region is projected in plan view, so that a large force is not applied to the electrode of the semiconductor element. It is possible to further reduce the occurrence of chipping or destruction of the element electrode, to ensure the contact between the electrode of the semiconductor element and the probe pin, and to match the required impedance characteristics as much as possible. It is possible to improve the transmission of the high frequency signal.

  Moreover, the probe card of the present invention has a plurality of non-formation regions 6 in the above-described configuration, as in the examples shown in FIGS. 5 to 7, and the non-formation regions 6 adjacent to each other in plan view of the insulating resin layer 2. However, it is preferable that the insulating resin layers 2 are different from each other. In such a configuration, circuit formation of the wiring layer 3 is not limited by the non-formation region 6, and the degree of freedom in circuit design of the wiring layer 3 can be greatly improved. Therefore, it is possible to satisfactorily transmit the electric signal.

Further, in the probe card of the present invention, in the above configuration, as in the example shown in FIGS. 9 and 10, it is preferable that the non-formation region 6 has a gradually increasing diameter from the bottom to the top. In such a configuration, the angle θ of the corner between the upper surface 2a of the insulating resin layer 2 provided with the non-forming region 6 and the side surface 6a of the non-forming region 6 of the insulating resin layer 2 becomes an obtuse angle. Therefore, the force for shearing the insulating resin layer 2 immediately above the non-forming region 6 with the corner as a fulcrum becomes small, and the corner is not an acute angle and the vicinity of the corner is difficult to deform. It is possible to effectively prevent the generation of cracks due to the shearing force starting from the fulcrum of the insulating resin layer 2 immediately above 6 or the occurrence of cracks due to repeated deformation of the corners. As a result, damage to the probe card can be effectively prevented, and long-term reliability of the probe card can be ensured.

  Further, according to the probe card of the present invention, in the above configuration, the upper surface 2a of the insulating resin layer 2 provided with the non-forming region 6 and the non-forming region 6 of the insulating resin layer 2 are provided as in the example shown in FIG. When the vertical cross-sectional shape of the corner between the side surface 6a is an arc shape, the force to shear the insulating resin layer 2 immediately above the non-formation region 6 is dispersed and the insulating resin layer directly above the non-formation region 6 The force to shear 2 is reduced, and the generation of cracks starting from the fulcrum can be more effectively prevented. As a result, damage to the probe card can be prevented more effectively, and long-term reliability of the probe card can be ensured.

  Further, according to the probe card of the present invention, in the above configuration, the upper surface 2a of the insulating resin layer 2 provided with the non-forming region 6 and the non-forming region 6 of the insulating resin layer 2 as shown in the example shown in FIG. When the corner between the side surface 6a is chamfered, the force to shear the insulating resin layer 2 immediately above the non-forming region 6 is dispersed to shear the insulating resin layer 2 directly above the non-forming region 6. And the generation of cracks starting from the fulcrum can be more effectively prevented. As a result, damage to the probe card can be prevented more effectively, and long-term reliability of the probe card can be ensured.

  In addition, since the probe device of the present invention uses the probe card of the present invention having the above configuration, it is possible to reduce the occurrence of chipping or breakage in the electrodes of the semiconductor elements on the silicon wafer. The contact with the probe pin 5 can be ensured, and the required impedance characteristic can be matched as much as possible, and an electrical test of a semiconductor element that transmits a high-frequency signal is possible.

  The ceramic wiring board 1 has an insulating base made of ceramics, an external wiring 1c formed on the surface thereof, an internal wiring 1a formed inside, and a via conductor 1b. As shown in the example shown in FIGS. 1 to 6, the insulating base is composed of a plurality of ceramic insulating layers 1 d, and the interval between the external wirings 1 c can be increased by developing the internal wiring 1 a and the via conductor 1 b. When the interval between the wiring layers 3 on the upper surface of the insulating resin layer 2 is large, it is not necessary to develop the internal wiring 1a. Therefore, the insulating substrate may be composed of one ceramic insulating layer 1d. The external wiring 1c is for connecting the wiring board to an external circuit. The internal wiring 1a and the via conductor 1b are for electrically connecting the external wiring 1c and the wiring layer 3 formed on the insulating resin layer 2, and the internal wiring 1a is formed between the ceramic insulating layers 1d and 1d. The via conductor 1b penetrates the ceramic insulating layer 1d and connects between the internal wirings 1a and 1a and between the internal wiring 1a and the external wiring 1c.

  The ceramic wiring board 1 is formed by a known technique, the dielectric constant of the ceramic insulating layer 1d and the insulating resin layer 2, the shape of the internal wiring 1a, the via conductor 1b, the external wiring 1c, the wiring layer 3 and the through conductor 4, and the mutual position. By adjusting the above, the impedance of the signal wiring can be designed to be 50Ω, which is a generally standard impedance.

The ceramic insulating layer 1d of the ceramic wiring board 1 includes an aluminum oxide (alumina: Al ₂ O ₃ ) sintered body, an aluminum nitride (AlN) sintered body, a silicon carbide (SiC) sintered body, and a mullite sintered body. Body, made of ceramics such as glass ceramics. The probe card is preferably made of an aluminum oxide (Al ₂ O ₃ ) -based sintered body or glass ceramic having a thermal expansion coefficient close to that of silicon (Si) forming the wafer. When the ceramic insulating layer 1d is made of such ceramics, when the probe pins 5 are formed on the wiring board, the probe pins 5 are caused by the thermal expansion difference between the silicon wafer on which the probe pins 5 are formed and the wiring board. And the thermal stress applied to the joint of the probe pin 5 is relatively small, which is preferable.

  The internal wiring 1a and the external wiring 1c of the ceramic wiring substrate 1 are formed by co-firing with the ceramic insulating layer 1d, tungsten (W), molybdenum (Mo), molybdenum-manganese (Mo-Mn) alloy, silver (Ag). , Copper (Cu), gold (Au), silver-palladium (Ag-Pd) alloy and other metallized components.

  Such a ceramic wiring substrate 1 is manufactured by the following method. For example, when the ceramic insulating layer 1d is formed of an aluminum oxide sintered body, first, an appropriate organic binder and solvent are added to and mixed with the raw material powder of aluminum oxide, silicon oxide, magnesium oxide and calcium oxide, and the slurry is mixed. This is formed into a sheet shape by a doctor blade method or the like to produce a plurality of ceramic green sheets to be the ceramic insulating layer 1d.

  Next, a through hole is formed by a suitable punching process at a predetermined position where the via conductor 1b of the ceramic green sheet is formed, and the through hole is filled with a conductive paste. In addition, a conductor paste layer serving as the internal wiring 1a is formed to a thickness of 10 μm to 20 μm at a predetermined position of the ceramic green sheet by screen printing or the like. The conductive paste is produced by kneading a metal powder having a high melting point such as tungsten (W), molybdenum (Mo), molybdenum-manganese (Mo-Mn) alloy, an appropriate resin binder, and a solvent.

  Finally, these ceramic green sheets are superposed and pressure-bonded to produce a laminate, and the laminate is fired at a high temperature of about 1500 ° C. to 1600 ° C., thereby producing the ceramic wiring substrate 1. If the upper surface of the ceramic wiring substrate 1 is flattened by polishing, the insulating resin layer 2 can be easily formed thereon, and the upper surface of the wiring substrate is flattened. can do. On the surface of the external wiring 1c of the ceramic wiring board 1, a nickel plating layer having a thickness of about 1 μm to 10 μm and a gold plating layer having a thickness of about 0.1 μm to 3 μm are sequentially provided to prevent corrosion and connect to an external circuit. It is good to form.

The wiring layer 3 on the upper surface of the ceramic wiring substrate 1 is formed on the entire upper surface of the polished ceramic wiring substrate 1 with, for example, a chromium-copper (Cr-Cu) alloy layer or titanium-copper (thickness of about 0.1 μm to 3 μm). A base conductor layer made of a (Ti—Cu) alloy layer is formed, a resist film having a pattern-shaped opening of the wiring layer 3 is formed thereon, and a metal such as copper or gold is plated by using the resist film as a mask. A main conductor layer having a thickness of about 2 μm to 10 μm is formed. Then, the resist film is peeled and removed, and the exposed portion of the underlying conductor layer is removed by etching. A nickel or gold plating layer may be further formed on the surface by plating.

  The insulating resin layer 2 is made of an insulating resin such as polyimide resin, polyphenylene sulfide resin, wholly aromatic polyester resin, BCB (benzocyclobutene) resin, epoxy resin, bismaleimide triazine resin, polyphenylene ether resin, polyquinoline resin, or fluororesin. It consists of

In order to form the insulating resin layer 2 on the ceramic wiring substrate 1, for example, when made of polyimide resin, a varnish-like polyimide precursor is applied to the upper surface of the substrate 1 by spin coating, die coating, curtain coating, or It is applied by a coating method such as a printing method, and then cured by heat at about 400 ° C. to form a polyimide, thereby forming a Young's modulus of 2 to 5 GPa and a thickness of 10 μm to 50 μm. Alternatively, a resin adhesive such as a siloxane-modified polyamideimide resin, a siloxane-modified polyimide resin, a polyimide resin, a bismaleimide triazine resin or an epoxy resin is applied to the lower surface of a sheet having a thickness of about 10 μm to 50 μm made of the above resin. An adhesive layer having a thickness after drying of 5 μm to 20 μm and a Young's modulus of 2 GPa is formed by applying and drying by a coating method, and the adhesive layer is formed on the ceramic wiring substrate 1 by heating and pressing. . In any method, the plurality of insulating resin layers 2 are formed by forming the through conductors 4 and the wiring layers 3 in the insulating resin layer 2 and repeating the above steps as many times as the number of necessary insulating resin layers 2. In the method using a film resin, a plurality of films can be pressed together, and it is not necessary to apply and cure for each layer, so that the manufacturing process can be shortened.

In the portion of the insulating resin layer 2 where the through conductor 4 is formed, for example, a through hole having a diameter of 20 μm to 100 μm is formed. This through hole is formed by first forming a resist film having an opening in the insulating resin layer 2 and etching the insulating resin layer 2 located in the opening of the resist film or directly using a laser beam. Formed by removing part of layer 2. An excimer laser, a CO ₂ laser, or the like can be used as the laser beam at this time, but the laser beam by an ultraviolet laser that can adjust the shape of the inner wall of the through-hole to be nearly vertical and that can smoothly process the inner wall surface of the through-hole. It is preferable to form with. Alternatively, in the case of a method of applying a varnish-like resin, a photosensitive resin is used, for example, a portion other than a portion where a through-hole is formed by exposure is cured, and a resin in a portion where the through-hole is formed is obtained. The through hole may be formed by removing it by etching.

The wiring layer 3 on the upper surface of the insulating resin layer 2 is formed by first forming a thin film forming method such as a vapor deposition method, a sputtering method, or an ion plating method on the entire main surface of the insulating resin layer 2 to a thickness of 0.1 μm to 3 μm.
A base conductor layer made of, for example, a chromium-copper (Cr-Cu) alloy layer or a titanium-copper (Ti-Cu) alloy layer is formed to a certain thickness. Next, a resist film having a pattern-shaped opening of the wiring layer 3 is formed on the underlying conductor layer, and this resist film is used as a mask to form a resist having a resistance of 2 μm, such as copper or gold, by plating or the like. A main conductor layer having a thickness of about 10 μm is formed. Then, the wiring layer 3 is formed by removing the resist film and removing the exposed portion of the underlying conductor layer by etching. Similar to the external wiring 1c, a nickel or gold plating layer may be formed on the surface of the uppermost wiring layer 3 by plating.

  In addition, the wiring layer 3 on the upper surface of the insulating resin layer 2 is formed with a concave portion having the same shape as the wiring layer 3 in the insulating resin layer 2, and the wiring layer 3 is formed in the concave portion. Since there is no step between the wiring layer 3 and the upper surface of the wiring layer 3, the upper surface of the wiring substrate is flat even if a plurality of insulating resin layers 2 are stacked, and the wiring layer 3 on the upper surface of the uppermost insulating resin layer 2. It is preferable because the electronic component and the probe pin can be connected better. In order to form a recess in the insulating resin layer 2, a resist film having a pattern-shaped opening of the wiring layer 3 is formed on the surface of the insulating resin layer 2, and etching such as RIE (Reactive Ion Etching) is performed. The surface of the exposed portion of the insulating resin layer 2 may be removed by the method.

Before forming the wiring layer 3, the through conductor 4 is formed by filling the through hole of the insulating resin layer 2 with a conductive paste mainly composed of a metal powder such as copper and a resin. As shown in the example shown in FIG. 6, a through hole filled with a conductor is formed. The conductive paste is made of a metal powder such as copper, a resin, and a solvent, and is solidified by being cured by heating after filling the through holes. Alternatively, when the wiring layer 3 is formed, it may be formed simultaneously with the wiring layer 3 by forming the base conductor layer and the main conductor layer on the inner surface of the through hole. The through conductor 4 in this case is formed by being attached to the inner surface of the through hole of the insulating resin layer 2, and the through hole is not filled with the conductor. When the plating thickness at the time of forming the main conductor layer is increased, the through-holes can be filled with the conductor as in the examples shown in FIGS. When the through conductor 4 is formed at the same time as the wiring layer 3, the through hole is formed as in the example shown in FIGS. 1 to 6 so that the base conductor layer can be satisfactorily formed by a thin film on the inner surface of the through hole. It is preferable to make the shape so that the upper surface side of the insulating resin layer 2 becomes larger. In the case of using a photosensitive resin, the through hole having such a shape is formed by adjusting the etching conditions when the through hole is formed by etching, or by adjusting the output of the laser beam when the through hole is formed by the laser beam. It can be formed by adjusting exposure conditions and etching conditions.

  The probe pin 5 is produced, for example, as follows, and attached to a wiring board to produce the probe card of the present invention. First, a female die of a plurality of probe pins 5 is formed on one surface of a silicon wafer by etching, a metal made of nickel is deposited on the surface on which the female die is formed by plating, and the female die is embedded and embedded with nickel. Nickel on the wafer other than nickel is removed by processing such as etching to produce a silicon wafer in which nickel probe pins are embedded. Nickel probe pins embedded in the silicon wafer are bonded to the wiring layer 3 on the upper surface of the uppermost insulating resin layer 2 of the wiring substrate by a bonding material such as solder. Then, the probe card is obtained by removing the silicon wafer with an aqueous potassium hydroxide solution.

  The probe pin 5 in the probe card of the present invention does not need to have a structure that imparts elasticity, and the length is preferably as short as possible in order to avoid changes in the impedance of the signal wiring due to the probe pin 5 as much as possible. Specifically, it is preferable to set the length of the probe pin 5 to 1/16 or less of the wavelength of the high-frequency signal to be used, because the influence of the probe pin 5 on the impedance of the entire probe card can be reduced. For example, in the case of a probe card for transmitting a high-frequency signal of 5 GHz, the length of the probe pin 5 is preferably 3.75 mm or less. By doing so, in the signal wiring, the impedance to the tip of the probe pin 5 can be matched as close as possible to the impedance of 50 Ω, which is the impedance of the ceramic wiring substrate 1 described above. , There is almost no reflection due to impedance mismatch of the high frequency signal, and the probe card is excellent in high frequency transmission. Further, the connection end of the probe pin 5 to the wiring board is formed in a nail head shape having a diameter of 0.5 mm to 0.8 mm, for example, and the surface of the probe pin 5 is connected to a bonding material such as solder used for connection. It is desirable to apply nickel or gold plating for the purpose of ensuring wettability or for the purpose of rust prevention.

  The non-formation region 6 is formed by, for example, the method of forming the insulating resin layer 2 on the ceramic wiring substrate 1 described above. For example, when a film resin is used, the insulating resin layers in the second and subsequent layers immediately below the uppermost layer are used. The film resin 2 is formed by using a portion of the film resin corresponding to the region where the probe pin connection region is projected in plan view, which has been removed in advance by etching, laser light, or the like.

  As in the example shown in FIGS. 1 and 2, a region in which the probe pin connection region is projected in a plan view on at least one layer (in this example, the second layer) of the second and subsequent insulating resin layers 2 immediately below the uppermost layer Since the non-formation region 6 of the insulating resin layer 2 corresponding to is provided, when the probe pin 5 is pushed into the electrode of the semiconductor element, the probe pin 5 has a direction opposite to the pushing force received from the electrode of the semiconductor element. Since the deformation of the uppermost insulating resin layer 2 generated by the force can be absorbed by the non-formation region 6, no large force is applied to the electrode of the semiconductor element, The occurrence of destruction can be reduced, and as a result, the contact with the probe pin 5 can be ensured without destroying the electrode of the semiconductor element.

As in the example shown in FIGS. 3 and 4, the non-formed region 6 is preferably the same region as the region where the probe pin connection region is projected in plan view. In such a configuration, when the probe pin 5 is pushed into the electrode of the semiconductor element, the insulating resin layer 2 as the uppermost layer is generated by a force opposite to the pushing force that the probe pin 5 receives from the electrode of the semiconductor element. Since the deformation can be reliably absorbed by the non-formation region 6 that is the same region as the region where the probe pin connection region is projected in plan view, a large force is not applied to the electrode of the semiconductor element.
It is possible to further reduce the occurrence of chipping or breakage in the electrodes of the semiconductor element, and to ensure contact between the electrodes of the semiconductor element and the probe pins. In this case, if the size of the non-formed region 6 is 1 to 1.2 times larger than the size of the probe pin connection region, the force opposite to the pushing force that the probe pin 5 receives from the electrode of the semiconductor element. It is preferable that the deformation of the uppermost insulating resin layer 2 generated by the above is absorbed more reliably by entering the portion of the non-formed region 6.

  Further, as in the example shown in FIG. 5, a plurality of non-formation regions 6 are provided, and the non-formation regions 6 adjacent in a plan view of the insulation resin layer 2 are formed in different insulation resin layers 2. Is preferred. In such a configuration, circuit formation of the wiring layer 3 is not limited by the non-formation region 6, and the degree of freedom in circuit design of the wiring layer 3 can be greatly improved. Therefore, it is possible to satisfactorily transmit the electric signal. Note that, as in the example shown in FIG. 6, the non-formation region 6 is made to be the same region as the region in which the probe pin connection region is projected in plan view, so that the probe pin 5 can be used as an electrode of the semiconductor element. When pushed in, the deformation of the uppermost insulating resin layer 2 caused by the force opposite to the pushing force received by the probe pin 5 from the electrode of the semiconductor element can be more reliably absorbed.

  As in the example shown in FIG. 7, when a plurality of non-forming regions 6 are provided, and the non-forming regions 6 adjacent in a plan view of the insulating resin layer 2 are formed in different insulating resin layers 2, As shown in the example of FIG. 5, not only the non-formation region 6 is formed in the insulating resin layer 2 of two layers that overlap (in the example shown in FIG. 5, the second layer and the third layer), but the insulating resin layer 2 is viewed in plan view. A plurality of adjacent non-formed regions 6 may be formed in a plurality of different insulating resin layers 2 (in the example shown in FIG. 7, the second layer, the third layer, and the fourth layer). With such a configuration, the degree of freedom in circuit design of the wiring layer 3 disposed on the insulating resin layer 2 can be further greatly improved.

  As in the example illustrated in FIG. 8, the non-formation region 6 may be formed across a plurality of insulating resin layers 2 that overlap each other. With this configuration, when the probe pin 5 is pushed into the electrode of the semiconductor element, the uppermost insulating resin layer 2 generated by a force opposite to the pushing force that the probe pin 5 receives from the electrode of the semiconductor element. It is possible to more reliably absorb the deformation.

  The probe card of the present invention is manufactured by bonding the probe pin 5 to the probe pin connection region of the ceramic wiring substrate 1 using a bonding material such as solder, and the length of the probe pin 5 used for the probe card is increased. Shortening and matching the required impedance characteristics as much as possible to improve the transmission of high-frequency signals, and when the probe pin 5 is pushed into the electrode of the semiconductor element, the pushing force that the probe pin 5 receives from the electrode of the semiconductor element Since the deformation of the uppermost insulating resin layer 2 generated by the force in the opposite direction can be absorbed by the non-formation region 6, a large force is not applied to the electrode of the semiconductor element, and the electrode of the semiconductor element It is possible to reduce the occurrence of chipping or destruction. As a result, the contact between the electrode of the semiconductor element and the probe pin 5 can be ensured, and the required impedance characteristic can be matched as much as possible, and the transmission of the high-frequency signal can be improved. .

  The probe card of the example shown in FIGS. 9 and 10 is characterized in that, in the above configuration, the non-formed region 6 has a gradually increasing diameter from bottom to top.

In the probe card of this example, the probe pin 5 of the probe card is brought into contact with the semiconductor element formed on the semiconductor substrate, and the electrical test of the semiconductor element is performed. In this case, the corner between the upper surface 2a of the insulating resin layer 2 provided with the non-forming region 6 and the side surface 6a of the non-forming region 6 of the insulating resin layer 2 serves as a fulcrum. Since the force for shearing the insulating resin layer 2 immediately above works repeatedly, there is a possibility that cracks may be generated by the shearing force starting from the fulcrum. Therefore, as in the example shown in FIGS. 9 and 10, when the diameter of the non-formed region 6 is gradually increased from the bottom to the top, the upper surface 2a of the insulating resin layer 2 provided with the non-formed region 6 Since the angle θ between the side surface 6a of the non-forming region 6 of the insulating resin layer 2 becomes an obtuse angle, an attempt is made to shear the insulating resin layer 2 immediately above the non-forming region 6 with the corner as a fulcrum. And the corner portion is not an acute angle and the vicinity of the corner portion is not easily deformed, and therefore, the occurrence of cracks or corners due to the shearing force of the insulating resin layer 2 immediately above the non-formation region 6 from the fulcrum as a starting point. Generation of cracks due to repeated deformation of the portion can be effectively prevented. As a result, damage to the probe card can be effectively prevented, and long-term reliability of the probe card can be ensured.

  As a method for producing the shape of the non-formed region 6 so that the diameter gradually increases from the bottom to the top, for example, in the case of laser processing, the laser light is processed using a lens that focuses the laser light. A hole is made in the insulating resin layer 2 by irradiating the surface of the object, but by moving the focal point of the laser beam from the upper surface of the insulating resin layer 2 to the lens side, the spot diameter of the laser beam is increased and the central portion and the periphery By making the laser intensity different from that of the portion, the drilling speed of the central portion of the non-forming region 6 formed in the insulating resin layer 2 becomes faster than that of the peripheral portion, so the non-forming region of the insulating resin layer 2 6 can be produced so that the diameter gradually increases from bottom to top. In the case of etching processing, a resist is formed in a region other than the non-formation region 6 of the insulating resin layer 2 by using a photolithography method on the upper surface side of the insulating resin layer 2, and the kind and time of the etching solution are adjusted. By adjusting the amount of side etching, the shape of the non-formation region 6 of the insulating resin layer 2 can be manufactured so that the diameter gradually increases from bottom to top.

Further, the angle θ of the corner between the upper surface 2a of the insulating resin layer 2 provided with the non-forming region 6 and the side surface 6a of the non-forming region 6 of the insulating resin layer 2 is set to 100 degrees to 135 degrees. preferable. If the angle θ is less than 100 degrees, the force to try to shear the insulating resin layer 2 immediately above the non-formation region 6 with the corner as a fulcrum is reduced to reduce the fulcrum of the insulating resin layer 2 immediately above the formation region 6. It is difficult to effectively prevent the occurrence of cracks due to the shearing force starting from. If the angle θ is larger than 135 degrees, when the non-formed region 6 is formed by performing the above-described laser processing or etching process, the depth of the non-formed region 6 becomes shallow, and the probe pin 5 sinks. Moreover, the insulating resin layer 2 immediately above the non-formed region 6 comes into contact with the side surface 6a of the non-formed region 6 of the insulating resin layer 2, and it becomes difficult to sufficiently absorb the deformation of the insulating resin layer 2. Therefore, the angle θ formed between the upper surface 2a of the insulating resin layer 2 provided with the non-forming region 6 and the side surface 6a of the non-forming region 6 of the insulating resin layer 2 is 100.
It is preferable to set the angle to 135 degrees.

11 (a) to 11 (d) are enlarged cross-sectional views of the main part showing the portion B of FIG. 9, for example, from the bottom to the top as in the examples shown in FIGS. 11 (a) and 11 (b). The inclined surface may be formed in two steps so that the diameter gradually increases linearly, and as shown in the example shown in FIG. 11 (c), it is perpendicular to the middle of the non-formation region 6 of the insulating resin layer, and then The inclined surface may be formed so that the diameter gradually increases linearly up to the opening of the non-formed region 6 of the insulating resin layer. Further, as in the example shown in FIG. 11 (d), the inclined surface may be formed so that the diameter gradually increases from the bottom toward the top. In the case of the example shown in FIG. 11D, the angle θ is the angle formed between the upper surface 2a of the insulating resin layer 2 provided with the non-forming region 6 and the tangent line of the side surface 6a of the non-forming region 6 of the insulating resin layer 2. And In particular, when the shape of the non-forming region 6 is as shown in FIGS. 11A, 11C, and 11D, the corner between the non-forming region 6 and the side surface 6a serves as a fulcrum. Curing of the insulating resin layer 2 immediately above the non-formation region 6 is more effectively suppressed, and the generation of cracks starting from the fulcrum is more effectively prevented. Since the dimensions can be close to the diameter, the insulating resin layer 2 immediately above the non-formation region 6 may come into contact with the side surface 6a of the non-formation region 6 of the insulation resin layer 2 when the probe pin 5 sinks. This is preferable because it is possible to increase the sinking depth of the probe pin 5.

  The probe card of the example shown in FIG. 12 has a longitudinal section between the upper surface 2a of the insulating resin layer 2 provided with the non-forming region 6 and the side surface 6a of the non-forming region 6 of the insulating resin layer 2 in the above configuration. The surface shape is an arc shape.

  In the probe card of this example, the vertical cross-sectional shape of the corner between the upper surface 2a of the insulating resin layer 2 provided with the non-forming region 6 and the side surface 6a of the non-forming region 6 of the insulating resin layer 2 is arcuate. Therefore, the force to shear the insulating resin layer 2 immediately above the non-formation region 6 is dispersed, and the force to shear the insulating resin layer 2 just above the non-formation region 6 is reduced. The occurrence of cracks can be prevented more effectively. As a result, damage to the probe card can be prevented more effectively, and long-term reliability of the probe card can be ensured.

An arcuate corner having a radius of curvature of 0.5 to 3 μm is preferably used. In this case, when the radius of curvature is less than 0.5 μm, since the radius of curvature is small when the insulating resin layer 2 immediately above the non-formed region 6 is deformed along the arcuate corners, The effect of dispersing the force to shear the insulating resin layer 2 is reduced. Further, when the radius of curvature is larger than 3 μm, it becomes difficult to process arc-shaped corners by the method described in detail below. Therefore, the radius of curvature is 0.5-3.
μm is preferred.

  As a method for making the vertical cross-sectional shape of the corner between the upper surface 2a of the insulating resin layer 2 provided with the non-formed region 6 and the side surface 6a of the non-formed region 6 of the insulating resin layer 2 into an arc, for example In this case, when the non-formation region 6 is formed by forming a resist on the upper surface of the insulating resin layer 2 and performing etching, side etching is performed in an over-etched state, so that the vertical cross-sectional shape of the corner is an arc shape. can do. In this case, the radius of curvature can be adjusted by adjusting the etching rate, the etching time, the type and concentration of the etchant, and the like. In the case of laser processing, after forming the non-formation region 6, irradiation with a laser beam having a diameter larger than that of the non-formation region is performed for a short time, or by controlling the output of the laser beam, The surface shape can be an arc shape.

  The probe card of the example shown in FIG. 13 has a chamfered corner between the upper surface 2a of the insulating resin layer 2 provided with the non-forming region 6 and the side surface 6a of the non-forming region 6 of the insulating resin layer 2 in the above configuration. It is characterized by being.

  In the probe card of this example, the corner between the upper surface 2a of the insulating resin layer 2 provided with the non-forming region 6 and the side surface 6a of the non-forming region 6 of the insulating resin layer 2 is chamfered. The force to shear the insulating resin layer 2 immediately above the formation region 6 is dispersed, and the force to shear the insulating resin layer 2 immediately above the non-formation region 6 is reduced, and cracks are generated starting from the fulcrum. Can be prevented more effectively. As a result, damage to the probe card can be prevented more effectively, and long-term reliability of the probe card can be ensured.

As the chamfered portion formed at the corner, one having a width of 0.5 to 3 μm is preferably used. In this case, if the width is less than 0.5 μm, the width of the chamfered portion is small when the insulating resin layer 2 immediately above the non-formed region 6 is deformed along the chamfered corner portion. The effect of dispersing the force for shearing the insulating resin layer 2 immediately above is reduced. Further, when the width of the chamfered portion is larger than 3 μm, it becomes difficult to process the chamfered portion by the method described in detail below. Therefore, the width of the chamfered portion is preferably 0.5 to 3 μm.

As a method for forming a chamfered portion at the corner between the upper surface 2a of the insulating resin layer 2 provided with the non-formed region 6 and the side surface 6a of the non-formed region 6 of the insulating resin layer 2, for example, in the case of etching processing First, a resist is formed on the upper surface of the insulating resin layer 2 and etching is performed to form the non-formation region 6, then the resist is peeled off, and then a resist having an opening widened according to the width of the chamfered portion is formed. And it can form by etching the insulating resin layer 2 of the corner | angular part of the upper surface of the non-formation area | region 6 by etching again. The width and angle of the chamfered portion can be adjusted by adjusting the etching rate, etching time, etching solution type, concentration, and the like. In the case of laser processing, after forming the non-formation region 6, the laser beam having a diameter larger than that of the non-formation region is irradiated for a short time, or the laser beam output is controlled to form a vertical cross-sectional shape. A chamfered portion can be formed.

  The probe device of the present invention can reduce the occurrence of chipping or breakage of the electrode of the semiconductor element on the silicon wafer, and can ensure the contact between the electrode of the semiconductor element and the probe pin 5. It is possible to match the required impedance characteristics as much as possible, and an electrical test of a semiconductor element that transmits a high-frequency signal becomes possible.

DESCRIPTION OF SYMBOLS 1: Ceramic wiring board 1a: Internal wiring 1b: Via conductor 1c: External wiring 1d: Ceramic insulating layer 2: Insulating resin layer 2a: The upper surface of the insulating resin layer provided with the non-formation area | region 3: Wiring layer 4: Through-conductor 5 : Probe pin 6: Non-formation region 6a: Side surface of non-formation region of insulating resin layer

Claims (7)

A plurality of insulating resin layers and a plurality of wiring layers are alternately stacked on the upper surface of the ceramic wiring substrate, and the wiring layers positioned above and below the insulating resin layer are connected by through conductors, and the uppermost layer A probe pin connected to the wiring layer located on the upper surface of the insulating resin layer, and at least one of the second and subsequent insulating resin layers immediately below the uppermost layer has the probe pin in a plan view. A probe card, wherein a region where the insulating resin layer is not formed is provided corresponding to a region where a connection region with a wiring layer is projected. The probe card according to claim 1, wherein the non-formation region is the same region as a region where the connection region is projected in a plan view. The said non-formation area | region is provided with two or more, The said non-formation area | region which adjoins by planar view of the said insulation resin layer is formed in the said mutually different insulation resin layer. Probe card as described in The probe card according to any one of claims 1 to 3, wherein a shape of the non-formation region has a gradually increasing diameter from the bottom to the top. The longitudinal cross-sectional shape of the corner between the upper surface of the insulating resin layer provided with the non-forming region and the side surface of the non-forming region of the insulating resin layer is an arc shape. The probe card according to claim 4. 5. The corner portion between the upper surface of the insulating resin layer provided with the non-formed region and the side surface of the non-formed region of the insulating resin layer is chamfered. The probe card according to any one of the above. A probe apparatus using the probe card according to claim 1.

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