JP2014072349A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP2014072349A JP2014072349A JP2012216831A JP2012216831A JP2014072349A JP 2014072349 A JP2014072349 A JP 2014072349A JP 2012216831 A JP2012216831 A JP 2012216831A JP 2012216831 A JP2012216831 A JP 2012216831A JP 2014072349 A JP2014072349 A JP 2014072349A
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- inductor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
Abstract
【解決手段】半導体装置10は、リードフレームRMと、リードフレームRMの主面側MFに搭載された有機基板20pと、有機基板20p上にはんだ接合されたチップコンデンサ22cと、リードフレームRMの裏面側に搭載されたインダクタ12と、チップコンデンサ22cおよびインダクタ12を樹脂封止する樹脂体14と、を備えている
【選択図】図1
Description
図3(a)〜(d)は、本実施形態に係る半導体装置10の製造工程を説明する説明図である。以下、半導体装置10の製造方法について、図3を参照しつつ説明する。なお、以下の製造手順は一例であり、手順を適宜入れ替えてもよい。
12 インダクタ
14 樹脂体
14b 樹脂体裏面(裏面)
20p 有機基板
22a チップコンデンサ(第2コンデンサ)
22b チップコンデンサ(第2コンデンサ)
22c チップコンデンサ(コンデンサ)
22cs 錫電極
ER 外部リード
RM リードフレーム(リードフレーム、フレーム)
Claims (3)
- リードフレームと、
前記リードフレームの主面側に搭載された有機基板と、
前記有機基板上にはんだ接合されたコンデンサと、
前記リードフレームの裏面側に搭載されたインダクタと、
前記コンデンサおよび前記インダクタを樹脂封止する樹脂体と、
を備えていることを特徴とする半導体装置。 - 前記コンデンサは錫で構成される錫電極を有し、前記コンデンサが前記有機基板にはんだ接合されていることを特徴とする請求項1記載の半導体装置。
- 前記リードフレームを構成する外部リード近傍に搭載され前記樹脂体で樹脂封止された少なくとも1つの第2コンデンサが更に設けられていることを特徴とする請求項1または2記載の半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012216831A JP6065500B2 (ja) | 2012-09-28 | 2012-09-28 | 半導体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012216831A JP6065500B2 (ja) | 2012-09-28 | 2012-09-28 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2014072349A true JP2014072349A (ja) | 2014-04-21 |
JP6065500B2 JP6065500B2 (ja) | 2017-01-25 |
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JP2012216831A Active JP6065500B2 (ja) | 2012-09-28 | 2012-09-28 | 半導体装置 |
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JP (1) | JP6065500B2 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2020028278A (ja) * | 2018-08-24 | 2020-02-27 | 国立大学法人九州大学 | 被検体に生じるイベントを予測するための判別器の生成方法、及び前記判別器を用いた被検体の層別化方法 |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6161847U (ja) * | 1984-09-28 | 1986-04-25 | ||
JPH02132877A (ja) * | 1989-02-09 | 1990-05-22 | Sanyo Electric Co Ltd | 混成集積回路 |
JPH11163250A (ja) * | 1997-11-29 | 1999-06-18 | Toko Inc | 複合部品 |
US20080303125A1 (en) * | 2007-06-08 | 2008-12-11 | Da-Jung Chen | Three-dimensional package structure |
JP2010098256A (ja) * | 2008-10-20 | 2010-04-30 | Sanken Electric Co Ltd | 半導体装置及び半導体装置製造方法 |
JP2012146815A (ja) * | 2011-01-12 | 2012-08-02 | Fuji Electric Co Ltd | 半導体装置の製造方法、半導体装置およびイグナイタ装置 |
-
2012
- 2012-09-28 JP JP2012216831A patent/JP6065500B2/ja active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6161847U (ja) * | 1984-09-28 | 1986-04-25 | ||
JPH02132877A (ja) * | 1989-02-09 | 1990-05-22 | Sanyo Electric Co Ltd | 混成集積回路 |
JPH11163250A (ja) * | 1997-11-29 | 1999-06-18 | Toko Inc | 複合部品 |
US20080303125A1 (en) * | 2007-06-08 | 2008-12-11 | Da-Jung Chen | Three-dimensional package structure |
JP2010098256A (ja) * | 2008-10-20 | 2010-04-30 | Sanken Electric Co Ltd | 半導体装置及び半導体装置製造方法 |
JP2012146815A (ja) * | 2011-01-12 | 2012-08-02 | Fuji Electric Co Ltd | 半導体装置の製造方法、半導体装置およびイグナイタ装置 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2020028278A (ja) * | 2018-08-24 | 2020-02-27 | 国立大学法人九州大学 | 被検体に生じるイベントを予測するための判別器の生成方法、及び前記判別器を用いた被検体の層別化方法 |
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