JP2013505589A - トレンチdmosトランジスタの製造方法 - Google Patents
トレンチdmosトランジスタの製造方法 Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 40
- 238000000034 method Methods 0.000 title claims description 25
- 238000009792 diffusion process Methods 0.000 claims abstract description 37
- 230000004888 barrier function Effects 0.000 claims abstract description 33
- 239000000758 substrate Substances 0.000 claims abstract description 33
- 239000004065 semiconductor Substances 0.000 claims abstract description 26
- 150000002500 ions Chemical class 0.000 claims abstract description 25
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 23
- 229920005591 polysilicon Polymers 0.000 claims abstract description 23
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 16
- 238000005530 etching Methods 0.000 claims abstract description 11
- 229910052751 metal Inorganic materials 0.000 claims abstract description 9
- 239000002184 metal Substances 0.000 claims abstract description 9
- 229910021332 silicide Inorganic materials 0.000 claims abstract description 8
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims abstract description 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 23
- -1 boron ions Chemical class 0.000 claims description 14
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 10
- 230000003647 oxidation Effects 0.000 claims description 10
- 238000007254 oxidation reaction Methods 0.000 claims description 10
- 229910052710 silicon Inorganic materials 0.000 claims description 10
- 239000010703 silicon Substances 0.000 claims description 10
- 235000012239 silicon dioxide Nutrition 0.000 claims description 9
- 239000000377 silicon dioxide Substances 0.000 claims description 9
- 238000005229 chemical vapour deposition Methods 0.000 claims description 8
- 230000015572 biosynthetic process Effects 0.000 claims description 7
- 229910052785 arsenic Inorganic materials 0.000 claims description 6
- 229910052796 boron Inorganic materials 0.000 claims description 6
- 238000000206 photolithography Methods 0.000 claims description 6
- 238000005240 physical vapour deposition Methods 0.000 claims description 6
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 4
- 238000000137 annealing Methods 0.000 claims description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 4
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen group Chemical group [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 claims description 3
- 239000010410 layer Substances 0.000 description 119
- 230000008569 process Effects 0.000 description 15
- 238000010586 diagram Methods 0.000 description 14
- 239000012535 impurity Substances 0.000 description 6
- 229910052814 silicon oxide Inorganic materials 0.000 description 6
- 238000007796 conventional method Methods 0.000 description 5
- 238000001039 wet etching Methods 0.000 description 4
- 238000001312 dry etching Methods 0.000 description 3
- 239000007789 gas Substances 0.000 description 3
- 238000002513 implantation Methods 0.000 description 3
- 238000004380 ashing Methods 0.000 description 2
- 239000011247 coating layer Substances 0.000 description 2
- 239000007943 implant Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000004528 spin coating Methods 0.000 description 2
- 229910021341 titanium silicide Inorganic materials 0.000 description 2
- 229910015900 BF3 Inorganic materials 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000010884 ion-beam technique Methods 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- RJCRUVXAWQRZKQ-UHFFFAOYSA-N oxosilicon;silicon Chemical compound [Si].[Si]=O RJCRUVXAWQRZKQ-UHFFFAOYSA-N 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
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- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
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- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
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- H01L29/4916—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
- H01L29/4925—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement
- H01L29/4933—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement with a silicide layer contacting the silicon layer, e.g. Polycide gate
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- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
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- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/665—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using self aligned silicidation, i.e. salicide
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- Computer Hardware Design (AREA)
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- Crystallography & Structural Chemistry (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Description
101 シリコン基板
102 エピタキシャル層
112 ゲート酸化物層
114 トレンチゲート
115 拡散層
118 ソース/ドレイン
120 側壁
Claims (13)
- 半導体基板上に連続してフォトリソグラフィの配置で、酸化物層及びバリア層を形成するステップと、
トレンチを定義するために、前記バリア層をマスクとして用いて、前記酸化物層及び前記半導体基板をエッチングするステップと、
前記トレンチの内壁にゲート酸化物層を形成するステップと、
トレンチゲートを形成するために、ポリシリコンで前記トレンチを充填するステップと、
前記バリア層及び前記酸化物層を除去するステップと、
拡散層を形成するために、前記トレンチゲートの両側の前記半導体基板内にイオンを注入するステップと、
前記拡散層上をフォトレジスト層で覆い、その上にソース/ドレイン配置を定義するステップと、
ソース/ドレインを形成するために、前記フォトレジスト層マスクを用いて、前記ソース/ドレイン配置に基づき、前記拡散層内にイオンを注入するステップと、
前記フォトレジスト層を除去した後で、前記トレンチゲートの両側に側壁を形成するステップと、
前記拡散層及び前記トレンチゲート上に金属シリサイド層を形成するステップと、
を含むことを特徴とするトレンチDMOSトランジスタの製造方法。 - 前記半導体基板が、N−型シリコン基板と、その上に配置されるN−型エピタキシャル層と、を備え、
前記トレンチゲートを形成するステップにおいて、第一に、前記バリア層上にポリシリコン層を形成し、前記バリア層マスクを用いて前記ポリシリコン層をエッチバックし、前記バリア層上の前記ポリシリコン層を除去することを特徴とする請求項1に記載のトレンチDMOSトランジスタの製造方法。 - 前記トレンチが、前記N−型エピタキシャル層内に位置することを特徴とする請求項2に記載のトレンチDMOSトランジスタの製造方法。
- 熱酸化または化学的気相成長法または物理的気相成長法によって、前記酸化物層が形成されることを特徴とする請求項1に記載のトレンチDMOSトランジスタの製造方法。
- 前記酸化物層が、250Å〜350Åの厚さを有する二酸化シリコンから構成されることを特徴とする請求項4に記載のトレンチDMOSトランジスタの製造方法。
- 化学的気相成長法または物理的気相成長法によって、前記バリア層が形成されることを特徴とする請求項1に記載のトレンチDMOSトランジスタの製造方法。
- 前記バリア層が、2500Å〜3500Åの厚さを有する窒化シリコンから構成されることを特徴とする請求項6に記載のトレンチDMOSトランジスタの製造方法。
- 熱酸化または高速アニーリング酸化によって、前記ゲート酸化物層が形成されることを特徴とする請求項1に記載のトレンチDMOSトランジスタの製造方法。
- 前記ゲート酸化物層が、300Å〜1000Åの厚さを有する二酸化シリコンまたは窒素−含有二酸化シリコンから構成されることを特徴とする請求項8に記載のトレンチDMOSトランジスタの製造方法。
- 前記拡散層の形成の間、P−型イオンが、前記半導体基板内に注入されることを特徴とする請求項1に記載のトレンチDMOSトランジスタの製造方法。
- P−型イオンが、70KeV〜100KeVのエネルギーを有し、1E13/cm2〜3E13/cm2の量で注入されるホウ素イオンであることを特徴とする請求項10に記載のトレンチDMOSトランジスタの製造方法。
- 前記ソース/ドレインの形成の間、N−型イオンが、前記拡散層内に注入されることを特徴とする請求項1に記載のトレンチDMOSトランジスタの製造方法。
- N−型イオンが、70KeV〜130KeVのエネルギーを有し、1E16/cm2〜5E16/cm2の量で注入されるヒ素イオンであることを特徴とする請求項12に記載のトレンチDMOSトランジスタの製造方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN200910175076.7 | 2009-09-27 | ||
CN2009101750767A CN102034708B (zh) | 2009-09-27 | 2009-09-27 | 沟槽型dmos晶体管的制作方法 |
PCT/CN2010/077318 WO2011035727A1 (en) | 2009-09-27 | 2010-09-26 | Method for fabricating trench dmos transistor |
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JP2013505589A true JP2013505589A (ja) | 2013-02-14 |
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JP2012530119A Pending JP2013505589A (ja) | 2009-09-27 | 2010-09-26 | トレンチdmosトランジスタの製造方法 |
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Country | Link |
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US (1) | US20120178230A1 (ja) |
JP (1) | JP2013505589A (ja) |
KR (1) | KR20120053511A (ja) |
CN (1) | CN102034708B (ja) |
WO (1) | WO2011035727A1 (ja) |
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KR101270643B1 (ko) * | 2012-07-20 | 2013-06-03 | 서울대학교산학협력단 | 터널링 전계 효과 트랜지스터 및 그 제조 방법 |
CN104425351A (zh) * | 2013-09-11 | 2015-03-18 | 中国科学院微电子研究所 | 沟槽形成方法和半导体器件制造方法 |
KR102335328B1 (ko) * | 2016-12-08 | 2021-12-03 | 현대자동차 주식회사 | 반도체 소자의 제조 방법 |
US10553492B2 (en) | 2018-04-30 | 2020-02-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Selective NFET/PFET recess of source/drain regions |
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2009
- 2009-09-27 CN CN2009101750767A patent/CN102034708B/zh active Active
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2010
- 2010-09-26 KR KR1020127007293A patent/KR20120053511A/ko active Search and Examination
- 2010-09-26 US US13/394,679 patent/US20120178230A1/en not_active Abandoned
- 2010-09-26 JP JP2012530119A patent/JP2013505589A/ja active Pending
- 2010-09-26 WO PCT/CN2010/077318 patent/WO2011035727A1/en active Application Filing
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JP2007019513A (ja) * | 2005-07-06 | 2007-01-25 | Infineon Technologies Ag | 埋め込みゲートを有する半導体装置及びその製造方法 |
JP2007150081A (ja) * | 2005-11-29 | 2007-06-14 | Rohm Co Ltd | 半導体装置および半導体装置の製造方法 |
JP2009099955A (ja) * | 2007-09-27 | 2009-05-07 | Rohm Co Ltd | 半導体装置および半導体装置の製造方法 |
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CN102034708B (zh) | 2012-07-04 |
KR20120053511A (ko) | 2012-05-25 |
CN102034708A (zh) | 2011-04-27 |
WO2011035727A1 (en) | 2011-03-31 |
US20120178230A1 (en) | 2012-07-12 |
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