JP2013258281A - 電子装置 - Google Patents
電子装置 Download PDFInfo
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- JP2013258281A JP2013258281A JP2012133235A JP2012133235A JP2013258281A JP 2013258281 A JP2013258281 A JP 2013258281A JP 2012133235 A JP2012133235 A JP 2012133235A JP 2012133235 A JP2012133235 A JP 2012133235A JP 2013258281 A JP2013258281 A JP 2013258281A
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- lid
- plating layer
- metal film
- electronic device
- housing
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K7/00—Constructional details common to different types of electric apparatus
- H05K7/02—Arrangements of circuit components or wiring on supporting structure
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K5/00—Casings, cabinets or drawers for electric apparatus
- H05K5/0091—Housing specially adapted for small components
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/146—Mixed devices
- H01L2924/1461—MEMS
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Micromachines (AREA)
Abstract
【解決手段】 電子装置は、凹部と前記凹部を露出する開口部とを有する筐体部と、不純物が注入された半導体材料で形成され、一方の面が前記筐体部に接合されて前記開口部を覆う蓋部と、前記筐体部の前記開口部の周囲の前記蓋部との接合面に形成される第1金属膜と、前記蓋部の前記一方の面において、前記第1金属膜に対応する位置に形成される第2金属膜と、前記蓋部の他方の面において、前記第2金属膜に対応する位置に形成される第3金属膜と、前記筐体部の前記凹部の内部に配設される電子部品とを含む。
【選択図】図3
Description
図1は、比較例の中空状筐体及び電子装置を示す図であり、(A)は斜視図、(B)は(A)のA−A矢視断面における分解断面図、(C)は筐体部の平面図を示す。
図3は、実施の形態の中空状筐体及び電子装置を示す図であり、(A)は斜視図、(B)は(A)のC−C矢視断面における分解断面図、(C)は中空状筐体及び電子装置の平面図、(D)は中空状筐体の底面図、(E)は筐体部の平面図を示す。ここでは、図3(A)〜(E)に示すように直交座標系(XYZ座標系)を定義する。
100 電子装置
110 中空状筐体
120 筐体部
121 凹部
122 開口部
123 壁部
124 めっき層
130 蓋部
131、132 めっき層
132X、132Y 金属膜
Claims (9)
- 凹部と前記凹部を露出する開口部とを有する筐体部と、
不純物が注入された半導体材料で形成され、一方の面が前記筐体部に接合されて前記開口部を覆う蓋部と、
前記筐体部の前記開口部の周囲の前記蓋部との接合面に形成される第1金属膜と、
前記蓋部の前記一方の面において、前記第1金属膜に対応する位置に形成される第2金属膜と、
前記蓋部の他方の面において、前記第2金属膜に対応する位置に形成される第3金属膜と、
前記筐体部の前記凹部の内部に配設される電子部品と
を含む、電子装置。 - 前記第3金属膜は、前記蓋部の前記他方の面の中央部を取り囲むように、平面視で分離して配列される複数の金属膜部である、請求項1記載の電子装置。
- 前記複数の金属膜部のうち、前記中央部に対して対称な位置に配置される一対の金属膜部同士の間隔は、前記蓋部の厚さよりも大きい、請求項2記載の電子装置。
- 前記複数の金属膜部のうち、相隣接する金属膜部同士の間隔は、前記蓋部の厚さよりも大きい、請求項2又は3記載の電子装置。
- 前記開口部は平面視で矩形であり、前記第1金属膜及び前記第2金属部は平面視で矩形環状であり、前記複数の金属膜部は、平面視で矩形環状に配置される、請求項3又は4記載の電子装置。
- 前記第2金属膜の断面における幅は、前記第1金属膜の断面における幅よりも狭い、請求項5記載の電子装置。
- 前記筐体部は前記蓋部と同一の半導体材料で形成される、請求項1乃至6のいずれか一項記載の電子装置。
- 前記半導体材料はシリコンである、請求項1乃至7のいずれか一項記載の電子装置。
- 前記筐体部の外表面及び前記凹部の内表面を覆う絶縁層をさらに含む、請求項1乃至8のいずれか一項記載の電子装置。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012133235A JP5979994B2 (ja) | 2012-06-12 | 2012-06-12 | 電子装置 |
US13/914,660 US9179568B2 (en) | 2012-06-12 | 2013-06-11 | Electronic device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012133235A JP5979994B2 (ja) | 2012-06-12 | 2012-06-12 | 電子装置 |
Publications (3)
Publication Number | Publication Date |
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JP2013258281A true JP2013258281A (ja) | 2013-12-26 |
JP2013258281A5 JP2013258281A5 (ja) | 2015-07-23 |
JP5979994B2 JP5979994B2 (ja) | 2016-08-31 |
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JP2012133235A Active JP5979994B2 (ja) | 2012-06-12 | 2012-06-12 | 電子装置 |
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US (1) | US9179568B2 (ja) |
JP (1) | JP5979994B2 (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103837145B (zh) * | 2012-11-26 | 2018-12-28 | 精工爱普生株式会社 | 电子器件及其制造方法、盖体、电子设备以及移动体 |
JP6943130B2 (ja) * | 2017-10-11 | 2021-09-29 | セイコーエプソン株式会社 | Memsデバイス、慣性計測装置、移動体測位装置、携帯型電子機器、電子機器、および移動体 |
Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4844274B1 (ja) * | 1963-10-24 | 1973-12-24 | ||
JP2003209197A (ja) * | 2001-11-12 | 2003-07-25 | Sumitomo Special Metals Co Ltd | 電子部品用パッケージ、その蓋体、その蓋体用の蓋材およびその蓋材の製造方法 |
US20040207071A1 (en) * | 2001-11-12 | 2004-10-21 | Kazuhiro Shiomi | Package for electronic parts, lid thereof, material for the lid and method for producing the lid material |
WO2006132168A1 (ja) * | 2005-06-08 | 2006-12-14 | Neomax Materials Co., Ltd. | 電子部品パッケージ、その製造方法及び電子部品パッケージ用蓋材 |
JP2007017199A (ja) * | 2005-07-05 | 2007-01-25 | Sharp Corp | チップスケールパッケージおよびその製造方法 |
JP2008066517A (ja) * | 2006-09-07 | 2008-03-21 | Shinko Electric Ind Co Ltd | 半導体装置 |
JP2008107215A (ja) * | 2006-10-26 | 2008-05-08 | Mitsubishi Electric Corp | イメージセンサおよびその製造方法 |
JP2010239180A (ja) * | 2009-03-30 | 2010-10-21 | Citizen Finetech Miyota Co Ltd | 圧電デバイスの製造方法 |
JP2011131309A (ja) * | 2009-12-24 | 2011-07-07 | Shinko Electric Ind Co Ltd | 半導体パッケージの製造方法 |
JP2012039022A (ja) * | 2010-08-11 | 2012-02-23 | Shinko Electric Ind Co Ltd | 半導体パッケージおよびその製造方法 |
-
2012
- 2012-06-12 JP JP2012133235A patent/JP5979994B2/ja active Active
-
2013
- 2013-06-11 US US13/914,660 patent/US9179568B2/en active Active
Patent Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4844274B1 (ja) * | 1963-10-24 | 1973-12-24 | ||
JP2003209197A (ja) * | 2001-11-12 | 2003-07-25 | Sumitomo Special Metals Co Ltd | 電子部品用パッケージ、その蓋体、その蓋体用の蓋材およびその蓋材の製造方法 |
US20040207071A1 (en) * | 2001-11-12 | 2004-10-21 | Kazuhiro Shiomi | Package for electronic parts, lid thereof, material for the lid and method for producing the lid material |
WO2006132168A1 (ja) * | 2005-06-08 | 2006-12-14 | Neomax Materials Co., Ltd. | 電子部品パッケージ、その製造方法及び電子部品パッケージ用蓋材 |
JP2007017199A (ja) * | 2005-07-05 | 2007-01-25 | Sharp Corp | チップスケールパッケージおよびその製造方法 |
JP2008066517A (ja) * | 2006-09-07 | 2008-03-21 | Shinko Electric Ind Co Ltd | 半導体装置 |
JP2008107215A (ja) * | 2006-10-26 | 2008-05-08 | Mitsubishi Electric Corp | イメージセンサおよびその製造方法 |
JP2010239180A (ja) * | 2009-03-30 | 2010-10-21 | Citizen Finetech Miyota Co Ltd | 圧電デバイスの製造方法 |
JP2011131309A (ja) * | 2009-12-24 | 2011-07-07 | Shinko Electric Ind Co Ltd | 半導体パッケージの製造方法 |
JP2012039022A (ja) * | 2010-08-11 | 2012-02-23 | Shinko Electric Ind Co Ltd | 半導体パッケージおよびその製造方法 |
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Publication number | Publication date |
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US9179568B2 (en) | 2015-11-03 |
JP5979994B2 (ja) | 2016-08-31 |
US20130329385A1 (en) | 2013-12-12 |
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