JP2013070035A - 多層プリント配線板 - Google Patents

多層プリント配線板 Download PDF

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Publication number
JP2013070035A
JP2013070035A JP2012173150A JP2012173150A JP2013070035A JP 2013070035 A JP2013070035 A JP 2013070035A JP 2012173150 A JP2012173150 A JP 2012173150A JP 2012173150 A JP2012173150 A JP 2012173150A JP 2013070035 A JP2013070035 A JP 2013070035A
Authority
JP
Japan
Prior art keywords
conductor
conductor pattern
insulating layer
wiring board
printed wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2012173150A
Other languages
English (en)
Japanese (ja)
Inventor
Haruhiko Morita
治彦 森田
Ryojiro Tominaga
亮二郎 富永
Atsushi Ishida
敦 石田
Satoru Watanabe
渡辺　　哲
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US13/560,239 external-priority patent/US20130192879A1/en
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Publication of JP2013070035A publication Critical patent/JP2013070035A/ja
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • H05K3/4655—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern by using a laminate characterized by the insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
JP2012173150A 2011-09-22 2012-08-03 多層プリント配線板 Pending JP2013070035A (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201161538027P 2011-09-22 2011-09-22
US61/538,027 2011-09-22
US13/560,239 US20130192879A1 (en) 2011-09-22 2012-07-27 Multilayer printed wiring board
US13/560,239 2012-07-27

Publications (1)

Publication Number Publication Date
JP2013070035A true JP2013070035A (ja) 2013-04-18

Family

ID=47973023

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2012173150A Pending JP2013070035A (ja) 2011-09-22 2012-08-03 多層プリント配線板

Country Status (3)

Country Link
JP (1) JP2013070035A (zh)
KR (1) KR20130032270A (zh)
CN (1) CN103025050B (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9521751B2 (en) * 2013-11-20 2016-12-13 Intel Corporation Weaved electrical components in a substrate package core
CN107632255B (zh) * 2017-10-16 2021-03-09 Oppo广东移动通信有限公司 测试治具板

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001217543A (ja) * 1999-11-26 2001-08-10 Ibiden Co Ltd 多層回路基板
WO2005032226A1 (ja) * 2003-09-29 2005-04-07 Tamura Corporation 多層積層回路基板
JP2005183890A (ja) * 2003-12-24 2005-07-07 Taiyo Yuden Co Ltd 積層基板、複数種類の積層基板の設計方法、及び同時焼結積層基板
JP2005347286A (ja) * 2002-05-29 2005-12-15 Ajinomoto Co Inc コイル内蔵多層基板、半導体チップ、及びそれらの製造方法
WO2008053833A1 (fr) * 2006-11-03 2008-05-08 Ibiden Co., Ltd. Tableau de câblage imprimé multicouche
JP2008270532A (ja) * 2007-04-20 2008-11-06 Shinko Electric Ind Co Ltd インダクタ内蔵基板及びその製造方法
JP2009016504A (ja) * 2007-07-03 2009-01-22 Shinko Electric Ind Co Ltd インダクタ内蔵型多層配線基板
JP2010034578A (ja) * 2002-08-09 2010-02-12 Ibiden Co Ltd 多層プリント配線板
JP2010192722A (ja) * 2009-02-19 2010-09-02 Sony Corp 配線基板とその製造方法、チューナモジュール、及び電子機器

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5373397B2 (ja) * 2006-08-01 2013-12-18 ルネサスエレクトロニクス株式会社 インダクタ素子及びその製造方法並びにインダクタ素子を搭載した半導体装置
JP2009212100A (ja) * 2008-02-07 2009-09-17 Namics Corp 多層配線板用の部材およびその製造方法

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001217543A (ja) * 1999-11-26 2001-08-10 Ibiden Co Ltd 多層回路基板
JP2005347286A (ja) * 2002-05-29 2005-12-15 Ajinomoto Co Inc コイル内蔵多層基板、半導体チップ、及びそれらの製造方法
JP2010034578A (ja) * 2002-08-09 2010-02-12 Ibiden Co Ltd 多層プリント配線板
WO2005032226A1 (ja) * 2003-09-29 2005-04-07 Tamura Corporation 多層積層回路基板
JP2005183890A (ja) * 2003-12-24 2005-07-07 Taiyo Yuden Co Ltd 積層基板、複数種類の積層基板の設計方法、及び同時焼結積層基板
WO2008053833A1 (fr) * 2006-11-03 2008-05-08 Ibiden Co., Ltd. Tableau de câblage imprimé multicouche
JP2008270532A (ja) * 2007-04-20 2008-11-06 Shinko Electric Ind Co Ltd インダクタ内蔵基板及びその製造方法
JP2009016504A (ja) * 2007-07-03 2009-01-22 Shinko Electric Ind Co Ltd インダクタ内蔵型多層配線基板
JP2010192722A (ja) * 2009-02-19 2010-09-02 Sony Corp 配線基板とその製造方法、チューナモジュール、及び電子機器

Also Published As

Publication number Publication date
CN103025050B (zh) 2015-09-09
CN103025050A (zh) 2013-04-03
KR20130032270A (ko) 2013-04-01

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