JP2013065838A5 - - Google Patents

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Publication number
JP2013065838A5
JP2013065838A5 JP2012187559A JP2012187559A JP2013065838A5 JP 2013065838 A5 JP2013065838 A5 JP 2013065838A5 JP 2012187559 A JP2012187559 A JP 2012187559A JP 2012187559 A JP2012187559 A JP 2012187559A JP 2013065838 A5 JP2013065838 A5 JP 2013065838A5
Authority
JP
Japan
Prior art keywords
conductive material
substrate
pattern
printing
covering
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2012187559A
Other languages
English (en)
Japanese (ja)
Other versions
JP2013065838A (ja
JP5838136B2 (ja
Filing date
Publication date
Priority claimed from US13/236,265 external-priority patent/US8635761B2/en
Application filed filed Critical
Publication of JP2013065838A publication Critical patent/JP2013065838A/ja
Publication of JP2013065838A5 publication Critical patent/JP2013065838A5/ja
Application granted granted Critical
Publication of JP5838136B2 publication Critical patent/JP5838136B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2012187559A 2011-09-19 2012-08-28 基板上に導電体を形成するためのシステムおよび方法 Expired - Fee Related JP5838136B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/236,265 2011-09-19
US13/236,265 US8635761B2 (en) 2011-09-19 2011-09-19 System and method for formation of electrical conductors on a substrate

Publications (3)

Publication Number Publication Date
JP2013065838A JP2013065838A (ja) 2013-04-11
JP2013065838A5 true JP2013065838A5 (enExample) 2015-10-08
JP5838136B2 JP5838136B2 (ja) 2015-12-24

Family

ID=47751512

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2012187559A Expired - Fee Related JP5838136B2 (ja) 2011-09-19 2012-08-28 基板上に導電体を形成するためのシステムおよび方法

Country Status (4)

Country Link
US (1) US8635761B2 (enExample)
JP (1) JP5838136B2 (enExample)
CN (1) CN103025071B (enExample)
DE (1) DE102012215593B4 (enExample)

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Publication number Priority date Publication date Assignee Title
DE112013001263T5 (de) 2012-03-02 2015-04-30 Pulse Electronics, Inc. Abgeschiedene Antennenvorrichtung und Verfahren dazu
US10020561B2 (en) 2013-09-19 2018-07-10 Pulse Finland Oy Deposited three-dimensional antenna apparatus and methods
KR102123615B1 (ko) 2014-02-12 2020-06-17 펄스 핀랜드 오와이 전도성 부재 배치 및 형성을 위한 방법 및 장치
US9833802B2 (en) * 2014-06-27 2017-12-05 Pulse Finland Oy Methods and apparatus for conductive element deposition and formation
US10211443B2 (en) 2014-09-10 2019-02-19 Cellink Corporation Battery interconnects
US9147875B1 (en) * 2014-09-10 2015-09-29 Cellink Corporation Interconnect for battery packs
US9595754B2 (en) * 2014-12-26 2017-03-14 Wistron Neweb Corp. Patterned conductive structure and method for forming the same
US9466777B2 (en) 2015-02-03 2016-10-11 Cellink Corporation Systems and methods for combined thermal and electrical energy transfer
JP6686158B2 (ja) 2016-03-18 2020-04-22 ヒューレット−パッカード デベロップメント カンパニー エル.ピー.Hewlett‐Packard Development Company, L.P. 定着器アセンブリ、媒体コンディショナ、及び媒体をコンディショニングする方法
US20210121101A1 (en) * 2017-07-24 2021-04-29 The Johns Hopkins University Neonatal vital signs monitor
US11047630B2 (en) 2018-05-14 2021-06-29 Hewlett-Packard Development Company, L.P. Fuser assemblies
US11799183B2 (en) * 2019-07-17 2023-10-24 Xerox Corporation System, apparatus, and method for producing printed electrically conductive lines
CN110677932B (zh) * 2019-09-10 2021-06-25 博宇(天津)半导体材料有限公司 一种陶瓷加热器支撑基体及陶瓷加热器
KR20230160239A (ko) 2021-03-24 2023-11-23 셀링크 코포레이션 다층 가요성 배터리 인터커넥트 및 이의 제조 방법

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JPS5821440B2 (ja) * 1975-07-21 1983-04-30 住友ベークライト株式会社 プリントカイロバンノセイゾウホウホウ
JPS5745992A (en) * 1980-09-03 1982-03-16 Citizen Watch Co Ltd Method of forming transparent electrode pattern
US4778552A (en) * 1986-09-29 1988-10-18 Monarch Marking Systems, Inc. Alarm tag and method of making and deactivating it
US4770897A (en) 1987-05-05 1988-09-13 Digital Equipment Corporation Multilayer interconnection system for multichip high performance semiconductor packaging
JPH01173041A (ja) * 1987-12-28 1989-07-07 Matsushita Electric Ind Co Ltd パターン形成方法
JPH01205495A (ja) * 1988-02-10 1989-08-17 Furukawa Electric Co Ltd:The フレキシブルプリント回路基板の製造方法
US5197185A (en) * 1991-11-18 1993-03-30 Ag Communication Systems Corporation Process of forming electrical connections between conductive layers using thermosonic wire bonded bump vias and thick film techniques
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US8062698B2 (en) 2008-03-10 2011-11-22 Xerox Corporation Synthesis of conductive metal markings for chipless RFID applications
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US20100323102A1 (en) 2009-06-23 2010-12-23 Xerox Corporation System and Method for Preparing Conductive Structures Using Radiation Curable Phase Change Gel Inks

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