JP2013004984A - 半導体パッケージ - Google Patents

半導体パッケージ Download PDF

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Publication number
JP2013004984A
JP2013004984A JP2012135669A JP2012135669A JP2013004984A JP 2013004984 A JP2013004984 A JP 2013004984A JP 2012135669 A JP2012135669 A JP 2012135669A JP 2012135669 A JP2012135669 A JP 2012135669A JP 2013004984 A JP2013004984 A JP 2013004984A
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Japan
Prior art keywords
carrier
semiconductor package
component
test
seat
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JP2012135669A
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Japanese (ja)
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JP2013004984A5 (enExample
Inventor
Birge Adam
バージ アダム
Pickup Kevin
ピックアップ ケビン
A Primavera Anthony
エイ．プリマベラ アンソニー、
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Biotronik SE and Co KG
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Biotronik SE and Co KG
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Publication of JP2013004984A publication Critical patent/JP2013004984A/ja
Publication of JP2013004984A5 publication Critical patent/JP2013004984A5/ja
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    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
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    • H01L23/49805—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Geometry (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
JP2012135669A 2011-06-17 2012-06-15 半導体パッケージ Pending JP2013004984A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201161497966P 2011-06-17 2011-06-17
US61/497,966 2011-06-17

Publications (2)

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JP2013004984A true JP2013004984A (ja) 2013-01-07
JP2013004984A5 JP2013004984A5 (enExample) 2015-05-21

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US (1) US8981546B2 (enExample)
EP (1) EP2535926A3 (enExample)
JP (1) JP2013004984A (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104966708B (zh) 2015-07-01 2018-06-12 英特尔公司 半导体封装结构
US10916529B2 (en) * 2018-03-29 2021-02-09 Taiwan Semiconductor Manufacturing Company, Ltd. Electronics card including multi-chip module
EP3603740A1 (de) * 2018-08-02 2020-02-05 BIOTRONIK SE & Co. KG Implantat
GB2600918B (en) * 2020-10-30 2022-11-23 Npl Management Ltd Ion microtrap assembly and method of making of making such an assembly

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JPH08250620A (ja) * 1995-03-07 1996-09-27 Matsushita Electron Corp 半導体装置
JPH10233464A (ja) * 1997-02-19 1998-09-02 Nec Corp Ｂｇａ型半導体装置およびそのプローブ装置
JPH1117058A (ja) * 1997-06-26 1999-01-22 Nec Corp Ｂｇａパッケージ、その試験用ソケットおよびｂｇａパッケージの試験方法
JP2006344917A (ja) * 2005-06-10 2006-12-21 Sharp Corp 半導体装置、積層型半導体装置、および半導体装置の製造方法
WO2008035650A1 (en) * 2006-09-19 2008-03-27 Panasonic Corporation Socket, module board, and inspection system using the module board
JP2008277595A (ja) * 2007-05-01 2008-11-13 Matsushita Electric Ind Co Ltd 半導体装置およびその製造方法

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JPH05102262A (ja) * 1991-10-03 1993-04-23 Hitachi Ltd 半導体装置及びそれを実装した実装装置
US5334857A (en) * 1992-04-06 1994-08-02 Motorola, Inc. Semiconductor device with test-only contacts and method for making the same
JP3447908B2 (ja) * 1997-02-13 2003-09-16 富士通株式会社 ボールグリッドアレイパッケージ
US20040135242A1 (en) * 2003-01-09 2004-07-15 Hsin Chung Hsien Stacked structure of chips
US7100814B2 (en) * 2004-02-18 2006-09-05 Cardiac Pacemakers, Inc. Method for preparing integrated circuit modules for attachment to printed circuit substrates

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08250620A (ja) * 1995-03-07 1996-09-27 Matsushita Electron Corp 半導体装置
JPH10233464A (ja) * 1997-02-19 1998-09-02 Nec Corp Ｂｇａ型半導体装置およびそのプローブ装置
JPH1117058A (ja) * 1997-06-26 1999-01-22 Nec Corp Ｂｇａパッケージ、その試験用ソケットおよびｂｇａパッケージの試験方法
JP2006344917A (ja) * 2005-06-10 2006-12-21 Sharp Corp 半導体装置、積層型半導体装置、および半導体装置の製造方法
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